Integrate review comments into release notes and docs subdirectory.

Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>

2 files changed, 34 insertions, 49 deletions

diff --git a/Release_Notes.txt b/Release_Notes.txt
index a1395a2..6d8f983 100644
--- a/Release_Notes.txt
+++ b/Release_Notes.txt
@@ -96,7 +96,7 @@ Release notes
 
         This release contains the following file:
 
-        1. arm-virtualizer-v2_2-100212.tar.bz2
+        1. arm-virtualizer-v2_2-160212.tar.bz2
 
             - Contains source code for a basic boot wrapper.
 
@@ -128,34 +128,7 @@ Release notes
 
     e.  New features
 
-        1.  Code optimizations have been done to lower the number of cycles
-            taken to switch payload software execution between the two clusters.
-            An internal cycle accurate emulation platform was used to perform
-            the optimizations. It is not possible to undertake the same activity
-            on the ARM FastModels. The changes mostly center around:
-
-            a. Replacement & rework of C code by assembler routines for
-               initialising the Secure Monitor and HYP mode environment after a
-               warm reset.
-
-            b. Context of the vGIC shared distributor interface is not saved any
-               longer. Since the interface maintains its state across a switch,
-               changes are made to it directly while restoring context on the
-               inbound cluster.
-
-            c. MMU is enabled as soon as possible after a warm reset to minimize
-               strongly ordered accesses.
-
-            d. Barrier instructions are being used more optimally.
-
-            e. The copy_words() routine which was used to save and restore the vGIC
-               context using word sized loads and stores has been replaced by the
-               memcpy() library routine. Depending upon the number of bytes that
-               need to be transferred, it chooses an optimal way of saving and
-               restoring context.
-
-        2.  The variant field of the KFS_ID register is used to distinguish
-            between the FastModels and other platform types.
+        Release v2.2 is a bug fix only release.
 
     f.  Known issues
 
@@ -166,17 +139,19 @@ Release notes
         2.  This release is intended to be built in a Linux development
             environment. Environments other than Linux are not supported.
 
-        3.  The snoop hit rate calculation support depends on per-CPU tube
-            constructs. These are currently only present in internal development
-            versions of the ARM FastModels. A forthcoming release of the ARM
-            FastModels will incorporate this functionality. For the moment,
-            attempts to write to non-existent tubes will be treated as a no-op.
-            (See docs/04-Cache-hit-rate-howto.txt for details).
+        3.  A race condition exists while enabling CCI coherency after a warm
+            reset in the Secure world code. This can lead to a case where
+            cpus1-3 start restoring the saved context without taking part in
+            CCI based coherency for a brief period of time. This results in
+            incorrect code behaviour.
 
-        4.  This release provides instructions to build and run large
-            filesystems with the Virtualizer. The use of large filesystems with
-            the current FastModels release (Real-Time System Model v7.0.1) is
-            known to be unstable.
+        4.  The cache level chosen through a write to the CSSELR on the
+            Cortex-A7 cluster is not migrated to the Cortex-A15 cluster during
+            a subsequent migration.
+
+        5.  Differences in the characteristics of the I-Cache between the
+            Cortex-A7 and Cortex-A15 are not hidden through the use of
+            Virtualization extensions by the Virtualizer.
 
     g.  Issues resolved since last release
 
@@ -194,15 +169,31 @@ Release notes
             1.  Issue an DCCISW and not a DCCSW when DCCSIW was trapped in
                 trap_cp15_mrc_mcr_handle (big-little/virtualisor/virt_handle.c).
 
+                A DCCISW (Data Cache clean and invalidate by set/way) operation
+                was being implemented as a DCCSW (Data Cache clean by set/way)
+                operation by the Virtualizer.
+
             2.  Calculate l2_desc correctly in CreateL3PageTable
                 (big-little/common/pagetable_setup.c) for level equal 2.
 
+                Correct index into Level-2 page table of the 2nd Stage
+                translations is being calculated when CreateL3PageTable() is
+                called to add a L3 page table for IPAs > 1GB.
+
             3.  Create second 4KB 2nd stage mapping for VGIC in
                 Create2ndStagePageTables
                 (big-little/common/pagetable_setup.c).
 
+                Mapping added to 2nd stage translation tables to cover the 2nd
+                4K memory map of the physical cpu interface of the vGIC (cpu
+                interface base + 0x1000).
+
     h.  Test cases and results
 
+        In accordance with the delivery’s status as example code, testing is
+        sufficient to prove robustness of the basic implementation but does
+        not provide full coverage for all use cases.
+
         1.  This release has been tested for correct cluster switching
             operation at ~12 million cycle switching intervals with
             bare-metal and Linux kernel payloads.
@@ -239,10 +230,10 @@ Release notes
 
     a.  Tools
 
-        1.  ARM RealView Development Suite version 4.1 [Build 514].
+        1.  ARM Development Studio 5 - Version 5.8.
 
-        2.  Real-Time System Model (RTSM_VE_Cortex_A15x1_A7x1 and
-            RTSM_VE_Cortex_A15x4_A7x4).
+        2.  Real-Time System Model v7.0.1 (RTSM_VE_Cortex_A15x1_A7x1
+            and RTSM_VE_Cortex_A15x4_A7x4).
 
     b.  Operating systems
 
@@ -258,6 +249,3 @@ Release notes
     incorporate any feedback in subsequent releases of this example
     software.
 
-    Any feedback can be routed through Steve Bannister, Software
-    Development Manager: steve.bannister@arm.com
-
diff --git a/docs/06-Optional-rootfs-build.txt b/docs/06-Optional-rootfs-build.txt
index 77d5697..6dd9d62 100644
--- a/docs/06-Optional-rootfs-build.txt
+++ b/docs/06-Optional-rootfs-build.txt
@@ -119,7 +119,4 @@ F   Launching the ARM FastModel
 
 G   Known limitations
 
-    Use of a comprehensive root filesystem as opposed to busybox
-    is known to be unstable on the current ARM FastModel release (Release
-    6.2 Beta). Subsequent model releases shall contain appropriate fixes as
-    required).
+    None.