diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2013-01-04 13:06:31 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-01-09 15:53:20 +0000 |
| commit | 81a47f2daf02ab6869b7d0dc68e523e3eec8bfb1 (patch) | |
| tree | 9ba15b939e6cdb99cd2842c7af2bbd71b1cf988f | |
| parent | b4ebd41f98ed13a92e4877cd84984aeff5187734 (diff) | |
Enable the CLCD output
This patch is to avoid setting the MUXFPGA configuration in the platform
code in the kernel. On real hardware, this function is handled by the
boot monitor.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | Makefile | 3 | ||||
| -rw-r--r-- | boot.S | 8 |
2 files changed, 10 insertions, 1 deletions
@@ -9,6 +9,7 @@ # VE PHYS_OFFSET := 0x80000000 UART_BASE := 0x1c090000 +SYSREGS_BASE := 0x1c010000 GIC_DIST_BASE := 0x2c001000 GIC_CPU_BASE := 0x2c002000 CNTFRQ := 0x01800000 # 24Mhz @@ -62,7 +63,7 @@ $(IMAGE): boot.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM) $(LD) -o $@ --script=model.lds boot.o: $(BOOTLOADER) Makefile - $(CC) $(CPPFLAGS) -DCNTFRQ=$(CNTFRQ) -DUART_BASE=$(UART_BASE) -DSYS_FLAGS=$(SYS_FLAGS) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER) + $(CC) $(CPPFLAGS) -DCNTFRQ=$(CNTFRQ) -DUART_BASE=$(UART_BASE) -DSYSREGS_BASE=$(SYSREGS_BASE) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER) model.lds: $(LD_SCRIPT) Makefile $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DMBOX_OFFSET=$(MBOX_OFFSET) -DKERNEL_OFFSET=$(KERNEL_OFFSET) -DFDT_OFFSET=$(FDT_OFFSET) -DFS_OFFSET=$(FS_OFFSET) -DKERNEL=$(KERNEL) -DFILESYSTEM=$(FILESYSTEM) -E -P -C -o $@ $< @@ -100,6 +100,14 @@ start_ns: str w5, [x4, #0x30] /* + * CLCD output site MB + */ + ldr x4, =SYSREGS_BASE + ldr w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16) // START|WRITE|MUXFPGA|SITE_MB + str wzr, [x4, #0xa0] // V2M_SYS_CFGDATA + str w5, [x4, #0xa4] // V2M_SYS_CFGCTRL + + /* * Primary CPU */ ldr x0, =dtb // device tree blob |