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author | Kevin Hilman <khilman@linaro.org> | 2015-05-18 16:46:41 -0700 |
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committer | Kevin Hilman <khilman@linaro.org> | 2015-05-18 16:46:41 -0700 |
commit | a524c44bc75336d0b9d9b45ceb30e19354ff780e (patch) | |
tree | ef5e329a5b8bb3ec8cd0ba14af62a6690547195f | |
parent | 271de175c9af5be4ccc7a0e5701c76d3ccb92677 (diff) | |
parent | de9d7bedb8133a015977df39f68a52ffab2eba9d (diff) |
Merge branch 'v3.14/topic/arm64-errata' into linux-linaro-lsk-v3.14
* v3.14/topic/arm64-errata:
arm64: errata: add workaround for cortex-a53 erratum #845719
-rw-r--r-- | arch/arm64/Kconfig | 26 | ||||
-rw-r--r-- | arch/arm64/kernel/entry.S | 11 |
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 40eb58df9377..b0424cf0fa4f 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -158,6 +158,32 @@ endmenu menu "Kernel Features" +menu "ARM errata workarounds" + +config ARM64_ERRATUM_845719 + bool "Cortex-A53: 845719: a load might read incorrect data" + depends on COMPAT + default n + help + This option adds an alternative code sequence to work around ARM + erratum 845719 on Cortex-A53 parts up to r0p4. + + When running a compat (AArch32) userspace on an affected Cortex-A53 + part, a load at EL0 from a virtual address that matches the bottom 32 + bits of the virtual address used by a recent load at (AArch64) EL1 + might return incorrect data. + + The workaround is to write the contextidr_el1 register on exception + return to a 32-bit task. + Please note that this does not necessarily enable the workaround, + as it depends on the alternative framework, which will only patch + the kernel if an affected CPU is detected. + + If unsure, say Y. + +endmenu + + config ARM64_64K_PAGES bool "Enable 64KB pages support" help diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index a010e3af4597..3e6f4dc5e61e 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -116,6 +116,17 @@ .if \el == 0 ct_user_enter ldr x23, [sp, #S_SP] // load return stack pointer +#ifdef CONFIG_ARM64_ERRATUM_845719 + tbz x22, #4, 1f +#ifdef CONFIG_PID_IN_CONTEXTIDR + mrs x29, contextidr_el1 + msr contextidr_el1, x29 +1: +#else + msr contextidr_el1, xzr +1: +#endif +#endif .endif .if \ret ldr x1, [sp, #S_X1] // preserve x0 (syscall return) |