diff options
| author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2013-06-21 11:38:28 +0200 |
|---|---|---|
| committer | Steven Rostedt <rostedt@goodmis.org> | 2013-08-13 16:09:02 -0400 |
| commit | 553045b110d9efe8dfab3f2a71bfa344565ea905 (patch) | |
| tree | 45f345f142d1ac8932dcc2683c555fee1116d07d | |
| parent | 6522a35177a67983a5eb17896bd8bc0020c01fc0 (diff) | |
gpu: i915: allow the user not to do the wbinvd
The wbinvd() renders the system with i915 unusable on RT. Using this
expensive instruction avoids GPU trouble according to
https://bugs.freedesktop.org/show_bug.cgi?id=62191
As a workaround for RT it is recommended to pin each GPU related process
to the same CPU and then disable this instruction via the module
paramter.
Cc: stable-rt@vger.kernel.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 339540d56a2b..dce41f49ab9d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -35,6 +35,7 @@ #include <linux/swap.h> #include <linux/pci.h> #include <linux/dma-buf.h> +#include <linux/module.h> static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj); static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj); @@ -2656,6 +2657,10 @@ static inline int fence_number(struct drm_i915_private *dev_priv, return fence - dev_priv->fence_regs; } +static bool do_wbinvd = true; +module_param(do_wbinvd, bool, 0644); +MODULE_PARM_DESC(do_wbinvd, "Do expensive synchronization. Say no after you pin each GPU process to the same CPU in order to lower the latency."); + static void i915_gem_write_fence__ipi(void *data) { wbinvd(); @@ -2679,8 +2684,16 @@ static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj, * on each processor in order to manually flush all memory * transactions before updating the fence register. */ - if (HAS_LLC(obj->base.dev)) - on_each_cpu(i915_gem_write_fence__ipi, NULL, 1); + if (HAS_LLC(obj->base.dev)) { + if (do_wbinvd) { +#ifdef CONFIG_PREEMPT_RT_FULL + pr_err_once("WARNING! The i915 invalidates all caches which increases the latency."); + pr_err_once("As a workaround use 'i915.do_wbinvd=no' and PIN each process doing "); + pr_err_once("any kind of GPU activity to the same CPU to avoid problems."); +#endif + on_each_cpu(i915_gem_write_fence__ipi, NULL, 1); + } + } i915_gem_write_fence(dev, fence_reg, enable ? obj : NULL); if (enable) { |