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| author | Steven Rostedt <srostedt@redhat.com> | 2012-10-26 08:46:08 -0400 |
|---|---|---|
| committer | Steven Rostedt <rostedt@goodmis.org> | 2012-10-26 08:46:08 -0400 |
| commit | f96863dca49ff5df8f1f8215b496a58e303fe38d (patch) | |
| tree | 114dd8d079a19a489096edeaf7af23db99824aa5 /arch/arm/Kconfig | |
| parent | ec0eb0e2dca4005fcf984d3f1b67511b43d546fb (diff) | |
| parent | e496537363b337a318a2f113029e68b76f9baa2d (diff) | |
Merge tag 'v3.0.47' into v3.0-rt
This is the 3.0.47 stable release
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 895c2dd6bddd..5b35cabeedfa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1261,6 +1261,16 @@ config PL310_ERRATA_769419 on systems with an outer cache, the store buffer is drained explicitly. +config ARM_ERRATA_775420 + bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock" + depends on CPU_V7 + help + This option enables the workaround for the 775420 Cortex-A9 (r2p2, + r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance + operation aborts with MMU exception, it might cause the processor + to deadlock. This workaround puts DSB before executing ISB if + an abort may occur on cache maintenance. + endmenu source "arch/arm/common/Kconfig" |