clockevents: arm: migrate to ->set_dev_mode()

Clockevents core now supports ->set_dev_mode() (as a replacement to
->set_mode()), with capability to return error codes.

Migrate all ARM specific clockevent drivers to implement this new callback.

Drivers now return -ENOSYS when a unsupported mode is passed to their
->set_dev_mode() callbacks and return 0 on success.

Most of the changes are automated with help of Coccinelle
(http://coccinelle.lip6.fr/) and the ones left are around the switch block which
are handled manually.

Some drivers had a WARN()/BUG()/pr_err()/empty-implementation for unsupported
modes. These statements and unsupported modes are removed now as proper error
handling with a WARN_ON() is done at clockevents core.

A simplified version of the semantic patch is:

@@
identifier m,c,setmode;
@@
-void
+int
setmode(enum clock_event_mode m, struct clock_event_device *c);

@@
identifier setmode;
@@
-void
+int
setmode(enum clock_event_mode, struct clock_event_device *);

@fixret@
identifier m,c,setmode;
@@
-void
+int
setmode(enum clock_event_mode m, struct clock_event_device *c)
 {
 ...
+ return 0;
 }

@depends on fixret@
identifier ced;
identifier fixret.setmode;
@@
... struct clock_event_device ced = {
...,
-.set_mode
+.set_dev_mode
= setmode,
};

@depends on fixret@
expression ced;
identifier fixret.setmode;
@@
- ced->set_mode
+ ced->set_dev_mode
= setmode

@depends on fixret@
identifier fixret.setmode;
@@
{
.
-set_mode
+set_dev_mode
= setmode
}

@depends on fixret@
expression ced;
identifier fixret.setmode;
@@
- ced.set_mode
+ ced.set_dev_mode
= setmode

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>

26 files changed, 166 insertions, 75 deletions

diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 53c6a26b633d..3f4a617e6652 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -127,10 +127,11 @@ static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-static void sp804_set_mode(enum clock_event_mode mode,
+static int sp804_set_mode(enum clock_event_mode mode,
 	struct clock_event_device *evt)
 {
 	unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
+	int ret = 0;
 
 	writel(ctrl, clkevt_base + TIMER_CTRL);
 
@@ -147,11 +148,14 @@ static void sp804_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-	default:
+	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		ret = -ENOSYS;
 	}
 
 	writel(ctrl, clkevt_base + TIMER_CTRL);
+	return ret;
 }
 
 static int sp804_set_next_event(unsigned long next,
@@ -168,7 +172,7 @@ static int sp804_set_next_event(unsigned long next,
 static struct clock_event_device sp804_clockevent = {
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
 		CLOCK_EVT_FEAT_DYNIRQ,
-	.set_mode	= sp804_set_mode,
+	.set_dev_mode	= sp804_set_mode,
 	.set_next_event	= sp804_set_next_event,
 	.rating		= 300,
 };
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 6591e26fc13f..a3d85967cb92 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -36,10 +36,11 @@ static DEFINE_PER_CPU(bool, percpu_setup_called);
 static struct clock_event_device __percpu *twd_evt;
 static int twd_ppi;
 
-static void twd_set_mode(enum clock_event_mode mode,
+static int twd_set_mode(enum clock_event_mode mode,
 			struct clock_event_device *clk)
 {
 	unsigned long ctrl;
+	int ret = 0;
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
@@ -52,13 +53,17 @@ static void twd_set_mode(enum clock_event_mode mode,
 		/* period set, and timer enabled in 'next_event' hook */
 		ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
 		break;
+	default:
+		ret = -ENOSYS;
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-	default:
+	case CLOCK_EVT_MODE_RESUME:
 		ctrl = 0;
+		break;
 	}
 
 	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
+	return ret;
 }
 
 static int twd_set_next_event(unsigned long evt,
@@ -296,7 +301,7 @@ static void twd_timer_setup(void)
 	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
 			CLOCK_EVT_FEAT_C3STOP;
 	clk->rating = 350;
-	clk->set_mode = twd_set_mode;
+	clk->set_dev_mode = twd_set_mode;
 	clk->set_next_event = twd_set_next_event;
 	clk->irq = twd_ppi;
 	clk->cpumask = cpumask_of(cpu);
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index bc7b363a3083..cde23bd89c7d 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -111,9 +111,11 @@ static struct clocksource clk32k = {
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void
+static int
 clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
+	int ret = 0;
+
 	/* Disable and flush pending timer interrupts */
 	at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
 	at91_st_read(AT91_ST_SR);
@@ -137,8 +139,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 	case CLOCK_EVT_MODE_RESUME:
 		irqmask = 0;
 		break;
+	default:
+		ret = -ENOSYS;
 	}
 	at91_st_write(AT91_ST_IER, irqmask);
+	return ret;
 }
 
 static int
@@ -176,7 +181,7 @@ static struct clock_event_device clkevt = {
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 150,
 	.set_next_event	= clkevt32k_next_event,
-	.set_mode	= clkevt32k_mode,
+	.set_dev_mode	= clkevt32k_mode,
 };
 
 void __iomem *at91_st_base;
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 0f04ffe9c5a8..b25185b4c7aa 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -82,7 +82,7 @@ static struct clocksource pit_clk = {
 /*
  * Clockevent device:  interrupts every 1/HZ (== pit_cycles * MCK/16)
  */
-static void
+static int
 pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
 	switch (mode) {
@@ -102,7 +102,11 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+
+	return 0;
 }
 
 static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
@@ -134,7 +138,7 @@ static struct clock_event_device pit_clkevt = {
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
 	.shift		= 32,
 	.rating		= 100,
-	.set_mode	= pit_clkevt_mode,
+	.set_dev_mode	= pit_clkevt_mode,
 	.suspend	= at91sam926x_pit_suspend,
 	.resume		= at91sam926x_pit_resume,
 };
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index a1935911e4f1..8c5d664ee773 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -264,7 +264,7 @@ static u64 notrace clps711x_sched_clock_read(void)
 	return ~readw_relaxed(CLPS711X_VIRT_BASE + TC1D);
 }
 
-static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
+static int clps711x_clockevent_set_mode(enum clock_event_mode mode,
 					 struct clock_event_device *evt)
 {
 	disable_irq(IRQ_TC2OI);
@@ -280,14 +280,17 @@ static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		/* Left event sources disabled, no more interrupts appear */
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device clockevent_clps711x = {
 	.name		= "clps711x-clockevent",
 	.rating		= 300,
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
-	.set_mode	= clps711x_clockevent_set_mode,
+	.set_dev_mode	= clps711x_clockevent_set_mode,
 };
 
 static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index e38b279f402c..14f3287012f8 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -81,12 +81,12 @@ void cns3xxx_power_off(void)
  */
 static void __iomem *cns3xxx_tmr1;
 
-static void cns3xxx_timer_set_mode(enum clock_event_mode mode,
+static int cns3xxx_timer_set_mode(enum clock_event_mode mode,
 				   struct clock_event_device *clk)
 {
 	unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
 	int pclk = cns3xxx_cpu_clock() / 8;
-	int reload;
+	int reload, ret = 0;
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
@@ -98,13 +98,17 @@ static void cns3xxx_timer_set_mode(enum clock_event_mode mode,
 		/* period set, and timer enabled in 'next_event' hook */
 		ctrl |= (1 << 2) | (1 << 9);
 		break;
+	default:
+		ret = -ENOSYS;
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-	default:
+	case CLOCK_EVT_MODE_RESUME:
 		ctrl = 0;
+		break;
 	}
 
 	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
+	return ret;
 }
 
 static int cns3xxx_timer_set_next_event(unsigned long evt,
@@ -121,7 +125,7 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
 static struct clock_event_device cns3xxx_tmr1_clockevent = {
 	.name		= "cns3xxx timer1",
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= cns3xxx_timer_set_mode,
+	.set_dev_mode	= cns3xxx_timer_set_mode,
 	.set_next_event	= cns3xxx_timer_set_next_event,
 	.rating		= 350,
 	.cpumask	= cpu_all_mask,
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 24ad30f32ae3..7ab6a6cc636a 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -303,7 +303,7 @@ static int davinci_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void davinci_set_mode(enum clock_event_mode mode,
+static int davinci_set_mode(enum clock_event_mode mode,
 			     struct clock_event_device *evt)
 {
 	struct timer_s *t = &timers[TID_CLOCKEVENT];
@@ -326,13 +326,16 @@ static void davinci_set_mode(enum clock_event_mode mode,
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device clockevent_davinci = {
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event	= davinci_set_next_event,
-	.set_mode	= davinci_set_mode,
+	.set_dev_mode	= davinci_set_mode,
 };
 
 
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 3971104d32d4..27aeb5566e6f 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -57,7 +57,7 @@ static int ckevt_dc21285_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
+static int ckevt_dc21285_set_mode(enum clock_event_mode mode,
 	struct clock_event_device *c)
 {
 	switch (mode) {
@@ -74,7 +74,10 @@ static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_SHUTDOWN:
 		*CSR_TIMER1_CNTL = 0;
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device ckevt_dc21285 = {
@@ -84,7 +87,7 @@ static struct clock_event_device ckevt_dc21285 = {
 	.rating		= 200,
 	.irq		= IRQ_TIMER1,
 	.set_next_event	= ckevt_dc21285_set_next_event,
-	.set_mode	= ckevt_dc21285_set_mode,
+	.set_dev_mode	= ckevt_dc21285_set_mode,
 };
 
 static irqreturn_t timer1_interrupt(int irq, void *dev_id)
diff --git a/arch/arm/mach-gemini/time.c b/arch/arm/mach-gemini/time.c
index 0a63c4d25b64..8fea6f37ce51 100644
--- a/arch/arm/mach-gemini/time.c
+++ b/arch/arm/mach-gemini/time.c
@@ -59,7 +59,7 @@ static int gemini_timer_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void gemini_timer_set_mode(enum clock_event_mode mode,
+static int gemini_timer_set_mode(enum clock_event_mode mode,
 				  struct clock_event_device *evt)
 {
 	u32 period = DIV_ROUND_CLOSEST(tick_rate, HZ);
@@ -91,8 +91,9 @@ static void gemini_timer_set_mode(enum clock_event_mode mode,
 		writel(cr, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
 		break;
 	default:
-                break;
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 /* Use TIMER2 as clock event */
@@ -101,7 +102,7 @@ static struct clock_event_device gemini_clockevent = {
 	.rating		= 300, /* Reasonably fast and accurate clock event */
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event	= gemini_timer_set_next_event,
-	.set_mode	= gemini_timer_set_mode,
+	.set_dev_mode	= gemini_timer_set_mode,
 };
 
 /*
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
index 074b1a81ba76..b5f86dae73d5 100644
--- a/arch/arm/mach-imx/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -106,7 +106,7 @@ static int epit_set_next_event(unsigned long evt,
 	return 0;
 }
 
-static void epit_set_mode(enum clock_event_mode mode,
+static int epit_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
 	unsigned long flags;
@@ -152,7 +152,10 @@ static void epit_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		/* Left event sources disabled, no more interrupts appear */
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 /*
@@ -178,7 +181,7 @@ static struct irqaction epit_timer_irq = {
 static struct clock_event_device clockevent_epit = {
 	.name		= "epit",
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= epit_set_mode,
+	.set_dev_mode	= epit_set_mode,
 	.set_next_event	= epit_set_next_event,
 	.rating		= 200,
 };
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 1a3a5f615770..ba41465df3a9 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -167,7 +167,7 @@ static const char *clock_event_mode_label[] = {
 };
 #endif /* DEBUG */
 
-static void mxc_set_mode(enum clock_event_mode mode,
+static int mxc_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
 	unsigned long flags;
@@ -225,7 +225,10 @@ static void mxc_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		/* Left event sources disabled, no more interrupts appear */
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 /*
@@ -257,7 +260,7 @@ static struct irqaction mxc_timer_irq = {
 static struct clock_event_device clockevent_mxc = {
 	.name		= "mxc_timer1",
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= mxc_set_mode,
+	.set_dev_mode	= mxc_set_mode,
 	.set_next_event	= mx1_2_set_next_event,
 	.rating		= 200,
 };
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 17c0fe627435..f8f34eb1620f 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -308,7 +308,7 @@ static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
+static int clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
 {
 	u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
 
@@ -330,11 +330,12 @@ static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_devic
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_RESUME:
-	default:
 		/* Just leave in disabled state */
 		break;
+	default:
+		return -ENOSYS;
 	}
-
+	return 0;
 }
 
 static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
@@ -351,7 +352,7 @@ static int clkevt_set_next_event(unsigned long next, struct clock_event_device *
 static struct clock_event_device integrator_clockevent = {
 	.name		= "timer1",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= clkevt_set_mode,
+	.set_dev_mode	= clkevt_set_mode,
 	.set_next_event	= clkevt_set_next_event,
 	.rating		= 300,
 };
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 6d68aed6548a..9d004257770f 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -512,11 +512,12 @@ static int ixp4xx_set_next_event(unsigned long evt,
 	return 0;
 }
 
-static void ixp4xx_set_mode(enum clock_event_mode mode,
+static int ixp4xx_set_mode(enum clock_event_mode mode,
 			    struct clock_event_device *evt)
 {
 	unsigned long opts = *IXP4XX_OSRT1 & IXP4XX_OST_RELOAD_MASK;
 	unsigned long osrt = *IXP4XX_OSRT1 & ~IXP4XX_OST_RELOAD_MASK;
+	int ret = 0;
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
@@ -534,20 +535,22 @@ static void ixp4xx_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		opts |= IXP4XX_OST_ENABLE;
 		break;
-	case CLOCK_EVT_MODE_UNUSED:
 	default:
+		ret = -ENOSYS;
+	case CLOCK_EVT_MODE_UNUSED:
 		osrt = opts = 0;
 		break;
 	}
 
 	*IXP4XX_OSRT1 = osrt | opts;
+	return ret;
 }
 
 static struct clock_event_device clockevent_ixp4xx = {
 	.name		= "ixp4xx timer1",
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating         = 200,
-	.set_mode	= ixp4xx_set_mode,
+	.set_dev_mode	= ixp4xx_set_mode,
 	.set_next_event	= ixp4xx_set_next_event,
 };
 
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 426c97662f5b..924028a481c3 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -54,14 +54,15 @@
 /* Timer0 Timeout Counter Register */
 #define T0TC_WATCHDOG		(0xff)		/* Enable watchdog mode */
 
-static void ks8695_set_mode(enum clock_event_mode mode,
+static int ks8695_set_mode(enum clock_event_mode mode,
 			    struct clock_event_device *evt)
 {
-	u32 tmcon;
+	u32 tmcon, rate, half;
 
-	if (mode == CLOCK_EVT_FEAT_PERIODIC) {
-		u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ);
-		u32 half = DIV_ROUND_CLOSEST(rate, 2);
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ);
+		half = DIV_ROUND_CLOSEST(rate, 2);
 
 		/* Disable timer 1 */
 		tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON);
@@ -75,7 +76,16 @@ static void ks8695_set_mode(enum clock_event_mode mode,
 		/* Re-enable timer1 */
 		tmcon |= TMCON_T1EN;
 		writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON);
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+	case CLOCK_EVT_MODE_UNUSED:
+		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int ks8695_set_next_event(unsigned long cycles,
@@ -106,7 +116,7 @@ static struct clock_event_device clockevent_ks8695 = {
 	.rating		= 300, /* Reasonably fast and accurate clock event */
 	.features	= CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
 	.set_next_event	= ks8695_set_next_event,
-	.set_mode	= ks8695_set_mode,
+	.set_dev_mode	= ks8695_set_mode,
 };
 
 /*
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index 20eab63d10ba..bee469965555 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -43,7 +43,7 @@ static int lpc32xx_clkevt_next_event(unsigned long delta,
 	return 0;
 }
 
-static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
+static int lpc32xx_clkevt_mode(enum clock_event_mode mode,
     struct clock_event_device *dev)
 {
 	switch (mode) {
@@ -64,7 +64,10 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device lpc32xx_clkevt = {
@@ -72,7 +75,7 @@ static struct clock_event_device lpc32xx_clkevt = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 300,
 	.set_next_event	= lpc32xx_clkevt_next_event,
-	.set_mode	= lpc32xx_clkevt_mode,
+	.set_dev_mode	= lpc32xx_clkevt_mode,
 };
 
 static irqreturn_t lpc32xx_timer_interrupt(int irq, void *dev_id)
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 024022d91fe3..8d0c526dbc2a 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -118,24 +118,27 @@ static int timer_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void timer_set_mode(enum clock_event_mode mode,
+static int timer_set_mode(enum clock_event_mode mode,
 			   struct clock_event_device *dev)
 {
 	unsigned long flags;
 
-	local_irq_save(flags);
 	switch (mode) {
 	case CLOCK_EVT_MODE_ONESHOT:
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
 		/* disable the matching interrupt */
+		local_irq_save(flags);
 		__raw_writel(0x00, mmp_timer_base + TMR_IER(0));
+		local_irq_restore(flags);
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 	case CLOCK_EVT_MODE_PERIODIC:
 		break;
+	default:
+		return -ENOSYS;
 	}
-	local_irq_restore(flags);
+	return 0;
 }
 
 static struct clock_event_device ckevt = {
@@ -143,7 +146,7 @@ static struct clock_event_device ckevt = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= timer_set_next_event,
-	.set_mode	= timer_set_mode,
+	.set_dev_mode	= timer_set_mode,
 };
 
 static cycle_t clksrc_read(struct clocksource *cs)
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index 6df42e643031..7ab5c6825f4f 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -31,10 +31,11 @@
 #define TIMER_CLOCKEVENT 0
 #define TIMER_CLOCKSOURCE 1
 
-static void netx_set_mode(enum clock_event_mode mode,
+static int netx_set_mode(enum clock_event_mode mode,
 		struct clock_event_device *clk)
 {
 	u32 tmode;
+	int ret = 0;
 
 	/* disable timer */
 	writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
@@ -54,9 +55,8 @@ static void netx_set_mode(enum clock_event_mode mode,
 		break;
 
 	default:
-		WARN(1, "%s: unhandled mode %d\n", __func__, mode);
+		ret = -ENOSYS;
 		/* fall through */
-
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_RESUME:
@@ -65,6 +65,7 @@ static void netx_set_mode(enum clock_event_mode mode,
 	}
 
 	writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
+	return ret;
 }
 
 static int netx_set_next_event(unsigned long evt,
@@ -78,7 +79,7 @@ static struct clock_event_device netx_clockevent = {
 	.name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
 	.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event = netx_set_next_event,
-	.set_mode = netx_set_mode,
+	.set_dev_mode = netx_set_mode,
 };
 
 /*
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index a7588cfd0286..b2bcd2555fc5 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -124,7 +124,7 @@ static int omap_mpu_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void omap_mpu_set_mode(enum clock_event_mode mode,
+static int omap_mpu_set_mode(enum clock_event_mode mode,
 			      struct clock_event_device *evt)
 {
 	switch (mode) {
@@ -139,14 +139,17 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device clockevent_mpu_timer1 = {
 	.name		= "mpu_timer1",
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event	= omap_mpu_set_next_event,
-	.set_mode	= omap_mpu_set_mode,
+	.set_dev_mode	= omap_mpu_set_mode,
 };
 
 static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 107e7ab3edba..6cf8962003c8 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -119,7 +119,7 @@ static int omap_32k_timer_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void omap_32k_timer_set_mode(enum clock_event_mode mode,
+static int omap_32k_timer_set_mode(enum clock_event_mode mode,
 				    struct clock_event_device *evt)
 {
 	omap_32k_timer_stop();
@@ -134,14 +134,17 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device clockevent_32k_timer = {
 	.name		= "32k-timer",
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event	= omap_32k_timer_set_next_event,
-	.set_mode	= omap_32k_timer_set_mode,
+	.set_dev_mode	= omap_32k_timer_set_mode,
 };
 
 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 74044aaf438b..d5c7d63352b0 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -101,7 +101,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
+static int omap2_gp_timer_set_mode(enum clock_event_mode mode,
 				    struct clock_event_device *evt)
 {
 	u32 period;
@@ -125,14 +125,17 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device clockevent_gpt = {
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 300,
 	.set_next_event	= omap2_gp_timer_set_next_event,
-	.set_mode	= omap2_gp_timer_set_mode,
+	.set_dev_mode	= omap2_gp_timer_set_mode,
 };
 
 static struct property device_disabled = {
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index fca174e3865d..57a9fc8e754f 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -67,7 +67,7 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 	return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
 
-static void
+static int
 pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
 	switch (mode) {
@@ -86,7 +86,10 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 	case CLOCK_EVT_MODE_RESUME:
 	case CLOCK_EVT_MODE_PERIODIC:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 #ifdef CONFIG_PM
@@ -130,7 +133,7 @@ static struct clock_event_device ckevt_pxa_osmr0 = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= pxa_osmr0_set_next_event,
-	.set_mode	= pxa_osmr0_set_mode,
+	.set_dev_mode	= pxa_osmr0_set_mode,
 	.suspend	= pxa_timer_suspend,
 	.resume		= pxa_timer_resume,
 };
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 6fd4acb8f187..bef1d2ea5bc7 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -52,7 +52,7 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 	return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
 
-static void
+static int
 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
 {
 	switch (mode) {
@@ -66,7 +66,10 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
 	case CLOCK_EVT_MODE_RESUME:
 	case CLOCK_EVT_MODE_PERIODIC:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 #ifdef CONFIG_PM
@@ -105,7 +108,7 @@ static struct clock_event_device ckevt_sa1100_osmr0 = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= sa1100_osmr0_set_next_event,
-	.set_mode	= sa1100_osmr0_set_mode,
+	.set_dev_mode	= sa1100_osmr0_set_mode,
 	.suspend	= sa1100_timer_suspend,
 	.resume		= sa1100_timer_resume,
 };
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c
index d449673e40f7..78489761d1e5 100644
--- a/arch/arm/mach-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -66,7 +66,7 @@
 static __iomem void *gpt_base;
 static struct clk *gpt_clk;
 
-static void clockevent_set_mode(enum clock_event_mode mode,
+static int clockevent_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *clk_event_dev);
 static int clockevent_next_event(unsigned long evt,
 				 struct clock_event_device *clk_event_dev);
@@ -98,12 +98,12 @@ static void spear_clocksource_init(void)
 static struct clock_event_device clkevt = {
 	.name = "tmr0",
 	.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode = clockevent_set_mode,
+	.set_dev_mode = clockevent_set_mode,
 	.set_next_event = clockevent_next_event,
 	.shift = 0,	/* to be computed */
 };
 
-static void clockevent_set_mode(enum clock_event_mode mode,
+static int clockevent_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *clk_event_dev)
 {
 	u32 period;
@@ -138,9 +138,9 @@ static void clockevent_set_mode(enum clock_event_mode mode,
 
 		break;
 	default:
-		pr_err("Invalid mode requested\n");
-		break;
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int clockevent_next_event(unsigned long cycles,
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index 30fbca844575..cffe26d58414 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -48,10 +48,11 @@
 
 static unsigned int timer0_load;
 
-static void nuc900_clockevent_setmode(enum clock_event_mode mode,
+static int nuc900_clockevent_setmode(enum clock_event_mode mode,
 		struct clock_event_device *clk)
 {
 	unsigned int val;
+	int ret = 0;
 
 	val = __raw_readl(REG_TCSR0);
 	val &= ~(0x03 << 27);
@@ -70,9 +71,12 @@ static void nuc900_clockevent_setmode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		ret = -ENOSYS;
 	}
 
 	__raw_writel(val, REG_TCSR0);
+	return ret;
 }
 
 static int nuc900_clockevent_setnextevent(unsigned long evt,
@@ -92,7 +96,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
 static struct clock_event_device nuc900_clockevent_device = {
 	.name		= "nuc900-timer0",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= nuc900_clockevent_setmode,
+	.set_dev_mode	= nuc900_clockevent_setmode,
 	.set_next_event	= nuc900_clockevent_setnextevent,
 	.rating		= 300,
 };
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index d70b73364a3f..3009d1254f94 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -77,10 +77,11 @@ static int iop_set_next_event(unsigned long delta,
 
 static unsigned long ticks_per_jiffy;
 
-static void iop_set_mode(enum clock_event_mode mode,
+static int iop_set_mode(enum clock_event_mode mode,
 			 struct clock_event_device *unused)
 {
 	u32 tmr = read_tmr0();
+	int ret = 0;
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
@@ -96,14 +97,16 @@ static void iop_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		tmr |= IOP_TMR_EN;
 		break;
+	default:
+		ret = -ENOSYS;
 	case CLOCK_EVT_MODE_SHUTDOWN:
 	case CLOCK_EVT_MODE_UNUSED:
-	default:
 		tmr &= ~IOP_TMR_EN;
 		break;
 	}
 
 	write_tmr0(tmr);
+	return ret;
 }
 
 static struct clock_event_device iop_clockevent = {
@@ -111,7 +114,7 @@ static struct clock_event_device iop_clockevent = {
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating         = 300,
 	.set_next_event	= iop_set_next_event,
-	.set_mode	= iop_set_mode,
+	.set_dev_mode	= iop_set_mode,
 };
 
 static irqreturn_t
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 261258f717fc..987c49fd9b7d 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -106,14 +106,16 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
 	return 0;
 }
 
-static void
+static int
 orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
 	unsigned long flags;
+	int ret = 0;
 	u32 u;
 
 	local_irq_save(flags);
-	if (mode == CLOCK_EVT_MODE_PERIODIC) {
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
 		/*
 		 * Setup timer to fire at 1/HZ intervals.
 		 */
@@ -132,7 +134,14 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 		u = readl(timer_base + TIMER_CTRL_OFF);
 		writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
 		       timer_base + TIMER_CTRL_OFF);
-	} else {
+		break;
+
+	default:
+		ret = -ENOSYS;
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 		/*
 		 * Disable timer.
 		 */
@@ -149,9 +158,10 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 		 * ACK pending timer interrupt.
 		 */
 		writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
-
+		break;
 	}
 	local_irq_restore(flags);
+	return ret;
 }
 
 static struct clock_event_device orion_clkevt = {
@@ -159,7 +169,7 @@ static struct clock_event_device orion_clkevt = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
 	.rating		= 300,
 	.set_next_event	= orion_clkevt_next_event,
-	.set_mode	= orion_clkevt_mode,
+	.set_dev_mode	= orion_clkevt_mode,
 };
 
 static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)