drm/nv04-nv40/instmem: remove use of nouveau_gpuobj_new_fake()

These type of fake objects will not be supported for much longer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 32 insertions, 41 deletions

diff --git a/drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
index 8265ca8adf3f..46b6963b0937 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
@@ -5,67 +5,53 @@
 #include <engine/fifo.h>
 #include <core/ramht.h>
 
-/* returns the size of fifo context */
-static int
-nouveau_fifo_ctx_size(struct drm_device *dev)
-{
-	struct drm_nouveau_private *dev_priv = dev->dev_private;
-
-	if (dev_priv->chipset >= 0x17)
-		return 64 * 32;
-	else
-	if (dev_priv->chipset >= 0x10)
-		return 32 * 32;
+#include "nv04.h"
 
-	return 32 * 16;
-}
-
-int nv04_instmem_init(struct drm_device *dev)
+int
+nv04_instmem_init(struct drm_device *dev)
 {
 	struct drm_nouveau_private *dev_priv = dev->dev_private;
-	struct nouveau_gpuobj *ramht = NULL;
-	u32 offset, length;
+	struct nv04_instmem_priv *priv;
 	int ret;
 
-	/* RAMIN always available */
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	dev_priv->engine.instmem.priv = priv;
+
+	/* PRAMIN aperture maps over the end of vram, reserve the space */
 	dev_priv->ramin_available = true;
 	dev_priv->ramin_rsvd_vram = 512 * 1024;
 
-	/* Setup shared RAMHT */
-	ret = nouveau_gpuobj_new_fake(dev, 0x10000, ~0, 4096,
-				      NVOBJ_FLAG_ZERO_ALLOC, &ramht);
+	ret = drm_mm_init(&dev_priv->ramin_heap, 0, dev_priv->ramin_rsvd_vram);
 	if (ret)
 		return ret;
 
-	ret = nouveau_ramht_new(dev, ramht, &dev_priv->ramht);
-	nouveau_gpuobj_ref(NULL, &ramht);
+	/* 0x00000-0x10000: reserve for probable vbios image */
+	ret = nouveau_gpuobj_new(dev, NULL, 0x10000, 0, 0, &priv->vbios);
 	if (ret)
 		return ret;
 
-	/* And RAMRO */
-	ret = nouveau_gpuobj_new_fake(dev, 0x11200, ~0, 512,
-				      NVOBJ_FLAG_ZERO_ALLOC, &dev_priv->ramro);
+	/* 0x10000-0x18000: reserve for RAMHT */
+	ret = nouveau_gpuobj_new(dev, NULL, 0x08000, 0, NVOBJ_FLAG_ZERO_ALLOC,
+				&priv->ramht);
 	if (ret)
 		return ret;
 
-	/* And RAMFC */
-	length = nouveau_fifo_ctx_size(dev);
-	offset = 0x11400;
-
-	ret = nouveau_gpuobj_new_fake(dev, offset, ~0, length,
-				      NVOBJ_FLAG_ZERO_ALLOC, &dev_priv->ramfc);
+	/* 0x18000-0x18200: reserve for RAMRO */
+	ret = nouveau_gpuobj_new(dev, NULL, 0x00200, 0, 0, &priv->ramro);
 	if (ret)
 		return ret;
 
-	/* Only allow space after RAMFC to be used for object allocation */
-	offset += length;
+	/* 0x18200-0x18a00: reserve for RAMFC (enough for 32 nv30 channels) */
+	ret = nouveau_gpuobj_new(dev, NULL, 0x00800, 0, NVOBJ_FLAG_ZERO_ALLOC,
+				&priv->ramfc);
+	if (ret)
+		return ret;
 
-	ret = drm_mm_init(&dev_priv->ramin_heap, offset,
-			  dev_priv->ramin_rsvd_vram - offset);
-	if (ret) {
-		NV_ERROR(dev, "Failed to init RAMIN heap: %d\n", ret);
+	ret = nouveau_ramht_new(dev, priv->ramht, &dev_priv->ramht);
+	if (ret)
 		return ret;
-	}
 
 	return 0;
 }
@@ -74,13 +60,18 @@ void
 nv04_instmem_takedown(struct drm_device *dev)
 {
 	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_instmem_priv *priv = dev_priv->engine.instmem.priv;
 
 	nouveau_ramht_ref(NULL, &dev_priv->ramht, NULL);
-	nouveau_gpuobj_ref(NULL, &dev_priv->ramro);
-	nouveau_gpuobj_ref(NULL, &dev_priv->ramfc);
+	nouveau_gpuobj_ref(NULL, &priv->ramfc);
+	nouveau_gpuobj_ref(NULL, &priv->ramro);
+	nouveau_gpuobj_ref(NULL, &priv->ramht);
 
 	if (drm_mm_initialized(&dev_priv->ramin_heap))
 		drm_mm_takedown(&dev_priv->ramin_heap);
+
+	kfree(priv);
+	dev_priv->engine.instmem.priv = NULL;
 }
 
 int