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authorMichal Kazior <michal.kazior@tieto.com>2014-10-20 14:14:37 +0200
committerKalle Valo <kvalo@qca.qualcomm.com>2014-10-23 16:35:25 +0300
commita428249da9f9ef169d09d1a637d19a27991122da (patch)
tree0271d96532ac38c83da02504f98b4de0e17e2585 /drivers/net/wireless/ath/ath10k/pci.c
parent7d9d5587c2e385b7a6c86547618e8adb87171e42 (diff)
ath10k: re-disable interrupts after target init
If MSI isn't configured device ROM program expects legacy interrupts to be enabled before it can fully boot. Don't forget to disable legacy interrupts after that. While at it re-use the legacy irq enabling helper instead of calling ath10k_pci_write32(). Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.c')
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index 86f734e74103..9d700d1530d2 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2279,14 +2279,13 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
if (ar_pci->num_msi_intrs == 0)
/* Fix potential race by repeating CORE_BASE writes */
- ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS +
- PCIE_INTR_ENABLE_ADDRESS,
- PCIE_INTR_FIRMWARE_MASK |
- PCIE_INTR_CE_MASK_ALL);
+ ath10k_pci_enable_legacy_irq(ar);
mdelay(10);
} while (time_before(jiffies, timeout));
+ ath10k_pci_disable_and_clear_legacy_irq(ar);
+
if (val == 0xffffffff) {
ath10k_err(ar, "failed to read device register, device is gone\n");
return -EIO;