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-rw-r--r--arch/arm/mach-exynos/headsmp.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index b54f9701e421..45b3006e4e58 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -11,6 +11,7 @@
*/
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/assembler.h>
/*
* exynos4 specific entry point for secondary CPUs. This provides
@@ -18,6 +19,11 @@
* ready for them to initialise.
*/
ENTRY(exynos4_secondary_startup)
+ /*
+ * ROM code operates in little endian mode, when we get control we
+ * need to switch it to big endian mode.
+ */
+ARM_BE8(setend be)
mrc p15, 0, r0, c0, c0, 5
and r0, r0, #15
adr r4, 1f