diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4940 |
1 files changed, 2030 insertions, 2910 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index cc9bd106a854..0d91dec5b4bc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1,7 +1,7 @@ /* * Hardware modules present on the OMAP44xx chips * - * Copyright (C) 2009-2011 Texas Instruments, Inc. + * Copyright (C) 2009-2012 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley @@ -44,38 +44,10 @@ #define OMAP44XX_IRQ_GIC_START 32 /* Base offset for all OMAP4 dma requests */ -#define OMAP44XX_DMA_REQ_START 1 - -/* Backward references (IPs with Bus Master capability) */ -static struct omap_hwmod omap44xx_aess_hwmod; -static struct omap_hwmod omap44xx_dma_system_hwmod; -static struct omap_hwmod omap44xx_dmm_hwmod; -static struct omap_hwmod omap44xx_dsp_hwmod; -static struct omap_hwmod omap44xx_dss_hwmod; -static struct omap_hwmod omap44xx_emif_fw_hwmod; -static struct omap_hwmod omap44xx_hsi_hwmod; -static struct omap_hwmod omap44xx_ipu_hwmod; -static struct omap_hwmod omap44xx_iss_hwmod; -static struct omap_hwmod omap44xx_iva_hwmod; -static struct omap_hwmod omap44xx_l3_instr_hwmod; -static struct omap_hwmod omap44xx_l3_main_1_hwmod; -static struct omap_hwmod omap44xx_l3_main_2_hwmod; -static struct omap_hwmod omap44xx_l3_main_3_hwmod; -static struct omap_hwmod omap44xx_l4_abe_hwmod; -static struct omap_hwmod omap44xx_l4_cfg_hwmod; -static struct omap_hwmod omap44xx_l4_per_hwmod; -static struct omap_hwmod omap44xx_l4_wkup_hwmod; -static struct omap_hwmod omap44xx_mmc1_hwmod; -static struct omap_hwmod omap44xx_mmc2_hwmod; -static struct omap_hwmod omap44xx_mpu_hwmod; -static struct omap_hwmod omap44xx_mpu_private_hwmod; -static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; -static struct omap_hwmod omap44xx_usb_host_hs_hwmod; -static struct omap_hwmod omap44xx_usb_tll_hs_hwmod; +#define OMAP44XX_DMA_REQ_START 1 /* - * Interconnects omap_hwmod structures - * hwmods that compose the global OMAP interconnect + * IP blocks */ /* @@ -92,51 +64,17 @@ static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { { .irq = -1 } }; -/* l3_main_1 -> dmm */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_dmm_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { - { - .pa_start = 0x4e000000, - .pa_end = 0x4e0007ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* mpu -> dmm */ -static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_dmm_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dmm_addrs, - .user = OCP_USER_MPU, -}; - -/* dmm slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { - &omap44xx_l3_main_1__dmm, - &omap44xx_mpu__dmm, -}; - static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, .clkdm_name = "l3_emif_clkdm", + .mpu_irqs = omap44xx_dmm_irqs, .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_dmm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), - .mpu_irqs = omap44xx_dmm_irqs, }; /* @@ -148,38 +86,6 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = { }; /* emif_fw */ -/* dmm -> emif_fw */ -static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { - .master = &omap44xx_dmm_hwmod, - .slave = &omap44xx_emif_fw_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { - { - .pa_start = 0x4a20c000, - .pa_end = 0x4a20c0ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> emif_fw */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_emif_fw_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_emif_fw_addrs, - .user = OCP_USER_MPU, -}; - -/* emif_fw slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = { - &omap44xx_dmm__emif_fw, - &omap44xx_l4_cfg__emif_fw, -}; - static struct omap_hwmod omap44xx_emif_fw_hwmod = { .name = "emif_fw", .class = &omap44xx_emif_fw_hwmod_class, @@ -190,8 +96,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_emif_fw_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), }; /* @@ -203,28 +107,6 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = { }; /* l3_instr */ -/* iva -> l3_instr */ -static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { - .master = &omap44xx_iva_hwmod, - .slave = &omap44xx_l3_instr_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_main_3 -> l3_instr */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = { - .master = &omap44xx_l3_main_3_hwmod, - .slave = &omap44xx_l3_instr_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_instr slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = { - &omap44xx_iva__l3_instr, - &omap44xx_l3_main_3__l3_instr, -}; - static struct omap_hwmod omap44xx_l3_instr_hwmod = { .name = "l3_instr", .class = &omap44xx_l3_hwmod_class, @@ -236,8 +118,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_l3_instr_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), }; /* l3_main_1 */ @@ -247,83 +127,6 @@ static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { { .irq = -1 } }; -/* dsp -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { - .master = &omap44xx_dsp_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* dss -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = { - .master = &omap44xx_dss_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_main_2 -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_cfg -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l4_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc1 -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_mmc1__l3_main_1 = { - .master = &omap44xx_mmc1_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc2 -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { - .master = &omap44xx_mmc2_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { - { - .pa_start = 0x44000000, - .pa_end = 0x44000fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* mpu -> l3_main_1 */ -static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_1_addrs, - .user = OCP_USER_MPU, -}; - -/* l3_main_1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { - &omap44xx_dsp__l3_main_1, - &omap44xx_dss__l3_main_1, - &omap44xx_l3_main_2__l3_main_1, - &omap44xx_l4_cfg__l3_main_1, - &omap44xx_mmc1__l3_main_1, - &omap44xx_mmc2__l3_main_1, - &omap44xx_mpu__l3_main_1, -}; - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, @@ -335,97 +138,9 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), }; /* l3_main_2 */ -/* dma_system -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { - .master = &omap44xx_dma_system_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* hsi -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = { - .master = &omap44xx_hsi_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* ipu -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_ipu__l3_main_2 = { - .master = &omap44xx_ipu_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* iss -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = { - .master = &omap44xx_iss_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* iva -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = { - .master = &omap44xx_iva_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { - { - .pa_start = 0x44800000, - .pa_end = 0x44801fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_1 -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_2_addrs, - .user = OCP_USER_MPU, -}; - -/* l4_cfg -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l4_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* usb_otg_hs -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = { - .master = &omap44xx_usb_otg_hs_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_main_2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { - &omap44xx_dma_system__l3_main_2, - &omap44xx_hsi__l3_main_2, - &omap44xx_ipu__l3_main_2, - &omap44xx_iss__l3_main_2, - &omap44xx_iva__l3_main_2, - &omap44xx_l3_main_1__l3_main_2, - &omap44xx_l4_cfg__l3_main_2, - &omap44xx_usb_otg_hs__l3_main_2, -}; - static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .name = "l3_main_2", .class = &omap44xx_l3_hwmod_class, @@ -436,52 +151,9 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_l3_main_2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), }; /* l3_main_3 */ -static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { - { - .pa_start = 0x45000000, - .pa_end = 0x45000fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_1 -> l3_main_3 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l3_main_3_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_3_addrs, - .user = OCP_USER_MPU, -}; - -/* l3_main_2 -> l3_main_3 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_l3_main_3_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_cfg -> l3_main_3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_l3_main_3_hwmod, - .clk = "l4_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_main_3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = { - &omap44xx_l3_main_1__l3_main_3, - &omap44xx_l3_main_2__l3_main_3, - &omap44xx_l4_cfg__l3_main_3, -}; - static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .name = "l3_main_3", .class = &omap44xx_l3_hwmod_class, @@ -493,8 +165,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_l3_main_3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), }; /* @@ -506,46 +176,6 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { }; /* l4_abe */ -/* aess -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { - .master = &omap44xx_aess_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* dsp -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = { - .master = &omap44xx_dsp_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3_main_1 -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_abe slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = { - &omap44xx_aess__l4_abe, - &omap44xx_dsp__l4_abe, - &omap44xx_l3_main_1__l4_abe, - &omap44xx_mpu__l4_abe, -}; - static struct omap_hwmod omap44xx_l4_abe_hwmod = { .name = "l4_abe", .class = &omap44xx_l4_hwmod_class, @@ -555,24 +185,9 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, }, }, - .slaves = omap44xx_l4_abe_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), }; /* l4_cfg */ -/* l3_main_1 -> l4_cfg */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l4_cfg_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_cfg slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = { - &omap44xx_l3_main_1__l4_cfg, -}; - static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", .class = &omap44xx_l4_hwmod_class, @@ -583,24 +198,9 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_l4_cfg_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), }; /* l4_per */ -/* l3_main_2 -> l4_per */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_l4_per_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = { - &omap44xx_l3_main_2__l4_per, -}; - static struct omap_hwmod omap44xx_l4_per_hwmod = { .name = "l4_per", .class = &omap44xx_l4_hwmod_class, @@ -611,24 +211,9 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_l4_per_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), }; /* l4_wkup */ -/* l4_cfg -> l4_wkup */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_l4_wkup_hwmod, - .clk = "l4_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_wkup slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = { - &omap44xx_l4_cfg__l4_wkup, -}; - static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .name = "l4_wkup", .class = &omap44xx_l4_hwmod_class, @@ -639,8 +224,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_l4_wkup_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), }; /* @@ -652,25 +235,10 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = { }; /* mpu_private */ -/* mpu -> mpu_private */ -static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_mpu_private_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu_private slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = { - &omap44xx_mpu__mpu_private, -}; - static struct omap_hwmod omap44xx_mpu_private_hwmod = { .name = "mpu_private", .class = &omap44xx_mpu_bus_hwmod_class, .clkdm_name = "mpuss_clkdm", - .slaves = omap44xx_mpu_private_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), }; /* @@ -756,53 +324,6 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { { .dma_req = -1 } }; -/* aess master ports */ -static struct omap_hwmod_ocp_if *omap44xx_aess_masters[] = { - &omap44xx_aess__l4_abe, -}; - -static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { - { - .pa_start = 0x401f1000, - .pa_end = 0x401f13ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> aess */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_aess_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_aess_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { - { - .pa_start = 0x490f1000, - .pa_end = 0x490f13ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> aess (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_aess_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_aess_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* aess slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = { - &omap44xx_l4_abe__aess, - &omap44xx_l4_abe__aess_dma, -}; - static struct omap_hwmod omap44xx_aess_hwmod = { .name = "aess", .class = &omap44xx_aess_hwmod_class, @@ -817,37 +338,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_aess_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_aess_slaves), - .masters = omap44xx_aess_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_aess_masters), -}; - -/* - * 'bandgap' class - * bangap reference for ldo regulators - */ - -static struct omap_hwmod_class omap44xx_bandgap_hwmod_class = { - .name = "bandgap", -}; - -/* bandgap */ -static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { - { .role = "fclk", .clk = "bandgap_fclk" }, -}; - -static struct omap_hwmod omap44xx_bandgap_hwmod = { - .name = "bandgap", - .class = &omap44xx_bandgap_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, - }, - }, - .opt_clks = bandgap_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(bandgap_opt_clks), }; /* @@ -870,30 +360,6 @@ static struct omap_hwmod_class omap44xx_counter_hwmod_class = { }; /* counter_32k */ -static struct omap_hwmod omap44xx_counter_32k_hwmod; -static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { - { - .pa_start = 0x4a304000, - .pa_end = 0x4a30401f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_counter_32k_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_counter_32k_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* counter_32k slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = { - &omap44xx_l4_wkup__counter_32k, -}; - static struct omap_hwmod omap44xx_counter_32k_hwmod = { .name = "counter_32k", .class = &omap44xx_counter_hwmod_class, @@ -906,8 +372,6 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_counter_32k_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_counter_32k_slaves), }; /* @@ -950,34 +414,6 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { { .irq = -1 } }; -/* dma_system master ports */ -static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = { - &omap44xx_dma_system__l3_main_2, -}; - -static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { - { - .pa_start = 0x4a056000, - .pa_end = 0x4a056fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> dma_system */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_dma_system_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dma_system_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* dma_system slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = { - &omap44xx_l4_cfg__dma_system, -}; - static struct omap_hwmod omap44xx_dma_system_hwmod = { .name = "dma_system", .class = &omap44xx_dma_hwmod_class, @@ -991,10 +427,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { }, }, .dev_attr = &dma_dev_attr, - .slaves = omap44xx_dma_system_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves), - .masters = omap44xx_dma_system_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters), }; /* @@ -1018,7 +450,6 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { }; /* dmic */ -static struct omap_hwmod omap44xx_dmic_hwmod; static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { { .irq = 114 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -1029,50 +460,6 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { - { - .name = "mpu", - .pa_start = 0x4012e000, - .pa_end = 0x4012e07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> dmic */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_dmic_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_dmic_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { - { - .name = "dma", - .pa_start = 0x4902e000, - .pa_end = 0x4902e07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> dmic (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_dmic_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_dmic_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* dmic slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = { - &omap44xx_l4_abe__dmic, - &omap44xx_l4_abe__dmic_dma, -}; - static struct omap_hwmod omap44xx_dmic_hwmod = { .name = "dmic", .class = &omap44xx_dmic_hwmod_class, @@ -1087,8 +474,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_dmic_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmic_slaves), }; /* @@ -1107,53 +492,8 @@ static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { }; static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { - { .name = "mmu_cache", .rst_shift = 1 }, -}; - -static struct omap_hwmod_rst_info omap44xx_dsp_c0_resets[] = { { .name = "dsp", .rst_shift = 0 }, -}; - -/* dsp -> iva */ -static struct omap_hwmod_ocp_if omap44xx_dsp__iva = { - .master = &omap44xx_dsp_hwmod, - .slave = &omap44xx_iva_hwmod, - .clk = "dpll_iva_m5x2_ck", -}; - -/* dsp master ports */ -static struct omap_hwmod_ocp_if *omap44xx_dsp_masters[] = { - &omap44xx_dsp__l3_main_1, - &omap44xx_dsp__l4_abe, - &omap44xx_dsp__iva, -}; - -/* l4_cfg -> dsp */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_dsp_hwmod, - .clk = "l4_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* dsp slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = { - &omap44xx_l4_cfg__dsp, -}; - -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod omap44xx_dsp_c0_hwmod = { - .name = "dsp_c0", - .class = &omap44xx_dsp_hwmod_class, - .clkdm_name = "tesla_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_dsp_c0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), - .prcm = { - .omap4 = { - .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, - }, - }, + { .name = "mmu_cache", .rst_shift = 1 }, }; static struct omap_hwmod omap44xx_dsp_hwmod = { @@ -1172,10 +512,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_dsp_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dsp_slaves), - .masters = omap44xx_dsp_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_dsp_masters), }; /* @@ -1196,53 +532,6 @@ static struct omap_hwmod_class omap44xx_dss_hwmod_class = { }; /* dss */ -/* dss master ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = { - &omap44xx_dss__l3_main_1, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { - { - .pa_start = 0x58000000, - .pa_end = 0x5800007f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { - { - .pa_start = 0x48040000, - .pa_end = 0x4804007f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_addrs, - .user = OCP_USER_MPU, -}; - -/* dss slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = { - &omap44xx_l3_main_2__dss, - &omap44xx_l4_per__dss, -}; - static struct omap_hwmod_opt_clk dss_opt_clks[] = { { .role = "sys_clk", .clk = "dss_sys_clk" }, { .role = "tv_clk", .clk = "dss_tv_clk" }, @@ -1263,10 +552,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = { }, .opt_clks = dss_opt_clks, .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), - .slaves = omap44xx_dss_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves), - .masters = omap44xx_dss_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters), }; /* @@ -1293,7 +578,6 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { }; /* dss_dispc */ -static struct omap_hwmod omap44xx_dss_dispc_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { { .irq = 25 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -1304,53 +588,11 @@ static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { - { - .pa_start = 0x58001000, - .pa_end = 0x58001fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_dispc */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dispc_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_dispc_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { - { - .pa_start = 0x48041000, - .pa_end = 0x48041fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = { .manager_count = 3, .has_framedonetv_irq = 1 }; -/* l4_per -> dss_dispc */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_dispc_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dispc_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_dispc slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { - &omap44xx_l3_main_2__dss_dispc, - &omap44xx_l4_per__dss_dispc, -}; - static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, @@ -1364,8 +606,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_dss_dispc_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), .dev_attr = &omap44xx_dss_dispc_dev_attr }; @@ -1391,7 +631,6 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { }; /* dss_dsi1 */ -static struct omap_hwmod omap44xx_dss_dsi1_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { { .irq = 53 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -1402,48 +641,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { - { - .pa_start = 0x58004000, - .pa_end = 0x580041ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_dsi1 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_dsi1_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { - { - .pa_start = 0x48044000, - .pa_end = 0x480441ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss_dsi1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dsi1_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_dsi1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { - &omap44xx_l3_main_2__dss_dsi1, - &omap44xx_l4_per__dss_dsi1, -}; - static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { { .role = "sys_clk", .clk = "dss_sys_clk" }, }; @@ -1463,12 +660,9 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { }, .opt_clks = dss_dsi1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), - .slaves = omap44xx_dss_dsi1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), }; /* dss_dsi2 */ -static struct omap_hwmod omap44xx_dss_dsi2_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { { .irq = 84 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -1479,48 +673,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { - { - .pa_start = 0x58005000, - .pa_end = 0x580051ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_dsi2 */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_dsi2_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { - { - .pa_start = 0x48045000, - .pa_end = 0x480451ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss_dsi2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dsi2_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_dsi2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { - &omap44xx_l3_main_2__dss_dsi2, - &omap44xx_l4_per__dss_dsi2, -}; - static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { { .role = "sys_clk", .clk = "dss_sys_clk" }, }; @@ -1540,8 +692,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { }, .opt_clks = dss_dsi2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), - .slaves = omap44xx_dss_dsi2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), }; /* @@ -1565,7 +715,6 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { }; /* dss_hdmi */ -static struct omap_hwmod omap44xx_dss_hdmi_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { { .irq = 101 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -1576,48 +725,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { - { - .pa_start = 0x58006000, - .pa_end = 0x58006fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_hdmi */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_hdmi_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { - { - .pa_start = 0x48046000, - .pa_end = 0x48046fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss_hdmi */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_hdmi_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_hdmi slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { - &omap44xx_l3_main_2__dss_hdmi, - &omap44xx_l4_per__dss_hdmi, -}; - static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { { .role = "sys_clk", .clk = "dss_sys_clk" }, }; @@ -1637,8 +744,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { }, .opt_clks = dss_hdmi_opt_clks, .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), - .slaves = omap44xx_dss_hdmi_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), }; /* @@ -1662,54 +767,11 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { }; /* dss_rfbi */ -static struct omap_hwmod omap44xx_dss_rfbi_hwmod; static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { - { - .pa_start = 0x58002000, - .pa_end = 0x580020ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_rfbi */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_rfbi_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { - { - .pa_start = 0x48042000, - .pa_end = 0x480420ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss_rfbi */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_rfbi_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_rfbi slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { - &omap44xx_l3_main_2__dss_rfbi, - &omap44xx_l4_per__dss_rfbi, -}; - static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { { .role = "ick", .clk = "dss_fck" }, }; @@ -1728,8 +790,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { }, .opt_clks = dss_rfbi_opt_clks, .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), - .slaves = omap44xx_dss_rfbi_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), }; /* @@ -1742,49 +802,6 @@ static struct omap_hwmod_class omap44xx_venc_hwmod_class = { }; /* dss_venc */ -static struct omap_hwmod omap44xx_dss_venc_hwmod; -static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { - { - .pa_start = 0x58003000, - .pa_end = 0x580030ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> dss_venc */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_venc_hwmod, - .clk = "dss_fck", - .addr = omap44xx_dss_venc_dma_addrs, - .user = OCP_USER_SDMA, -}; - -static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { - { - .pa_start = 0x48043000, - .pa_end = 0x480430ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> dss_venc */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_dss_venc_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_venc_addrs, - .user = OCP_USER_MPU, -}; - -/* dss_venc slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { - &omap44xx_l3_main_2__dss_venc, - &omap44xx_l4_per__dss_venc, -}; - static struct omap_hwmod omap44xx_dss_venc_hwmod = { .name = "dss_venc", .class = &omap44xx_venc_hwmod_class, @@ -1796,8 +813,6 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_dss_venc_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves), }; /* @@ -1830,35 +845,11 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { }; /* gpio1 */ -static struct omap_hwmod omap44xx_gpio1_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { { .irq = 29 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { - { - .pa_start = 0x4a310000, - .pa_end = 0x4a3101ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_wkup -> gpio1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_gpio1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_gpio1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = { - &omap44xx_l4_wkup__gpio1, -}; - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { { .role = "dbclk", .clk = "gpio1_dbclk" }, }; @@ -1879,40 +870,14 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio1_slaves), }; /* gpio2 */ -static struct omap_hwmod omap44xx_gpio2_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { { .irq = 30 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { - { - .pa_start = 0x48055000, - .pa_end = 0x480551ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> gpio2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_gpio2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[] = { - &omap44xx_l4_per__gpio2, -}; - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { { .role = "dbclk", .clk = "gpio2_dbclk" }, }; @@ -1934,40 +899,14 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio2_slaves), }; /* gpio3 */ -static struct omap_hwmod omap44xx_gpio3_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { { .irq = 31 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { - { - .pa_start = 0x48057000, - .pa_end = 0x480571ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> gpio3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_gpio3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio3_slaves[] = { - &omap44xx_l4_per__gpio3, -}; - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { { .role = "dbclk", .clk = "gpio3_dbclk" }, }; @@ -1989,40 +928,14 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio3_slaves), }; /* gpio4 */ -static struct omap_hwmod omap44xx_gpio4_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { { .irq = 32 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { - { - .pa_start = 0x48059000, - .pa_end = 0x480591ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> gpio4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_gpio4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio4_slaves[] = { - &omap44xx_l4_per__gpio4, -}; - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { { .role = "dbclk", .clk = "gpio4_dbclk" }, }; @@ -2044,40 +957,14 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio4_slaves), }; /* gpio5 */ -static struct omap_hwmod omap44xx_gpio5_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { { .irq = 33 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { - { - .pa_start = 0x4805b000, - .pa_end = 0x4805b1ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> gpio5 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_gpio5_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio5_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio5 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio5_slaves[] = { - &omap44xx_l4_per__gpio5, -}; - static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { { .role = "dbclk", .clk = "gpio5_dbclk" }, }; @@ -2099,40 +986,14 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .opt_clks = gpio5_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio5_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio5_slaves), }; /* gpio6 */ -static struct omap_hwmod omap44xx_gpio6_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { { .irq = 34 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { - { - .pa_start = 0x4805d000, - .pa_end = 0x4805d1ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> gpio6 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_gpio6_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio6_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gpio6 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_gpio6_slaves[] = { - &omap44xx_l4_per__gpio6, -}; - static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { { .role = "dbclk", .clk = "gpio6_dbclk" }, }; @@ -2154,8 +1015,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .opt_clks = gpio6_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), .dev_attr = &gpio_dev_attr, - .slaves = omap44xx_gpio6_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves), }; /* @@ -2190,34 +1049,6 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { { .irq = -1 } }; -/* hsi master ports */ -static struct omap_hwmod_ocp_if *omap44xx_hsi_masters[] = { - &omap44xx_hsi__l3_main_2, -}; - -static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { - { - .pa_start = 0x4a058000, - .pa_end = 0x4a05bfff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> hsi */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_hsi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_hsi_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* hsi slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = { - &omap44xx_l4_cfg__hsi, -}; - static struct omap_hwmod omap44xx_hsi_hwmod = { .name = "hsi", .class = &omap44xx_hsi_hwmod_class, @@ -2231,10 +1062,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_hsi_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_hsi_slaves), - .masters = omap44xx_hsi_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_hsi_masters), }; /* @@ -2266,7 +1093,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { }; /* i2c1 */ -static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { { .irq = 56 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -2278,29 +1104,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x480700ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> i2c1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_i2c1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* i2c1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { - &omap44xx_l4_per__i2c1, -}; - static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, @@ -2316,13 +1119,10 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_i2c1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), .dev_attr = &i2c_dev_attr, }; /* i2c2 */ -static struct omap_hwmod omap44xx_i2c2_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { { .irq = 57 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -2334,29 +1134,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x480720ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> i2c2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_i2c2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* i2c2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { - &omap44xx_l4_per__i2c2, -}; - static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, @@ -2372,13 +1149,10 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_i2c2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), .dev_attr = &i2c_dev_attr, }; /* i2c3 */ -static struct omap_hwmod omap44xx_i2c3_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { { .irq = 61 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -2390,29 +1164,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { - { - .pa_start = 0x48060000, - .pa_end = 0x480600ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> i2c3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_i2c3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* i2c3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { - &omap44xx_l4_per__i2c3, -}; - static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, @@ -2428,13 +1179,10 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_i2c3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), .dev_attr = &i2c_dev_attr, }; /* i2c4 */ -static struct omap_hwmod omap44xx_i2c4_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { { .irq = 62 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -2446,29 +1194,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { - { - .pa_start = 0x48350000, - .pa_end = 0x483500ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> i2c4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_i2c4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* i2c4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { - &omap44xx_l4_per__i2c4, -}; - static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, @@ -2484,8 +1209,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_i2c4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), .dev_attr = &i2c_dev_attr, }; @@ -2504,66 +1227,12 @@ static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { +static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = { { .name = "cpu0", .rst_shift = 0 }, -}; - -static struct omap_hwmod_rst_info omap44xx_ipu_c1_resets[] = { { .name = "cpu1", .rst_shift = 1 }, -}; - -static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = { { .name = "mmu_cache", .rst_shift = 2 }, }; -/* ipu master ports */ -static struct omap_hwmod_ocp_if *omap44xx_ipu_masters[] = { - &omap44xx_ipu__l3_main_2, -}; - -/* l3_main_2 -> ipu */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_ipu_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* ipu slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = { - &omap44xx_l3_main_2__ipu, -}; - -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod omap44xx_ipu_c0_hwmod = { - .name = "ipu_c0", - .class = &omap44xx_ipu_hwmod_class, - .clkdm_name = "ducati_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), - .prcm = { - .omap4 = { - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - }, - }, -}; - -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod omap44xx_ipu_c1_hwmod = { - .name = "ipu_c1", - .class = &omap44xx_ipu_hwmod_class, - .clkdm_name = "ducati_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c1_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), - .prcm = { - .omap4 = { - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - }, - }, -}; - static struct omap_hwmod omap44xx_ipu_hwmod = { .name = "ipu", .class = &omap44xx_ipu_hwmod_class, @@ -2580,10 +1249,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_ipu_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_ipu_slaves), - .masters = omap44xx_ipu_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_ipu_masters), }; /* @@ -2594,6 +1259,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, + /* + * ISS needs 100 OCP clk cycles delay after a softreset before + * accessing sysconfig again. + * The lowest frequency at the moment for L3 bus is 100 MHz, so + * 1usec delay is needed. Add an x2 margin to be safe (2 usecs). + * + * TODO: Indicate errata when available. + */ + .srst_udelay = 2, .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | @@ -2621,34 +1295,6 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { { .dma_req = -1 } }; -/* iss master ports */ -static struct omap_hwmod_ocp_if *omap44xx_iss_masters[] = { - &omap44xx_iss__l3_main_2, -}; - -static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { - { - .pa_start = 0x52000000, - .pa_end = 0x520000ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> iss */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_iss_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_iss_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* iss slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_iss_slaves[] = { - &omap44xx_l3_main_2__iss, -}; - static struct omap_hwmod_opt_clk iss_opt_clks[] = { { .role = "ctrlclk", .clk = "iss_ctrlclk" }, }; @@ -2669,10 +1315,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { }, .opt_clks = iss_opt_clks, .opt_clks_cnt = ARRAY_SIZE(iss_opt_clks), - .slaves = omap44xx_iss_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_iss_slaves), - .masters = omap44xx_iss_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_iss_masters), }; /* @@ -2693,75 +1335,9 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { }; static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { - { .name = "logic", .rst_shift = 2 }, -}; - -static struct omap_hwmod_rst_info omap44xx_iva_seq0_resets[] = { { .name = "seq0", .rst_shift = 0 }, -}; - -static struct omap_hwmod_rst_info omap44xx_iva_seq1_resets[] = { { .name = "seq1", .rst_shift = 1 }, -}; - -/* iva master ports */ -static struct omap_hwmod_ocp_if *omap44xx_iva_masters[] = { - &omap44xx_iva__l3_main_2, - &omap44xx_iva__l3_instr, -}; - -static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { - { - .pa_start = 0x5a000000, - .pa_end = 0x5a07ffff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l3_main_2 -> iva */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_iva_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_iva_addrs, - .user = OCP_USER_MPU, -}; - -/* iva slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = { - &omap44xx_dsp__iva, - &omap44xx_l3_main_2__iva, -}; - -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod omap44xx_iva_seq0_hwmod = { - .name = "iva_seq0", - .class = &omap44xx_iva_hwmod_class, - .clkdm_name = "ivahd_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_iva_seq0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), - .prcm = { - .omap4 = { - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - }, - }, -}; - -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod omap44xx_iva_seq1_hwmod = { - .name = "iva_seq1", - .class = &omap44xx_iva_hwmod_class, - .clkdm_name = "ivahd_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_iva_seq1_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), - .prcm = { - .omap4 = { - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - }, - }, + { .name = "logic", .rst_shift = 2 }, }; static struct omap_hwmod omap44xx_iva_hwmod = { @@ -2780,10 +1356,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .slaves = omap44xx_iva_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_iva_slaves), - .masters = omap44xx_iva_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_iva_masters), }; /* @@ -2809,35 +1381,11 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { }; /* kbd */ -static struct omap_hwmod omap44xx_kbd_hwmod; static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { { .irq = 120 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { - { - .pa_start = 0x4a31c000, - .pa_end = 0x4a31c07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_wkup -> kbd */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_kbd_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_kbd_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* kbd slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = { - &omap44xx_l4_wkup__kbd, -}; - static struct omap_hwmod omap44xx_kbd_hwmod = { .name = "kbd", .class = &omap44xx_kbd_hwmod_class, @@ -2851,8 +1399,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_kbd_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_kbd_slaves), }; /* @@ -2876,35 +1422,11 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { }; /* mailbox */ -static struct omap_hwmod omap44xx_mailbox_hwmod; static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { { .irq = 26 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { - { - .pa_start = 0x4a0f4000, - .pa_end = 0x4a0f41ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> mailbox */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_mailbox_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mailbox_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mailbox slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = { - &omap44xx_l4_cfg__mailbox, -}; - static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, @@ -2916,8 +1438,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_mailbox_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves), }; /* @@ -2940,7 +1460,6 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { }; /* mcbsp1 */ -static struct omap_hwmod omap44xx_mcbsp1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { { .irq = 17 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -2952,50 +1471,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x40122000, - .pa_end = 0x401220ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp1_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp1_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { - { - .name = "dma", - .pa_start = 0x49022000, - .pa_end = 0x490220ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp1 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp1_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp1_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* mcbsp1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { - &omap44xx_l4_abe__mcbsp1, - &omap44xx_l4_abe__mcbsp1_dma, -}; - static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, @@ -3015,14 +1490,11 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mcbsp1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), .opt_clks = mcbsp1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks), }; /* mcbsp2 */ -static struct omap_hwmod omap44xx_mcbsp2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { { .irq = 22 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3034,50 +1506,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x40124000, - .pa_end = 0x401240ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp2_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp2_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { - { - .name = "dma", - .pa_start = 0x49024000, - .pa_end = 0x490240ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp2 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp2_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp2_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* mcbsp2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { - &omap44xx_l4_abe__mcbsp2, - &omap44xx_l4_abe__mcbsp2_dma, -}; - static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, @@ -3097,14 +1525,11 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mcbsp2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), .opt_clks = mcbsp2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks), }; /* mcbsp3 */ -static struct omap_hwmod omap44xx_mcbsp3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { { .irq = 23 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3116,50 +1541,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { - { - .name = "mpu", - .pa_start = 0x40126000, - .pa_end = 0x401260ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp3_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { - { - .name = "dma", - .pa_start = 0x49026000, - .pa_end = 0x490260ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcbsp3 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp3_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* mcbsp3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { - &omap44xx_l4_abe__mcbsp3, - &omap44xx_l4_abe__mcbsp3_dma, -}; - static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, @@ -3179,14 +1560,11 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mcbsp3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), .opt_clks = mcbsp3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks), }; /* mcbsp4 */ -static struct omap_hwmod omap44xx_mcbsp4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { { .irq = 16 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3198,29 +1576,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { - { - .pa_start = 0x48096000, - .pa_end = 0x480960ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mcbsp4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mcbsp4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcbsp4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mcbsp4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { - &omap44xx_l4_per__mcbsp4, -}; - static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, @@ -3240,8 +1595,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mcbsp4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), .opt_clks = mcbsp4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks), }; @@ -3268,7 +1621,6 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { }; /* mcpdm */ -static struct omap_hwmod omap44xx_mcpdm_hwmod; static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { { .irq = 112 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3280,48 +1632,6 @@ static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { - { - .pa_start = 0x40132000, - .pa_end = 0x4013207f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcpdm */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcpdm_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcpdm_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { - { - .pa_start = 0x49032000, - .pa_end = 0x4903207f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> mcpdm (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcpdm_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcpdm_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* mcpdm slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = { - &omap44xx_l4_abe__mcpdm, - &omap44xx_l4_abe__mcpdm_dma, -}; - static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, @@ -3336,8 +1646,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mcpdm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcpdm_slaves), }; /* @@ -3363,7 +1671,6 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { }; /* mcspi1 */ -static struct omap_hwmod omap44xx_mcspi1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { { .irq = 65 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3381,29 +1688,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480981ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mcspi1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mcspi1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mcspi1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcspi1_slaves[] = { - &omap44xx_l4_per__mcspi1, -}; - /* mcspi1 dev_attr */ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = { .num_chipselect = 4, @@ -3424,12 +1708,9 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { }, }, .dev_attr = &mcspi1_dev_attr, - .slaves = omap44xx_mcspi1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi1_slaves), }; /* mcspi2 */ -static struct omap_hwmod omap44xx_mcspi2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { { .irq = 66 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3443,29 +1724,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a1ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mcspi2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mcspi2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mcspi2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcspi2_slaves[] = { - &omap44xx_l4_per__mcspi2, -}; - /* mcspi2 dev_attr */ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = { .num_chipselect = 2, @@ -3486,12 +1744,9 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { }, }, .dev_attr = &mcspi2_dev_attr, - .slaves = omap44xx_mcspi2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi2_slaves), }; /* mcspi3 */ -static struct omap_hwmod omap44xx_mcspi3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { { .irq = 91 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3505,29 +1760,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b81ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mcspi3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mcspi3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mcspi3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcspi3_slaves[] = { - &omap44xx_l4_per__mcspi3, -}; - /* mcspi3 dev_attr */ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = { .num_chipselect = 2, @@ -3548,12 +1780,9 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { }, }, .dev_attr = &mcspi3_dev_attr, - .slaves = omap44xx_mcspi3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi3_slaves), }; /* mcspi4 */ -static struct omap_hwmod omap44xx_mcspi4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { { .irq = 48 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3565,29 +1794,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { - { - .pa_start = 0x480ba000, - .pa_end = 0x480ba1ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mcspi4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mcspi4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mcspi4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mcspi4_slaves[] = { - &omap44xx_l4_per__mcspi4, -}; - /* mcspi4 dev_attr */ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = { .num_chipselect = 1, @@ -3608,8 +1814,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { }, }, .dev_attr = &mcspi4_dev_attr, - .slaves = omap44xx_mcspi4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi4_slaves), }; /* @@ -3646,34 +1850,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { { .dma_req = -1 } }; -/* mmc1 master ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc1_masters[] = { - &omap44xx_mmc1__l3_main_1, -}; - -static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c3ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mmc1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mmc1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc1_slaves[] = { - &omap44xx_l4_per__mmc1, -}; - /* mmc1 dev_attr */ static struct omap_mmc_dev_attr mmc1_dev_attr = { .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, @@ -3694,10 +1870,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { }, }, .dev_attr = &mmc1_dev_attr, - .slaves = omap44xx_mmc1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves), - .masters = omap44xx_mmc1_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters), }; /* mmc2 */ @@ -3712,34 +1884,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { { .dma_req = -1 } }; -/* mmc2 master ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc2_masters[] = { - &omap44xx_mmc2__l3_main_1, -}; - -static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b43ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mmc2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mmc2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = { - &omap44xx_l4_per__mmc2, -}; - static struct omap_hwmod omap44xx_mmc2_hwmod = { .name = "mmc2", .class = &omap44xx_mmc_hwmod_class, @@ -3754,14 +1898,9 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mmc2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves), - .masters = omap44xx_mmc2_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters), }; /* mmc3 */ -static struct omap_hwmod omap44xx_mmc3_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { { .irq = 94 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3773,29 +1912,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { - { - .pa_start = 0x480ad000, - .pa_end = 0x480ad3ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mmc3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mmc3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = { - &omap44xx_l4_per__mmc3, -}; - static struct omap_hwmod omap44xx_mmc3_hwmod = { .name = "mmc3", .class = &omap44xx_mmc_hwmod_class, @@ -3810,12 +1926,9 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mmc3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves), }; /* mmc4 */ -static struct omap_hwmod omap44xx_mmc4_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { { .irq = 96 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3827,35 +1940,11 @@ static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { - { - .pa_start = 0x480d1000, - .pa_end = 0x480d13ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mmc4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mmc4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = { - &omap44xx_l4_per__mmc4, -}; - static struct omap_hwmod omap44xx_mmc4_hwmod = { .name = "mmc4", .class = &omap44xx_mmc_hwmod_class, .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mmc4_irqs, - .sdma_reqs = omap44xx_mmc4_sdma_reqs, .main_clk = "mmc4_fck", .prcm = { @@ -3865,12 +1954,9 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mmc4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves), }; /* mmc5 */ -static struct omap_hwmod omap44xx_mmc5_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { { .irq = 59 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3882,29 +1968,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { - { - .pa_start = 0x480d5000, - .pa_end = 0x480d53ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> mmc5 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_mmc5_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc5_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mmc5 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = { - &omap44xx_l4_per__mmc5, -}; - static struct omap_hwmod omap44xx_mmc5_hwmod = { .name = "mmc5", .class = &omap44xx_mmc_hwmod_class, @@ -3919,8 +1982,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_mmc5_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves), }; /* @@ -3940,13 +2001,6 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { { .irq = -1 } }; -/* mpu master ports */ -static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { - &omap44xx_mpu__l3_main_1, - &omap44xx_mpu__l4_abe, - &omap44xx_mpu__dmm, -}; - static struct omap_hwmod omap44xx_mpu_hwmod = { .name = "mpu", .class = &omap44xx_mpu_hwmod_class, @@ -3960,8 +2014,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, }, }, - .masters = omap44xx_mpu_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_mpu_masters), }; /* @@ -3995,35 +2047,11 @@ static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = { .sensor_voltdm_name = "core", }; -static struct omap_hwmod omap44xx_smartreflex_core_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { { .irq = 19 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { - { - .pa_start = 0x4a0dd000, - .pa_end = 0x4a0dd03f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> smartreflex_core */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_smartreflex_core_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_core_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* smartreflex_core slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = { - &omap44xx_l4_cfg__smartreflex_core, -}; - static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .name = "smartreflex_core", .class = &omap44xx_smartreflex_hwmod_class, @@ -4038,8 +2066,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_smartreflex_core_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves), .dev_attr = &smartreflex_core_dev_attr, }; @@ -4048,35 +2074,11 @@ static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = { .sensor_voltdm_name = "iva", }; -static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { { .irq = 102 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { - { - .pa_start = 0x4a0db000, - .pa_end = 0x4a0db03f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> smartreflex_iva */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_smartreflex_iva_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_iva_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* smartreflex_iva slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = { - &omap44xx_l4_cfg__smartreflex_iva, -}; - static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .name = "smartreflex_iva", .class = &omap44xx_smartreflex_hwmod_class, @@ -4090,8 +2092,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_smartreflex_iva_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves), .dev_attr = &smartreflex_iva_dev_attr, }; @@ -4100,35 +2100,11 @@ static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = { .sensor_voltdm_name = "mpu", }; -static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { { .irq = 18 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { - { - .pa_start = 0x4a0d9000, - .pa_end = 0x4a0d903f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> smartreflex_mpu */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_smartreflex_mpu_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_mpu_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* smartreflex_mpu slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = { - &omap44xx_l4_cfg__smartreflex_mpu, -}; - static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .name = "smartreflex_mpu", .class = &omap44xx_smartreflex_hwmod_class, @@ -4142,8 +2118,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_smartreflex_mpu_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves), .dev_attr = &smartreflex_mpu_dev_attr, }; @@ -4171,30 +2145,6 @@ static struct omap_hwmod_class omap44xx_spinlock_hwmod_class = { }; /* spinlock */ -static struct omap_hwmod omap44xx_spinlock_hwmod; -static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { - { - .pa_start = 0x4a0f6000, - .pa_end = 0x4a0f6fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> spinlock */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_spinlock_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_spinlock_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* spinlock slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = { - &omap44xx_l4_cfg__spinlock, -}; - static struct omap_hwmod omap44xx_spinlock_hwmod = { .name = "spinlock", .class = &omap44xx_spinlock_hwmod_class, @@ -4205,8 +2155,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, }, }, - .slaves = omap44xx_spinlock_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_spinlock_slaves), }; /* @@ -4258,35 +2206,11 @@ static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { }; /* timer1 */ -static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { { .irq = 37 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { - { - .pa_start = 0x4a318000, - .pa_end = 0x4a31807f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_timer1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_timer1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = { - &omap44xx_l4_wkup__timer1, -}; - static struct omap_hwmod omap44xx_timer1_hwmod = { .name = "timer1", .class = &omap44xx_timer_1ms_hwmod_class, @@ -4301,40 +2225,14 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), }; /* timer2 */ -static struct omap_hwmod omap44xx_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { { .irq = 38 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { - { - .pa_start = 0x48032000, - .pa_end = 0x4803207f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = { - &omap44xx_l4_per__timer2, -}; - static struct omap_hwmod omap44xx_timer2_hwmod = { .name = "timer2", .class = &omap44xx_timer_1ms_hwmod_class, @@ -4349,40 +2247,14 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), }; /* timer3 */ -static struct omap_hwmod omap44xx_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { { .irq = 39 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { - { - .pa_start = 0x48034000, - .pa_end = 0x4803407f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = { - &omap44xx_l4_per__timer3, -}; - static struct omap_hwmod omap44xx_timer3_hwmod = { .name = "timer3", .class = &omap44xx_timer_hwmod_class, @@ -4397,40 +2269,14 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), }; /* timer4 */ -static struct omap_hwmod omap44xx_timer4_hwmod; static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { { .irq = 40 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { - { - .pa_start = 0x48036000, - .pa_end = 0x4803607f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = { - &omap44xx_l4_per__timer4, -}; - static struct omap_hwmod omap44xx_timer4_hwmod = { .name = "timer4", .class = &omap44xx_timer_hwmod_class, @@ -4445,59 +2291,14 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), }; /* timer5 */ -static struct omap_hwmod omap44xx_timer5_hwmod; static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { { .irq = 41 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { - { - .pa_start = 0x40138000, - .pa_end = 0x4013807f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer5 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer5_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer5_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { - { - .pa_start = 0x49038000, - .pa_end = 0x4903807f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer5 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer5_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer5_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* timer5 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = { - &omap44xx_l4_abe__timer5, - &omap44xx_l4_abe__timer5_dma, -}; - static struct omap_hwmod omap44xx_timer5_hwmod = { .name = "timer5", .class = &omap44xx_timer_hwmod_class, @@ -4512,59 +2313,14 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer5_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), }; /* timer6 */ -static struct omap_hwmod omap44xx_timer6_hwmod; static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { { .irq = 42 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { - { - .pa_start = 0x4013a000, - .pa_end = 0x4013a07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer6 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer6_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer6_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { - { - .pa_start = 0x4903a000, - .pa_end = 0x4903a07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer6 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer6_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer6_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* timer6 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = { - &omap44xx_l4_abe__timer6, - &omap44xx_l4_abe__timer6_dma, -}; - static struct omap_hwmod omap44xx_timer6_hwmod = { .name = "timer6", .class = &omap44xx_timer_hwmod_class, @@ -4580,59 +2336,14 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer6_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), }; /* timer7 */ -static struct omap_hwmod omap44xx_timer7_hwmod; static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { { .irq = 43 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { - { - .pa_start = 0x4013c000, - .pa_end = 0x4013c07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer7 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer7_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer7_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { - { - .pa_start = 0x4903c000, - .pa_end = 0x4903c07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer7 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer7_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer7_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* timer7 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = { - &omap44xx_l4_abe__timer7, - &omap44xx_l4_abe__timer7_dma, -}; - static struct omap_hwmod omap44xx_timer7_hwmod = { .name = "timer7", .class = &omap44xx_timer_hwmod_class, @@ -4647,59 +2358,14 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { }, }, .dev_attr = &capability_alwon_dev_attr, - .slaves = omap44xx_timer7_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), }; /* timer8 */ -static struct omap_hwmod omap44xx_timer8_hwmod; static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { { .irq = 44 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { - { - .pa_start = 0x4013e000, - .pa_end = 0x4013e07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer8 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer8_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer8_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { - { - .pa_start = 0x4903e000, - .pa_end = 0x4903e07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_abe -> timer8 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer8_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer8_dma_addrs, - .user = OCP_USER_SDMA, -}; - -/* timer8 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = { - &omap44xx_l4_abe__timer8, - &omap44xx_l4_abe__timer8_dma, -}; - static struct omap_hwmod omap44xx_timer8_hwmod = { .name = "timer8", .class = &omap44xx_timer_hwmod_class, @@ -4714,40 +2380,14 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { }, }, .dev_attr = &capability_pwm_dev_attr, - .slaves = omap44xx_timer8_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), }; /* timer9 */ -static struct omap_hwmod omap44xx_timer9_hwmod; static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { { .irq = 45 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { - { - .pa_start = 0x4803e000, - .pa_end = 0x4803e07f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer9 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer9_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer9_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer9 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = { - &omap44xx_l4_per__timer9, -}; - static struct omap_hwmod omap44xx_timer9_hwmod = { .name = "timer9", .class = &omap44xx_timer_hwmod_class, @@ -4762,40 +2402,14 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { }, }, .dev_attr = &capability_pwm_dev_attr, - .slaves = omap44xx_timer9_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), }; /* timer10 */ -static struct omap_hwmod omap44xx_timer10_hwmod; static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { { .irq = 46 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x4808607f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer10 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer10_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer10_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer10 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = { - &omap44xx_l4_per__timer10, -}; - static struct omap_hwmod omap44xx_timer10_hwmod = { .name = "timer10", .class = &omap44xx_timer_1ms_hwmod_class, @@ -4810,40 +2424,14 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { }, }, .dev_attr = &capability_pwm_dev_attr, - .slaves = omap44xx_timer10_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), }; /* timer11 */ -static struct omap_hwmod omap44xx_timer11_hwmod; static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { { .irq = 47 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x4808807f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> timer11 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_timer11_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer11_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* timer11 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = { - &omap44xx_l4_per__timer11, -}; - static struct omap_hwmod omap44xx_timer11_hwmod = { .name = "timer11", .class = &omap44xx_timer_hwmod_class, @@ -4858,8 +2446,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { }, }, .dev_attr = &capability_pwm_dev_attr, - .slaves = omap44xx_timer11_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), }; /* @@ -4885,7 +2471,6 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { }; /* uart1 */ -static struct omap_hwmod omap44xx_uart1_hwmod; static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { { .irq = 72 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -4897,29 +2482,6 @@ static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { - { - .pa_start = 0x4806a000, - .pa_end = 0x4806a0ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> uart1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_uart1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* uart1 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = { - &omap44xx_l4_per__uart1, -}; - static struct omap_hwmod omap44xx_uart1_hwmod = { .name = "uart1", .class = &omap44xx_uart_hwmod_class, @@ -4934,12 +2496,9 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_uart1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves), }; /* uart2 */ -static struct omap_hwmod omap44xx_uart2_hwmod; static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { { .irq = 73 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -4951,29 +2510,6 @@ static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { - { - .pa_start = 0x4806c000, - .pa_end = 0x4806c0ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> uart2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_uart2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* uart2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = { - &omap44xx_l4_per__uart2, -}; - static struct omap_hwmod omap44xx_uart2_hwmod = { .name = "uart2", .class = &omap44xx_uart_hwmod_class, @@ -4988,12 +2524,9 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_uart2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves), }; /* uart3 */ -static struct omap_hwmod omap44xx_uart3_hwmod; static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { { .irq = 74 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -5005,29 +2538,6 @@ static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { - { - .pa_start = 0x48020000, - .pa_end = 0x480200ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> uart3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_uart3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* uart3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { - &omap44xx_l4_per__uart3, -}; - static struct omap_hwmod omap44xx_uart3_hwmod = { .name = "uart3", .class = &omap44xx_uart_hwmod_class, @@ -5043,12 +2553,9 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_uart3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves), }; /* uart4 */ -static struct omap_hwmod omap44xx_uart4_hwmod; static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { { .irq = 70 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -5060,29 +2567,6 @@ static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { { .dma_req = -1 } }; -static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { - { - .pa_start = 0x4806e000, - .pa_end = 0x4806e0ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_per -> uart4 */ -static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { - .master = &omap44xx_l4_per_hwmod, - .slave = &omap44xx_uart4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* uart4 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = { - &omap44xx_l4_per__uart4, -}; - static struct omap_hwmod omap44xx_uart4_hwmod = { .name = "uart4", .class = &omap44xx_uart_hwmod_class, @@ -5097,8 +2581,98 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_uart4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves), +}; + +/* + * 'usb_host_hs' class + * high-speed multi-port usb host controller + */ + +static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = { + .name = "usb_host_hs", + .sysc = &omap44xx_usb_host_hs_sysc, +}; + +/* usb_host_hs */ +static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = { + { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START }, + { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + +static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { + .name = "usb_host_hs", + .class = &omap44xx_usb_host_hs_hwmod_class, + .clkdm_name = "l3_init_clkdm", + .main_clk = "usb_host_hs_fck", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .mpu_irqs = omap44xx_usb_host_hs_irqs, + + /* + * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock + * id: i660 + * + * Description: + * In the following configuration : + * - USBHOST module is set to smart-idle mode + * - PRCM asserts idle_req to the USBHOST module ( This typically + * happens when the system is going to a low power mode : all ports + * have been suspended, the master part of the USBHOST module has + * entered the standby state, and SW has cut the functional clocks) + * - an USBHOST interrupt occurs before the module is able to answer + * idle_ack, typically a remote wakeup IRQ. + * Then the USB HOST module will enter a deadlock situation where it + * is no more accessible nor functional. + * + * Workaround: + * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE + */ + + /* + * Errata: USB host EHCI may stall when entering smart-standby mode + * Id: i571 + * + * Description: + * When the USBHOST module is set to smart-standby mode, and when it is + * ready to enter the standby state (i.e. all ports are suspended and + * all attached devices are in suspend mode), then it can wrongly assert + * the Mstandby signal too early while there are still some residual OCP + * transactions ongoing. If this condition occurs, the internal state + * machine may go to an undefined state and the USB link may be stuck + * upon the next resume. + * + * Workaround: + * Don't use smart standby; use only force standby, + * hence HWMOD_SWSUP_MSTANDBY + */ + + /* + * During system boot; If the hwmod framework resets the module + * the module will have smart idle settings; which can lead to deadlock + * (above Errata Id:i660); so, dont reset the module during boot; + * Use HWMOD_INIT_NO_RESET. + */ + + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY | + HWMOD_INIT_NO_RESET, }; /* @@ -5131,34 +2705,6 @@ static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { { .irq = -1 } }; -/* usb_otg_hs master ports */ -static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_masters[] = { - &omap44xx_usb_otg_hs__l3_main_2, -}; - -static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { - { - .pa_start = 0x4a0ab000, - .pa_end = 0x4a0ab003, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_cfg -> usb_otg_hs */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { - .master = &omap44xx_l4_cfg_hwmod, - .slave = &omap44xx_usb_otg_hs_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_usb_otg_hs_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* usb_otg_hs slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_slaves[] = { - &omap44xx_l4_cfg__usb_otg_hs, -}; - static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { { .role = "xclk", .clk = "usb_otg_hs_xclk" }, }; @@ -5179,10 +2725,47 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { }, .opt_clks = usb_otg_hs_opt_clks, .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), - .slaves = omap44xx_usb_otg_hs_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), - .masters = omap44xx_usb_otg_hs_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters), +}; + +/* + * 'usb_tll_hs' class + * usb_tll_hs module is the adapter on the usb_host_hs ports + */ + +static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = { + .name = "usb_tll_hs", + .sysc = &omap44xx_usb_tll_hs_sysc, +}; + +static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = { + { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + +static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { + .name = "usb_tll_hs", + .class = &omap44xx_usb_tll_hs_hwmod_class, + .clkdm_name = "l3_init_clkdm", + .mpu_irqs = omap44xx_usb_tll_hs_irqs, + .main_clk = "usb_tll_hs_ick", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, }; /* @@ -5209,35 +2792,11 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { }; /* wd_timer2 */ -static struct omap_hwmod omap44xx_wd_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { { .irq = 80 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { - { - .pa_start = 0x4a314000, - .pa_end = 0x4a31407f, - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_wd_timer2_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_wd_timer2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* wd_timer2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = { - &omap44xx_l4_wkup__wd_timer2, -}; - static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap44xx_wd_timer_hwmod_class, @@ -5251,106 +2810,1746 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .slaves = omap44xx_wd_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves), }; /* wd_timer3 */ -static struct omap_hwmod omap44xx_wd_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { { .irq = 36 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; -static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { +static struct omap_hwmod omap44xx_wd_timer3_hwmod = { + .name = "wd_timer3", + .class = &omap44xx_wd_timer_hwmod_class, + .clkdm_name = "abe_clkdm", + .mpu_irqs = omap44xx_wd_timer3_irqs, + .main_clk = "wd_timer3_fck", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + + +/* + * interfaces + */ + +/* l3_main_1 -> dmm */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { + .master = &omap44xx_l3_main_1_hwmod, + .slave = &omap44xx_dmm_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { { - .pa_start = 0x40130000, - .pa_end = 0x4013007f, + .pa_start = 0x4e000000, + .pa_end = 0x4e0007ff, .flags = ADDR_TYPE_RT }, { } }; -/* l4_abe -> wd_timer3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { +/* mpu -> dmm */ +static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { + .master = &omap44xx_mpu_hwmod, + .slave = &omap44xx_dmm_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_dmm_addrs, + .user = OCP_USER_MPU, +}; + +/* dmm -> emif_fw */ +static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { + .master = &omap44xx_dmm_hwmod, + .slave = &omap44xx_emif_fw_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { + { + .pa_start = 0x4a20c000, + .pa_end = 0x4a20c0ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> emif_fw */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_emif_fw_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_emif_fw_addrs, + .user = OCP_USER_MPU, +}; + +/* iva -> l3_instr */ +static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { + .master = &omap44xx_iva_hwmod, + .slave = &omap44xx_l3_instr_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_3 -> l3_instr */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = { + .master = &omap44xx_l3_main_3_hwmod, + .slave = &omap44xx_l3_instr_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* dsp -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { + .master = &omap44xx_dsp_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* dss -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = { + .master = &omap44xx_dss_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_cfg -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l4_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* mmc1 -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_mmc1__l3_main_1 = { + .master = &omap44xx_mmc1_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* mmc2 -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { + .master = &omap44xx_mmc2_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { + { + .pa_start = 0x44000000, + .pa_end = 0x44000fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* mpu -> l3_main_1 */ +static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { + .master = &omap44xx_mpu_hwmod, + .slave = &omap44xx_l3_main_1_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_l3_main_1_addrs, + .user = OCP_USER_MPU, +}; + +/* dma_system -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { + .master = &omap44xx_dma_system_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* hsi -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = { + .master = &omap44xx_hsi_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* ipu -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_ipu__l3_main_2 = { + .master = &omap44xx_ipu_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* iss -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = { + .master = &omap44xx_iss_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* iva -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = { + .master = &omap44xx_iva_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { + { + .pa_start = 0x44800000, + .pa_end = 0x44801fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_1 -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { + .master = &omap44xx_l3_main_1_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_l3_main_2_addrs, + .user = OCP_USER_MPU, +}; + +/* l4_cfg -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l4_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* usb_host_hs -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = { + .master = &omap44xx_usb_host_hs_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* usb_otg_hs -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = { + .master = &omap44xx_usb_otg_hs_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { + { + .pa_start = 0x45000000, + .pa_end = 0x45000fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_1 -> l3_main_3 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { + .master = &omap44xx_l3_main_1_hwmod, + .slave = &omap44xx_l3_main_3_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_l3_main_3_addrs, + .user = OCP_USER_MPU, +}; + +/* l3_main_2 -> l3_main_3 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_l3_main_3_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_cfg -> l3_main_3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_l3_main_3_hwmod, + .clk = "l4_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* aess -> l4_abe */ +static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { + .master = &omap44xx_aess_hwmod, + .slave = &omap44xx_l4_abe_hwmod, + .clk = "ocp_abe_iclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* dsp -> l4_abe */ +static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = { + .master = &omap44xx_dsp_hwmod, + .slave = &omap44xx_l4_abe_hwmod, + .clk = "ocp_abe_iclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_1 -> l4_abe */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = { + .master = &omap44xx_l3_main_1_hwmod, + .slave = &omap44xx_l4_abe_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* mpu -> l4_abe */ +static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = { + .master = &omap44xx_mpu_hwmod, + .slave = &omap44xx_l4_abe_hwmod, + .clk = "ocp_abe_iclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_1 -> l4_cfg */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { + .master = &omap44xx_l3_main_1_hwmod, + .slave = &omap44xx_l4_cfg_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> l4_per */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_l4_per_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_cfg -> l4_wkup */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_l4_wkup_hwmod, + .clk = "l4_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* mpu -> mpu_private */ +static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { + .master = &omap44xx_mpu_hwmod, + .slave = &omap44xx_mpu_private_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { + { + .pa_start = 0x401f1000, + .pa_end = 0x401f13ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> aess */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_wd_timer3_hwmod, + .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_addrs, + .addr = omap44xx_aess_addrs, .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { +static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { { - .pa_start = 0x49030000, - .pa_end = 0x4903007f, + .pa_start = 0x490f1000, + .pa_end = 0x490f13ff, .flags = ADDR_TYPE_RT }, { } }; -/* l4_abe -> wd_timer3 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { +/* l4_abe -> aess (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_wd_timer3_hwmod, + .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_dma_addrs, + .addr = omap44xx_aess_dma_addrs, .user = OCP_USER_SDMA, }; -/* wd_timer3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = { - &omap44xx_l4_abe__wd_timer3, - &omap44xx_l4_abe__wd_timer3_dma, +static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { + { + .pa_start = 0x4a304000, + .pa_end = 0x4a30401f, + .flags = ADDR_TYPE_RT + }, + { } }; -static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .name = "wd_timer3", - .class = &omap44xx_wd_timer_hwmod_class, - .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_wd_timer3_irqs, - .main_clk = "wd_timer3_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, +/* l4_wkup -> counter_32k */ +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { + .master = &omap44xx_l4_wkup_hwmod, + .slave = &omap44xx_counter_32k_hwmod, + .clk = "l4_wkup_clk_mux_ck", + .addr = omap44xx_counter_32k_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { + { + .pa_start = 0x4a056000, + .pa_end = 0x4a056fff, + .flags = ADDR_TYPE_RT }, - .slaves = omap44xx_wd_timer3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), + { } }; -/* - * 'usb_host_hs' class - * high-speed multi-port usb host controller - */ -static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = { - .master = &omap44xx_usb_host_hs_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, +/* l4_cfg -> dma_system */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_dma_system_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dma_system_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { + { + .name = "mpu", + .pa_start = 0x4012e000, + .pa_end = 0x4012e07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> dmic */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_dmic_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_dmic_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x4902e000, + .pa_end = 0x4902e07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> dmic (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_dmic_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_dmic_dma_addrs, + .user = OCP_USER_SDMA, +}; + +/* dsp -> iva */ +static struct omap_hwmod_ocp_if omap44xx_dsp__iva = { + .master = &omap44xx_dsp_hwmod, + .slave = &omap44xx_iva_hwmod, + .clk = "dpll_iva_m5x2_ck", + .user = OCP_USER_DSP, +}; + +/* l4_cfg -> dsp */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_dsp_hwmod, + .clk = "l4_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { + { + .pa_start = 0x58000000, + .pa_end = 0x5800007f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { + { + .pa_start = 0x48040000, + .pa_end = 0x4804007f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { + { + .pa_start = 0x58001000, + .pa_end = 0x58001fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_dispc */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_dispc_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_dispc_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { + { + .pa_start = 0x48041000, + .pa_end = 0x48041fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_dispc */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_dispc_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_dispc_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { + { + .pa_start = 0x58004000, + .pa_end = 0x580041ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_dsi1 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_dsi1_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_dsi1_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { + { + .pa_start = 0x48044000, + .pa_end = 0x480441ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_dsi1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_dsi1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_dsi1_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { + { + .pa_start = 0x58005000, + .pa_end = 0x580051ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_dsi2 */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_dsi2_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_dsi2_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { + { + .pa_start = 0x48045000, + .pa_end = 0x480451ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_dsi2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_dsi2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_dsi2_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { + { + .pa_start = 0x58006000, + .pa_end = 0x58006fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_hdmi */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_hdmi_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_hdmi_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { + { + .pa_start = 0x48046000, + .pa_end = 0x48046fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_hdmi */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_hdmi_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_hdmi_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { + { + .pa_start = 0x58002000, + .pa_end = 0x580020ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_rfbi */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_rfbi_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_rfbi_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { + { + .pa_start = 0x48042000, + .pa_end = 0x480420ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_rfbi */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_rfbi_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_rfbi_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { + { + .pa_start = 0x58003000, + .pa_end = 0x580030ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> dss_venc */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_dss_venc_hwmod, + .clk = "dss_fck", + .addr = omap44xx_dss_venc_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { + { + .pa_start = 0x48043000, + .pa_end = 0x480430ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> dss_venc */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_dss_venc_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_dss_venc_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { + { + .pa_start = 0x4a310000, + .pa_end = 0x4a3101ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_wkup -> gpio1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { + .master = &omap44xx_l4_wkup_hwmod, + .slave = &omap44xx_gpio1_hwmod, + .clk = "l4_wkup_clk_mux_ck", + .addr = omap44xx_gpio1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { + { + .pa_start = 0x48055000, + .pa_end = 0x480551ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> gpio2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_gpio2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_gpio2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { + { + .pa_start = 0x48057000, + .pa_end = 0x480571ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> gpio3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_gpio3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_gpio3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { + { + .pa_start = 0x48059000, + .pa_end = 0x480591ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> gpio4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_gpio4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_gpio4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { + { + .pa_start = 0x4805b000, + .pa_end = 0x4805b1ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> gpio5 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_gpio5_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_gpio5_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { + { + .pa_start = 0x4805d000, + .pa_end = 0x4805d1ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> gpio6 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_gpio6_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_gpio6_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { + { + .pa_start = 0x4a058000, + .pa_end = 0x4a05bfff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> hsi */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_hsi_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_hsi_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { + { + .pa_start = 0x48070000, + .pa_end = 0x480700ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> i2c1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_i2c1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_i2c1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { + { + .pa_start = 0x48072000, + .pa_end = 0x480720ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> i2c2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_i2c2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_i2c2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { + { + .pa_start = 0x48060000, + .pa_end = 0x480600ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> i2c3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_i2c3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_i2c3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { + { + .pa_start = 0x48350000, + .pa_end = 0x483500ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> i2c4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_i2c4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_i2c4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> ipu */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_ipu_hwmod, .clk = "l3_div_ck", .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, +static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { + { + .pa_start = 0x52000000, + .pa_end = 0x520000ff, + .flags = ADDR_TYPE_RT + }, + { } }; -static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = { - .name = "usb_host_hs", - .sysc = &omap44xx_usb_host_hs_sysc, +/* l3_main_2 -> iss */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_iss_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_iss_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = { - &omap44xx_usb_host_hs__l3_main_2, +static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { + { + .pa_start = 0x5a000000, + .pa_end = 0x5a07ffff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l3_main_2 -> iva */ +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { + .master = &omap44xx_l3_main_2_hwmod, + .slave = &omap44xx_iva_hwmod, + .clk = "l3_div_ck", + .addr = omap44xx_iva_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { + { + .pa_start = 0x4a31c000, + .pa_end = 0x4a31c07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_wkup -> kbd */ +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { + .master = &omap44xx_l4_wkup_hwmod, + .slave = &omap44xx_kbd_hwmod, + .clk = "l4_wkup_clk_mux_ck", + .addr = omap44xx_kbd_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { + { + .pa_start = 0x4a0f4000, + .pa_end = 0x4a0f41ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> mailbox */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_mailbox_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mailbox_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40122000, + .pa_end = 0x401220ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp1_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp1_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49022000, + .pa_end = 0x490220ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp1 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp1_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp1_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40124000, + .pa_end = 0x401240ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp2_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp2_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49024000, + .pa_end = 0x490240ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp2 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp2_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp2_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40126000, + .pa_end = 0x401260ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp3_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49026000, + .pa_end = 0x490260ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcbsp3 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp3_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { + { + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mcbsp4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcbsp4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcbsp4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { + { + .pa_start = 0x40132000, + .pa_end = 0x4013207f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcpdm */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcpdm_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcpdm_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { + { + .pa_start = 0x49032000, + .pa_end = 0x4903207f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> mcpdm (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcpdm_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcpdm_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { + { + .pa_start = 0x48098000, + .pa_end = 0x480981ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mcspi1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcspi1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcspi1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { + { + .pa_start = 0x4809a000, + .pa_end = 0x4809a1ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mcspi2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcspi2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcspi2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { + { + .pa_start = 0x480b8000, + .pa_end = 0x480b81ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mcspi3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcspi3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcspi3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { + { + .pa_start = 0x480ba000, + .pa_end = 0x480ba1ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mcspi4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcspi4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcspi4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { + { + .pa_start = 0x4809c000, + .pa_end = 0x4809c3ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mmc1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mmc1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mmc1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { + { + .pa_start = 0x480b4000, + .pa_end = 0x480b43ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mmc2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mmc2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mmc2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { + { + .pa_start = 0x480ad000, + .pa_end = 0x480ad3ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mmc3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mmc3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mmc3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { + { + .pa_start = 0x480d1000, + .pa_end = 0x480d13ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mmc4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mmc4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mmc4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { + { + .pa_start = 0x480d5000, + .pa_end = 0x480d53ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> mmc5 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mmc5_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mmc5_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { + { + .pa_start = 0x4a0dd000, + .pa_end = 0x4a0dd03f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> smartreflex_core */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_smartreflex_core_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_smartreflex_core_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { + { + .pa_start = 0x4a0db000, + .pa_end = 0x4a0db03f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> smartreflex_iva */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_smartreflex_iva_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_smartreflex_iva_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { + { + .pa_start = 0x4a0d9000, + .pa_end = 0x4a0d903f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> smartreflex_mpu */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_smartreflex_mpu_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_smartreflex_mpu_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { + { + .pa_start = 0x4a0f6000, + .pa_end = 0x4a0f6fff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_cfg -> spinlock */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_spinlock_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_spinlock_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { + { + .pa_start = 0x4a318000, + .pa_end = 0x4a31807f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_wkup -> timer1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { + .master = &omap44xx_l4_wkup_hwmod, + .slave = &omap44xx_timer1_hwmod, + .clk = "l4_wkup_clk_mux_ck", + .addr = omap44xx_timer1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { + { + .pa_start = 0x48032000, + .pa_end = 0x4803207f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { + { + .pa_start = 0x48034000, + .pa_end = 0x4803407f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { + { + .pa_start = 0x48036000, + .pa_end = 0x4803607f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { + { + .pa_start = 0x40138000, + .pa_end = 0x4013807f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer5 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer5_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer5_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { + { + .pa_start = 0x49038000, + .pa_end = 0x4903807f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer5 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer5_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer5_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { + { + .pa_start = 0x4013a000, + .pa_end = 0x4013a07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer6 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer6_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer6_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { + { + .pa_start = 0x4903a000, + .pa_end = 0x4903a07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer6 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer6_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer6_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { + { + .pa_start = 0x4013c000, + .pa_end = 0x4013c07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer7 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer7_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer7_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { + { + .pa_start = 0x4903c000, + .pa_end = 0x4903c07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer7 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer7_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer7_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { + { + .pa_start = 0x4013e000, + .pa_end = 0x4013e07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer8 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer8_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer8_addrs, + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { + { + .pa_start = 0x4903e000, + .pa_end = 0x4903e07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> timer8 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_timer8_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_timer8_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { + { + .pa_start = 0x4803e000, + .pa_end = 0x4803e07f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer9 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer9_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer9_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { + { + .pa_start = 0x48086000, + .pa_end = 0x4808607f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer10 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer10_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer10_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { + { + .pa_start = 0x48088000, + .pa_end = 0x4808807f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> timer11 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_timer11_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_timer11_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { + { + .pa_start = 0x4806a000, + .pa_end = 0x4806a0ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> uart1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart1_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { + { + .pa_start = 0x4806c000, + .pa_end = 0x4806c0ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> uart2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { + { + .pa_start = 0x48020000, + .pa_end = 0x480200ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> uart3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart3_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { + { + .pa_start = 0x4806e000, + .pa_end = 0x4806e0ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_per -> uart4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart4_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = { @@ -5373,12 +4572,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = { {} }; -static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = { - { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START }, - { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -}; - +/* l4_cfg -> usb_host_hs */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_usb_host_hs_hwmod, @@ -5387,100 +4581,22 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = { - &omap44xx_l4_cfg__usb_host_hs, -}; - -static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { - .name = "usb_host_hs", - .class = &omap44xx_usb_host_hs_hwmod_class, - .clkdm_name = "l3_init_clkdm", - .main_clk = "usb_host_hs_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, +static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { + { + .pa_start = 0x4a0ab000, + .pa_end = 0x4a0ab003, + .flags = ADDR_TYPE_RT }, - .mpu_irqs = omap44xx_usb_host_hs_irqs, - .slaves = omap44xx_usb_host_hs_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves), - .masters = omap44xx_usb_host_hs_masters, - .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters), - - /* - * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock - * id: i660 - * - * Description: - * In the following configuration : - * - USBHOST module is set to smart-idle mode - * - PRCM asserts idle_req to the USBHOST module ( This typically - * happens when the system is going to a low power mode : all ports - * have been suspended, the master part of the USBHOST module has - * entered the standby state, and SW has cut the functional clocks) - * - an USBHOST interrupt occurs before the module is able to answer - * idle_ack, typically a remote wakeup IRQ. - * Then the USB HOST module will enter a deadlock situation where it - * is no more accessible nor functional. - * - * Workaround: - * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE - */ - - /* - * Errata: USB host EHCI may stall when entering smart-standby mode - * Id: i571 - * - * Description: - * When the USBHOST module is set to smart-standby mode, and when it is - * ready to enter the standby state (i.e. all ports are suspended and - * all attached devices are in suspend mode), then it can wrongly assert - * the Mstandby signal too early while there are still some residual OCP - * transactions ongoing. If this condition occurs, the internal state - * machine may go to an undefined state and the USB link may be stuck - * upon the next resume. - * - * Workaround: - * Don't use smart standby; use only force standby, - * hence HWMOD_SWSUP_MSTANDBY - */ - - /* - * During system boot; If the hwmod framework resets the module - * the module will have smart idle settings; which can lead to deadlock - * (above Errata Id:i660); so, dont reset the module during boot; - * Use HWMOD_INIT_NO_RESET. - */ - - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY | - HWMOD_INIT_NO_RESET, -}; - -/* - * 'usb_tll_hs' class - * usb_tll_hs module is the adapter on the usb_host_hs ports - */ -static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = { - .name = "usb_tll_hs", - .sysc = &omap44xx_usb_tll_hs_sysc, + { } }; -static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = { - { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } +/* l4_cfg -> usb_otg_hs */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_usb_otg_hs_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_usb_otg_hs_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = { @@ -5493,6 +4609,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = { {} }; +/* l4_cfg -> usb_tll_hs */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_usb_tll_hs_hwmod, @@ -5501,181 +4618,184 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = { - &omap44xx_l4_cfg__usb_tll_hs, +static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { + { + .pa_start = 0x4a314000, + .pa_end = 0x4a31407f, + .flags = ADDR_TYPE_RT + }, + { } }; -static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { - .name = "usb_tll_hs", - .class = &omap44xx_usb_tll_hs_hwmod_class, - .clkdm_name = "l3_init_clkdm", - .main_clk = "usb_tll_hs_ick", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET, - .modulemode = MODULEMODE_HWCTRL, - }, +/* l4_wkup -> wd_timer2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { + .master = &omap44xx_l4_wkup_hwmod, + .slave = &omap44xx_wd_timer2_hwmod, + .clk = "l4_wkup_clk_mux_ck", + .addr = omap44xx_wd_timer2_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { + { + .pa_start = 0x40130000, + .pa_end = 0x4013007f, + .flags = ADDR_TYPE_RT }, - .mpu_irqs = omap44xx_usb_tll_hs_irqs, - .slaves = omap44xx_usb_tll_hs_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves), + { } +}; + +/* l4_abe -> wd_timer3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_wd_timer3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_wd_timer3_addrs, + .user = OCP_USER_MPU, }; -static __initdata struct omap_hwmod *omap44xx_hwmods[] = { - - /* dmm class */ - &omap44xx_dmm_hwmod, - - /* emif_fw class */ - &omap44xx_emif_fw_hwmod, - - /* l3 class */ - &omap44xx_l3_instr_hwmod, - &omap44xx_l3_main_1_hwmod, - &omap44xx_l3_main_2_hwmod, - &omap44xx_l3_main_3_hwmod, - - /* l4 class */ - &omap44xx_l4_abe_hwmod, - &omap44xx_l4_cfg_hwmod, - &omap44xx_l4_per_hwmod, - &omap44xx_l4_wkup_hwmod, - - /* mpu_bus class */ - &omap44xx_mpu_private_hwmod, - - /* aess class */ -/* &omap44xx_aess_hwmod, */ - - /* bandgap class */ - &omap44xx_bandgap_hwmod, - - /* counter class */ -/* &omap44xx_counter_32k_hwmod, */ - - /* dma class */ - &omap44xx_dma_system_hwmod, - - /* dmic class */ - &omap44xx_dmic_hwmod, - - /* dsp class */ - &omap44xx_dsp_hwmod, - &omap44xx_dsp_c0_hwmod, - - /* dss class */ - &omap44xx_dss_hwmod, - &omap44xx_dss_dispc_hwmod, - &omap44xx_dss_dsi1_hwmod, - &omap44xx_dss_dsi2_hwmod, - &omap44xx_dss_hdmi_hwmod, - &omap44xx_dss_rfbi_hwmod, - &omap44xx_dss_venc_hwmod, - - /* gpio class */ - &omap44xx_gpio1_hwmod, - &omap44xx_gpio2_hwmod, - &omap44xx_gpio3_hwmod, - &omap44xx_gpio4_hwmod, - &omap44xx_gpio5_hwmod, - &omap44xx_gpio6_hwmod, - - /* hsi class */ -/* &omap44xx_hsi_hwmod, */ - - /* i2c class */ - &omap44xx_i2c1_hwmod, - &omap44xx_i2c2_hwmod, - &omap44xx_i2c3_hwmod, - &omap44xx_i2c4_hwmod, - - /* ipu class */ - &omap44xx_ipu_hwmod, - &omap44xx_ipu_c0_hwmod, - &omap44xx_ipu_c1_hwmod, - - /* iss class */ -/* &omap44xx_iss_hwmod, */ - - /* iva class */ - &omap44xx_iva_hwmod, - &omap44xx_iva_seq0_hwmod, - &omap44xx_iva_seq1_hwmod, - - /* kbd class */ - &omap44xx_kbd_hwmod, - - /* mailbox class */ - &omap44xx_mailbox_hwmod, - - /* mcbsp class */ - &omap44xx_mcbsp1_hwmod, - &omap44xx_mcbsp2_hwmod, - &omap44xx_mcbsp3_hwmod, - &omap44xx_mcbsp4_hwmod, - - /* mcpdm class */ - &omap44xx_mcpdm_hwmod, - - /* mcspi class */ - &omap44xx_mcspi1_hwmod, - &omap44xx_mcspi2_hwmod, - &omap44xx_mcspi3_hwmod, - &omap44xx_mcspi4_hwmod, - - /* mmc class */ - &omap44xx_mmc1_hwmod, - &omap44xx_mmc2_hwmod, - &omap44xx_mmc3_hwmod, - &omap44xx_mmc4_hwmod, - &omap44xx_mmc5_hwmod, - - /* mpu class */ - &omap44xx_mpu_hwmod, - - /* smartreflex class */ - &omap44xx_smartreflex_core_hwmod, - &omap44xx_smartreflex_iva_hwmod, - &omap44xx_smartreflex_mpu_hwmod, - - /* spinlock class */ - &omap44xx_spinlock_hwmod, - - /* timer class */ - &omap44xx_timer1_hwmod, - &omap44xx_timer2_hwmod, - &omap44xx_timer3_hwmod, - &omap44xx_timer4_hwmod, - &omap44xx_timer5_hwmod, - &omap44xx_timer6_hwmod, - &omap44xx_timer7_hwmod, - &omap44xx_timer8_hwmod, - &omap44xx_timer9_hwmod, - &omap44xx_timer10_hwmod, - &omap44xx_timer11_hwmod, - - /* uart class */ - &omap44xx_uart1_hwmod, - &omap44xx_uart2_hwmod, - &omap44xx_uart3_hwmod, - &omap44xx_uart4_hwmod, - - /* usb host class */ - &omap44xx_usb_host_hs_hwmod, - &omap44xx_usb_tll_hs_hwmod, - - /* usb_otg_hs class */ - &omap44xx_usb_otg_hs_hwmod, - - /* wd_timer class */ - &omap44xx_wd_timer2_hwmod, - &omap44xx_wd_timer3_hwmod, +static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { + { + .pa_start = 0x49030000, + .pa_end = 0x4903007f, + .flags = ADDR_TYPE_RT + }, + { } +}; + +/* l4_abe -> wd_timer3 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_wd_timer3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_wd_timer3_dma_addrs, + .user = OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { + &omap44xx_l3_main_1__dmm, + &omap44xx_mpu__dmm, + &omap44xx_dmm__emif_fw, + &omap44xx_l4_cfg__emif_fw, + &omap44xx_iva__l3_instr, + &omap44xx_l3_main_3__l3_instr, + &omap44xx_dsp__l3_main_1, + &omap44xx_dss__l3_main_1, + &omap44xx_l3_main_2__l3_main_1, + &omap44xx_l4_cfg__l3_main_1, + &omap44xx_mmc1__l3_main_1, + &omap44xx_mmc2__l3_main_1, + &omap44xx_mpu__l3_main_1, + &omap44xx_dma_system__l3_main_2, + &omap44xx_hsi__l3_main_2, + &omap44xx_ipu__l3_main_2, + &omap44xx_iss__l3_main_2, + &omap44xx_iva__l3_main_2, + &omap44xx_l3_main_1__l3_main_2, + &omap44xx_l4_cfg__l3_main_2, + &omap44xx_usb_host_hs__l3_main_2, + &omap44xx_usb_otg_hs__l3_main_2, + &omap44xx_l3_main_1__l3_main_3, + &omap44xx_l3_main_2__l3_main_3, + &omap44xx_l4_cfg__l3_main_3, + &omap44xx_aess__l4_abe, + &omap44xx_dsp__l4_abe, + &omap44xx_l3_main_1__l4_abe, + &omap44xx_mpu__l4_abe, + &omap44xx_l3_main_1__l4_cfg, + &omap44xx_l3_main_2__l4_per, + &omap44xx_l4_cfg__l4_wkup, + &omap44xx_mpu__mpu_private, + &omap44xx_l4_abe__aess, + &omap44xx_l4_abe__aess_dma, + &omap44xx_l4_wkup__counter_32k, + &omap44xx_l4_cfg__dma_system, + &omap44xx_l4_abe__dmic, + &omap44xx_l4_abe__dmic_dma, + &omap44xx_dsp__iva, + &omap44xx_l4_cfg__dsp, + &omap44xx_l3_main_2__dss, + &omap44xx_l4_per__dss, + &omap44xx_l3_main_2__dss_dispc, + &omap44xx_l4_per__dss_dispc, + &omap44xx_l3_main_2__dss_dsi1, + &omap44xx_l4_per__dss_dsi1, + &omap44xx_l3_main_2__dss_dsi2, + &omap44xx_l4_per__dss_dsi2, + &omap44xx_l3_main_2__dss_hdmi, + &omap44xx_l4_per__dss_hdmi, + &omap44xx_l3_main_2__dss_rfbi, + &omap44xx_l4_per__dss_rfbi, + &omap44xx_l3_main_2__dss_venc, + &omap44xx_l4_per__dss_venc, + &omap44xx_l4_wkup__gpio1, + &omap44xx_l4_per__gpio2, + &omap44xx_l4_per__gpio3, + &omap44xx_l4_per__gpio4, + &omap44xx_l4_per__gpio5, + &omap44xx_l4_per__gpio6, + &omap44xx_l4_cfg__hsi, + &omap44xx_l4_per__i2c1, + &omap44xx_l4_per__i2c2, + &omap44xx_l4_per__i2c3, + &omap44xx_l4_per__i2c4, + &omap44xx_l3_main_2__ipu, + &omap44xx_l3_main_2__iss, + &omap44xx_l3_main_2__iva, + &omap44xx_l4_wkup__kbd, + &omap44xx_l4_cfg__mailbox, + &omap44xx_l4_abe__mcbsp1, + &omap44xx_l4_abe__mcbsp1_dma, + &omap44xx_l4_abe__mcbsp2, + &omap44xx_l4_abe__mcbsp2_dma, + &omap44xx_l4_abe__mcbsp3, + &omap44xx_l4_abe__mcbsp3_dma, + &omap44xx_l4_per__mcbsp4, + &omap44xx_l4_abe__mcpdm, + &omap44xx_l4_abe__mcpdm_dma, + &omap44xx_l4_per__mcspi1, + &omap44xx_l4_per__mcspi2, + &omap44xx_l4_per__mcspi3, + &omap44xx_l4_per__mcspi4, + &omap44xx_l4_per__mmc1, + &omap44xx_l4_per__mmc2, + &omap44xx_l4_per__mmc3, + &omap44xx_l4_per__mmc4, + &omap44xx_l4_per__mmc5, + &omap44xx_l4_cfg__smartreflex_core, + &omap44xx_l4_cfg__smartreflex_iva, + &omap44xx_l4_cfg__smartreflex_mpu, + &omap44xx_l4_cfg__spinlock, + &omap44xx_l4_wkup__timer1, + &omap44xx_l4_per__timer2, + &omap44xx_l4_per__timer3, + &omap44xx_l4_per__timer4, + &omap44xx_l4_abe__timer5, + &omap44xx_l4_abe__timer5_dma, + &omap44xx_l4_abe__timer6, + &omap44xx_l4_abe__timer6_dma, + &omap44xx_l4_abe__timer7, + &omap44xx_l4_abe__timer7_dma, + &omap44xx_l4_abe__timer8, + &omap44xx_l4_abe__timer8_dma, + &omap44xx_l4_per__timer9, + &omap44xx_l4_per__timer10, + &omap44xx_l4_per__timer11, + &omap44xx_l4_per__uart1, + &omap44xx_l4_per__uart2, + &omap44xx_l4_per__uart3, + &omap44xx_l4_per__uart4, + &omap44xx_l4_cfg__usb_host_hs, + &omap44xx_l4_cfg__usb_otg_hs, + &omap44xx_l4_cfg__usb_tll_hs, + &omap44xx_l4_wkup__wd_timer2, + &omap44xx_l4_abe__wd_timer3, + &omap44xx_l4_abe__wd_timer3_dma, NULL, }; int __init omap44xx_hwmod_init(void) { - return omap_hwmod_register(omap44xx_hwmods); + return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); } |