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-rw-r--r--arch/arm/plat-samsung/cpu.c8
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h16
-rw-r--r--arch/arm/plat-samsung/pm-gpio.c66
-rw-r--r--arch/arm/plat-samsung/pm.c32
4 files changed, 69 insertions, 53 deletions
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
index 46b426e8aff5..699fce15b463 100644
--- a/arch/arm/plat-samsung/cpu.c
+++ b/arch/arm/plat-samsung/cpu.c
@@ -37,14 +37,14 @@ void __init s3c24xx_init_cpu(void)
void __init s3c64xx_init_cpu(void)
{
- samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118);
+ samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0x118);
if (!samsung_cpu_id) {
/*
* S3C6400 has the ID register in a different place,
* and needs a write before it can be read.
*/
- __raw_writel(0x0, S3C_VA_SYS + 0xA1C);
- samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0xA1C);
+ writel_relaxed(0x0, S3C_VA_SYS + 0xA1C);
+ samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0xA1C);
}
samsung_cpu_rev = 0;
@@ -52,6 +52,6 @@ void __init s3c64xx_init_cpu(void)
void __init s5p_init_cpu(void __iomem *cpuid_addr)
{
- samsung_cpu_id = __raw_readl(cpuid_addr);
+ samsung_cpu_id = readl_relaxed(cpuid_addr);
samsung_cpu_rev = samsung_cpu_id & 0xFF;
}
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index f48dc0a4736c..94fef0470777 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -14,6 +14,8 @@
#ifndef __ASM_PLAT_UNCOMPRESS_H
#define __ASM_PLAT_UNCOMPRESS_H
+#include <linux/swab.h>
+
typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
/* uart setup */
@@ -54,6 +56,9 @@ uart_wr(unsigned int reg, unsigned int val)
volatile unsigned int *ptr;
ptr = (volatile unsigned int *)(reg + uart_base);
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ val = __swab32(val);
+#endif /* CONFIG_CPU_BIG_ENDIAN */
*ptr = val;
}
@@ -63,7 +68,11 @@ uart_rd(unsigned int reg)
volatile unsigned int *ptr;
ptr = (volatile unsigned int *)(reg + uart_base);
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ return __swab32(*ptr);
+#else
return *ptr;
+#endif /* CONFIG_CPU_BIG_ENDIAN */
}
/* we can deal with the case the UARTs are being run
@@ -102,10 +111,17 @@ static inline void flush(void)
{
}
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define __raw_writel(d, ad) \
+ do { \
+ *((volatile unsigned int __force *)(ad)) = __swab32(d); \
+ } while (0)
+#else
#define __raw_writel(d, ad) \
do { \
*((volatile unsigned int __force *)(ad)) = (d); \
} while (0)
+#endif /* CONFIG_CPU_BIG_ENDIAN */
#ifdef CONFIG_S3C_BOOT_ERROR_RESET
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index dd4c15d0d68f..a1789225923a 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -34,15 +34,15 @@
static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip)
{
- chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
- chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
+ chip->pm_save[0] = readl_relaxed(chip->base + OFFS_CON);
+ chip->pm_save[1] = readl_relaxed(chip->base + OFFS_DAT);
}
static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip)
{
void __iomem *base = chip->base;
- u32 old_gpcon = __raw_readl(base + OFFS_CON);
- u32 old_gpdat = __raw_readl(base + OFFS_DAT);
+ u32 old_gpcon = readl_relaxed(base + OFFS_CON);
+ u32 old_gpdat = readl_relaxed(base + OFFS_DAT);
u32 gps_gpcon = chip->pm_save[0];
u32 gps_gpdat = chip->pm_save[1];
u32 gpcon;
@@ -53,12 +53,12 @@ static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip)
/* first set all SFN bits to SFN */
gpcon = old_gpcon | gps_gpcon;
- __raw_writel(gpcon, base + OFFS_CON);
+ writel_relaxed(gpcon, base + OFFS_CON);
/* now set all the other bits */
- __raw_writel(gps_gpdat, base + OFFS_DAT);
- __raw_writel(gps_gpcon, base + OFFS_CON);
+ writel_relaxed(gps_gpdat, base + OFFS_DAT);
+ writel_relaxed(gps_gpcon, base + OFFS_CON);
S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
@@ -71,9 +71,9 @@ struct samsung_gpio_pm samsung_gpio_pm_1bit = {
static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip)
{
- chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
- chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
- chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP);
+ chip->pm_save[0] = readl_relaxed(chip->base + OFFS_CON);
+ chip->pm_save[1] = readl_relaxed(chip->base + OFFS_DAT);
+ chip->pm_save[2] = readl_relaxed(chip->base + OFFS_UP);
}
/* Test whether the given masked+shifted bits of an GPIO configuration
@@ -128,8 +128,8 @@ static inline int is_out(unsigned long con)
static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
{
void __iomem *base = chip->base;
- u32 old_gpcon = __raw_readl(base + OFFS_CON);
- u32 old_gpdat = __raw_readl(base + OFFS_DAT);
+ u32 old_gpcon = readl_relaxed(base + OFFS_CON);
+ u32 old_gpdat = readl_relaxed(base + OFFS_DAT);
u32 gps_gpcon = chip->pm_save[0];
u32 gps_gpdat = chip->pm_save[1];
u32 gpcon, old, new, mask;
@@ -137,7 +137,7 @@ static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
int nr;
/* restore GPIO pull-up settings */
- __raw_writel(chip->pm_save[2], base + OFFS_UP);
+ writel_relaxed(chip->pm_save[2], base + OFFS_UP);
/* Create a change_mask of all the items that need to have
* their CON value changed before their DAT value, so that
@@ -180,12 +180,12 @@ static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
gpcon = old_gpcon & ~change_mask;
gpcon |= gps_gpcon & change_mask;
- __raw_writel(gpcon, base + OFFS_CON);
+ writel_relaxed(gpcon, base + OFFS_CON);
/* Now change any items that require DAT,CON */
- __raw_writel(gps_gpdat, base + OFFS_DAT);
- __raw_writel(gps_gpcon, base + OFFS_CON);
+ writel_relaxed(gps_gpdat, base + OFFS_DAT);
+ writel_relaxed(gps_gpcon, base + OFFS_CON);
S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
@@ -200,12 +200,12 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = {
|| defined(CONFIG_ARCH_EXYNOS)
static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
{
- chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
- chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT);
- chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP);
+ chip->pm_save[1] = readl_relaxed(chip->base + OFFS_CON);
+ chip->pm_save[2] = readl_relaxed(chip->base + OFFS_DAT);
+ chip->pm_save[3] = readl_relaxed(chip->base + OFFS_UP);
if (chip->chip.ngpio > 8)
- chip->pm_save[0] = __raw_readl(chip->base - 4);
+ chip->pm_save[0] = readl_relaxed(chip->base - 4);
}
static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon)
@@ -250,7 +250,7 @@ static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon)
static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index)
{
void __iomem *con = chip->base + (index * 4);
- u32 old_gpcon = __raw_readl(con);
+ u32 old_gpcon = readl_relaxed(con);
u32 gps_gpcon = chip->pm_save[index + 1];
u32 gpcon, mask;
@@ -259,47 +259,47 @@ static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index)
gpcon = old_gpcon & ~mask;
gpcon |= gps_gpcon & mask;
- __raw_writel(gpcon, con);
+ writel_relaxed(gpcon, con);
}
static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip)
{
void __iomem *base = chip->base;
u32 old_gpcon[2];
- u32 old_gpdat = __raw_readl(base + OFFS_DAT);
+ u32 old_gpdat = readl_relaxed(base + OFFS_DAT);
u32 gps_gpdat = chip->pm_save[2];
/* First, modify the CON settings */
old_gpcon[0] = 0;
- old_gpcon[1] = __raw_readl(base + OFFS_CON);
+ old_gpcon[1] = readl_relaxed(base + OFFS_CON);
samsung_gpio_pm_4bit_con(chip, 0);
if (chip->chip.ngpio > 8) {
- old_gpcon[0] = __raw_readl(base - 4);
+ old_gpcon[0] = readl_relaxed(base - 4);
samsung_gpio_pm_4bit_con(chip, -1);
}
/* Now change the configurations that require DAT,CON */
- __raw_writel(chip->pm_save[2], base + OFFS_DAT);
- __raw_writel(chip->pm_save[1], base + OFFS_CON);
+ writel_relaxed(chip->pm_save[2], base + OFFS_DAT);
+ writel_relaxed(chip->pm_save[1], base + OFFS_CON);
if (chip->chip.ngpio > 8)
- __raw_writel(chip->pm_save[0], base - 4);
+ writel_relaxed(chip->pm_save[0], base - 4);
- __raw_writel(chip->pm_save[2], base + OFFS_DAT);
- __raw_writel(chip->pm_save[3], base + OFFS_UP);
+ writel_relaxed(chip->pm_save[2], base + OFFS_DAT);
+ writel_relaxed(chip->pm_save[3], base + OFFS_UP);
if (chip->chip.ngpio > 8) {
S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n",
chip->chip.label, old_gpcon[0], old_gpcon[1],
- __raw_readl(base - 4),
- __raw_readl(base + OFFS_CON),
+ readl_relaxed(base - 4),
+ readl_relaxed(base + OFFS_CON),
old_gpdat, gps_gpdat);
} else
S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n",
chip->chip.label, old_gpcon[1],
- __raw_readl(base + OFFS_CON),
+ readl_relaxed(base + OFFS_CON),
old_gpdat, gps_gpdat);
}
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index e5b0f2c2d884..4a9223bc6965 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -88,14 +88,14 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{
void __iomem *regs = S3C_VA_UARTx(uart);
- save->ulcon = __raw_readl(regs + S3C2410_ULCON);
- save->ucon = __raw_readl(regs + S3C2410_UCON);
- save->ufcon = __raw_readl(regs + S3C2410_UFCON);
- save->umcon = __raw_readl(regs + S3C2410_UMCON);
- save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
+ save->ulcon = readl_relaxed(regs + S3C2410_ULCON);
+ save->ucon = readl_relaxed(regs + S3C2410_UCON);
+ save->ufcon = readl_relaxed(regs + S3C2410_UFCON);
+ save->umcon = readl_relaxed(regs + S3C2410_UMCON);
+ save->ubrdiv = readl_relaxed(regs + S3C2410_UBRDIV);
if (pm_uart_udivslot)
- save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
+ save->udivslot = readl_relaxed(regs + S3C2443_DIVSLOT);
S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
@@ -112,14 +112,14 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
s3c_pm_arch_update_uart(regs, save);
- __raw_writel(save->ulcon, regs + S3C2410_ULCON);
- __raw_writel(save->ucon, regs + S3C2410_UCON);
- __raw_writel(save->ufcon, regs + S3C2410_UFCON);
- __raw_writel(save->umcon, regs + S3C2410_UMCON);
- __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
+ writel_relaxed(save->ulcon, regs + S3C2410_ULCON);
+ writel_relaxed(save->ucon, regs + S3C2410_UCON);
+ writel_relaxed(save->ufcon, regs + S3C2410_UFCON);
+ writel_relaxed(save->umcon, regs + S3C2410_UMCON);
+ writel_relaxed(save->ubrdiv, regs + S3C2410_UBRDIV);
if (pm_uart_udivslot)
- __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
+ writel_relaxed(save->udivslot, regs + S3C2443_DIVSLOT);
}
static void s3c_pm_restore_uarts(void)
@@ -168,7 +168,7 @@ int s3c_irqext_wake(struct irq_data *data, unsigned int state)
void s3c_pm_do_save(struct sleep_save *ptr, int count)
{
for (; count > 0; count--, ptr++) {
- ptr->val = __raw_readl(ptr->reg);
+ ptr->val = readl_relaxed(ptr->reg);
S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
}
}
@@ -188,9 +188,9 @@ void s3c_pm_do_restore(const struct sleep_save *ptr, int count)
{
for (; count > 0; count--, ptr++) {
printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
- ptr->reg, ptr->val, __raw_readl(ptr->reg));
+ ptr->reg, ptr->val, readl_relaxed(ptr->reg));
- __raw_writel(ptr->val, ptr->reg);
+ writel_relaxed(ptr->val, ptr->reg);
}
}
@@ -208,7 +208,7 @@ void s3c_pm_do_restore(const struct sleep_save *ptr, int count)
void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count)
{
for (; count > 0; count--, ptr++)
- __raw_writel(ptr->val, ptr->reg);
+ writel_relaxed(ptr->val, ptr->reg);
}
/* s3c2410_pm_show_resume_irqs
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-24 11:48:02 +0000