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2015-01-23Merge remote-tracking branch 'lsk/v3.10/topic/arm64-perf' into linux-linaro-lskMark Brown
2015-01-22arm64: Add brackets around user_stack_pointer()Catalin Marinas
Commit 5f888a1d33 (ARM64: perf: support dwarf unwinding in compat mode) changes user_stack_pointer() to return the compat SP for 32-bit tasks but without brackets around the whole definition, with possible issues on the call sites (noticed with a subsequent fix for KSTK_ESP). Fixes: 5f888a1d33c4 (ARM64: perf: support dwarf unwinding in compat mode) Reported-by: Sudeep Holla <sudeep.holla@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 2520d039728b2a3c5ae7f79fe2a0e9d182855b12) Signed-off-by: Mark Brown <broonie@kernel.org>
2015-01-18Merge remote-tracking branch 'lsk/v3.10/topic/arm64-cpuidle' into ↵Mark Brown
linux-linaro-lsk Conflicts: arch/arm64/kernel/Makefile drivers/cpuidle/Makefile
2015-01-18arm64: kernel: introduce cpu_init_idle CPU operationLorenzo Pieralisi
The CPUidle subsystem on ARM64 machines requires the idle states implementation back-end to initialize idle states parameter upon boot. This patch adds a hook in the CPU operations structure that should be initialized by the CPU operations back-end in order to provide a function that initializes cpu idle states. This patch also adds the infrastructure to arm64 kernel required to export the CPU operations based initialization interface, so that drivers (ie CPUidle) can use it when they are initialized at probe time. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit d64f84f696463c58e1908510e45b0f5d450f737a) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/kernel/Makefile
2015-01-17Merge remote-tracking branch 'lsk/v3.10/topic/arm64-misc' into linux-linaro-lskMark Brown
Conflicts: arch/arm/include/asm/psci.h arch/arm/kernel/psci.c arch/arm/kernel/psci_smp.c arch/arm/kernel/setup.c arch/arm64/Kconfig arch/arm64/include/asm/cpu_ops.h arch/arm64/include/asm/pgtable.h arch/arm64/include/asm/psci.h arch/arm64/kernel/head.S arch/arm64/kernel/psci.c arch/arm64/kernel/ptrace.c
2014-10-31Merge tag 'v3.10.59' into linux-linaro-lskMark Brown
This is the 3.10.59 stable release
2014-10-30arm64: compat: fix compat types affecting struct compat_elf_prpsinfoVictor Kamensky
commit 971a5b6fe634bb7b617d8c5f25b6a3ddbc600194 upstream. The compat_elf_prpsinfo structure does not match the arch/arm struct elf_pspsinfo definition. As result NT_PRPSINFO note in core file created by arm64 kernel for aarch32 (compat) process has wrong size. So gdb cannot display command that caused process crash. Fix is to change size of __compat_uid_t, __compat_gid_t so it would match size of similar fields in arch/arm case. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-24arm64: Cast KSTK_(EIP|ESP) to unsigned longCatalin Marinas
This is for similarity with thread_saved_(pc|sp) and to avoid some compiler warnings in the audit code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit ebe6152e722b9df6b487a0d9464aeff216b6d364) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: Add CONFIG_CC_STACKPROTECTORLaura Abbott
arm64 currently lacks support for -fstack-protector. Add similar functionality to arm to detect stack corruption. Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Kees Cook <keescook@chromium.org> Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit c0c264ae5112d1cdb7d37d4e208b7a7e766a7418) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/Kconfig
2014-10-24arm64: implement TASK_SIZE_OFColin Cross
include/linux/sched.h implements TASK_SIZE_OF as TASK_SIZE if it is not set by the architecture headers. TASK_SIZE uses the current task to determine the size of the virtual address space. On a 64-bit kernel this will cause reading /proc/pid/pagemap of a 64-bit process from a 32-bit process to return EOF when it reads past 0xffffffff. Implement TASK_SIZE_OF exactly the same as TASK_SIZE with test_tsk_thread_flag instead of test_thread_flag. Cc: stable@vger.kernel.org Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit fa2ec3ea10bd377f9d55772b1dab65178425a1a2) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: mm: remove broken &= operator from pmd_mknotpresentWill Deacon
This should be a plain old '&' and could easily lead to undefined behaviour if the target of a pmd_mknotpresent invocation was the same as the parameter. Fixes: 9c7e535fcc17 (arm64: mm: Route pmd thp functions through pte equivalents) Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> # v3.15 Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit e3a920afc3482e954834a4ed95908c4bc5e4c000) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64/dma: Removing ARCH_HAS_DMA_GET_REQUIRED_MASK macroSuravee Suthikulpanit
Arm64 does not define dma_get_required_mask() function. Therefore, it should not define the ARCH_HAS_DMA_GET_REQUIRED_MASK. This causes build errors in some device drivers (e.g. mpt2sas) Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> (cherry picked from commit f3a183cb422574014538017b5b291a416396f97e) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/include/asm/dma-mapping.h
2014-10-24arm64: mm: fix pmd_write CoW brokennessWill Deacon
Commit 9c7e535fcc17 ("arm64: mm: Route pmd thp functions through pte equivalents") changed the pmd manipulator and accessor functions to convert the target pmd to a pte, process it with the pte functions, then convert it back. Along the way, we gained support for PTE_WRITE, however this is completely ignored by set_pmd_at, and so we fail to set the PMD_SECT_RDONLY for PMDs, resulting in all sorts of lovely failures (like CoW not working). Partially reverting the offending commit (by making use of PMD_SECT_RDONLY explicitly for pmd_{write,wrprotect,mkwrite} functions) leads to further issues because pmd_write can then return potentially incorrect values for page table entries marked as RDONLY, leading to BUG_ON(pmd_write(entry)) tripping under some THP workloads. This patch fixes the issue by routing set_pmd_at through set_pte_at, which correctly takes the PTE_WRITE flag into account. Given that THP mappings are always anonymous, the additional cache-flushing code in __sync_icache_dcache won't impose any significant overhead as the flush will be skipped. Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Steve Capper <steve.capper@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit ceb218359de22e70980801d4fa04fffbfc44adb8) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: mm: Route pmd thp functions through pte equivalentsSteve Capper
Rather than have separate hugetlb and transparent huge page pmd manipulation functions, re-wire our thp functions to simply call the pte equivalents. This allows THP to take advantage of the new PTE_WRITE logic introduced in: c2c93e5 arm64: mm: Introduce PTE_WRITE To represent splitting THPs we use the PTE_SPECIAL bit as this is not used for pmds. Signed-off-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 9c7e535fcc1725fc2e2d4f0d9dd14137f0243e23) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: lib: Implement optimized string length routineszhichang.yuan
This patch, based on Linaro's Cortex Strings library, adds an assembly optimized strlen() and strnlen() functions. Signed-off-by: Zhichang Yuan <zhichang.yuan@linaro.org> Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 0a42cb0a6fa64cb17db11164a1ad3511b43acefe) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: lib: Implement optimized string compare routineszhichang.yuan
This patch, based on Linaro's Cortex Strings library, adds an assembly optimized strcmp() and strncmp() functions. Signed-off-by: Zhichang Yuan <zhichang.yuan@linaro.org> Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 192c4d902f19b66902d7aacc19e9b169bebfb2e5) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24arm64: lib: Implement optimized memcmp routinezhichang.yuan
This patch, based on Linaro's Cortex Strings library, adds an assembly optimized memcmp() function. Signed-off-by: Zhichang Yuan <zhichang.yuan@linaro.org> Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit d875c9b3724083cd2629cd8507e424cd3716cd28) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-24Merge remote-tracking branch 'lsk/v3.10/topic/arm64-misc' into linux-linaro-lsklsk-v3.10-14.10Mark Brown
2014-10-23ARM: Check if a CPU has gone offlineAshwin Chaugule
PSCIv0.2 adds a new function called AFFINITY_INFO, which can be used to query if a specified CPU has actually gone offline. Calling this function via cpu_kill ensures that a CPU has quiesced after a call to cpu_die. This helps prevent the CPU from doing arbitrary bad things when data or instructions are clobbered (as happens with kexec) in the window between a CPU announcing that it is dead and said CPU leaving the kernel. Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit c814ca029e1015bb0ecec312f4bb9751ba1a711a) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/include/asm/cpu_ops.h
2014-10-23PSCI: Add initial support for PSCIv0.2 functionsAshwin Chaugule
The PSCIv0.2 spec defines standard values of function IDs and introduces a few new functions. Detect version of PSCI and appropriately select the right PSCI functions. Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit e71246a23acbc89e9cb4ebf1558d60e65733479f) Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-23arm64: barriers: use barrier() instead of smp_mb() when !SMPWill Deacon
The recently introduced acquire/release accessors refer to smp_mb() in the !CONFIG_SMP case. This is confusing when reading the code, so use barrier() directly when we know we're UP. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit be6209a6107e0f63544e3e7d00fd5c95434ec80a) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/include/asm/barrier.h
2014-10-23arm64: barriers: wire up new barrier optionsWill Deacon
Now that all callers of the barrier macros are updated to pass the mandatory options, update the macros so the option is actually used. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 493e68747e07b69da3d746352525a1ebd6b61d82) Signed-off-by: Mark Brown <broonie@kernel.org> Conflicts: arch/arm64/include/asm/barrier.h
2014-10-11Merge remote-tracking branch 'lsk/v3.10/topic/kvm' into linux-linaro-lskMark Brown
Conflicts: arch/arm/kvm/arm.c arch/arm64/Makefile arch/arm64/kernel/asm-offsets.c virt/kvm/kvm_main.c
2014-10-11Merge remote-tracking branch 'lsk/v3.10/topic/gicv3' into linux-linaro-lskMark Brown
Conflicts: drivers/irqchip/irq-gic.c include/linux/irqchip/arm-gic.h
2014-10-06Merge tag 'v3.10.56' into linux-linaro-lskMark Brown
This is the 3.10.56 stable release
2014-10-05arm64: ptrace: fix compat hardware watchpoint reportingWill Deacon
commit 27d7ff273c2aad37b28f6ff0cab2cfa35b51e648 upstream. I'm not sure what I was on when I wrote this, but when iterating over the hardware watchpoint array (hbp_watch_array), our index is off by ARM_MAX_BRP, so we walk off the end of our thread_struct... ... except, a dodgy condition in the loop means that it never executes at all (bp cannot be NULL). This patch fixes the code so that we remove the bp check and use the correct index for accessing the watchpoint structures. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-02arm/arm64: KVM: Report correct FSC for unsupported fault typesChristoffer Dall
When we catch something that's not a permission fault or a translation fault, we log the unsupported FSC in the kernel log, but we were masking off the bottom bits of the FSC which was not very helpful. Also correctly report the FSC for data and instruction faults rather than telling people it was a DFCS, which doesn't exist in the ARM ARM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 0496daa5cf99741ce8db82686b4c7446a37feabb) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm/arm64: KVM: Fix VTTBR_BADDR_MASK and pgd allocJoel Schopp
The current aarch64 calculation for VTTBR_BADDR_MASK masks only 39 bits and not all the bits in the PA range. This is clearly a bug that manifests itself on systems that allocate memory in the higher address space range. [ Modified from Joel's original patch to be based on PHYS_MASK_SHIFT instead of a hard-coded value and to move the alignment check of the allocation to mmu.c. Also added a comment explaining why we hardcode the IPA range and changed the stage-2 pgd allocation to be based on the 40 bit IPA range instead of the maximum possible 48 bit PA range. - Christoffer ] Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Joel Schopp <joel.schopp@amd.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit dbff124e29fa24aff9705b354b5f4648cd96e0bb) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm/arm64: KVM: vgic: make number of irqs a configurable attributeMarc Zyngier
In order to make the number of interrupts configurable, use the new fancy device management API to add KVM_DEV_ARM_VGIC_GRP_NR_IRQS as a VGIC configurable attribute. Userspace can now specify the exact size of the GIC (by increments of 32 interrupts). Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit a98f26f183801685ef57333de4bafd4bbc692c7c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault()Ard Biesheuvel
The ISS encoding for an exception from a Data Abort has a WnR bit[6] that indicates whether the Data Abort was caused by a read or a write instruction. While there are several fields in the encoding that are only valid if the ISV bit[24] is set, WnR is not one of them, so we can read it unconditionally. Instead of fixing both implementations of kvm_is_write_fault() in place, reimplement it just once using kvm_vcpu_dabt_iswrite(), which already does the right thing with respect to the WnR bit. Also fix up the callers to pass 'vcpu' Acked-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit a7d079cea2dffb112e26da2566dd84c0ef1fce97) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: remove garbage arg to *hardware_{en,dis}ableRadim Krčmář
In the beggining was on_each_cpu(), which required an unused argument to kvm_arch_ops.hardware_{en,dis}able, but this was soon forgotten. Remove unnecessary arguments that stem from this. Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 13a34e067eab24fec882e1834fbf2cc31911d474) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: static inline empty kvm_arch functionsRadim Krčmář
Using static inline is going to save few bytes and cycles. For example on powerpc, the difference is 700 B after stripping. (5 kB before) This patch also deals with two overlooked empty functions: kvm_arch_flush_shadow was not removed from arch/mips/kvm/mips.c 2df72e9bc KVM: split kvm_arch_flush_shadow and kvm_arch_sched_in never made it into arch/ia64/kvm/kvm-ia64.c. e790d9ef6 KVM: add kvm_arch_sched_in Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 0865e636aef751966e6e0f8950a26bc7391e923c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: forward declare structs in kvm_types.hPaolo Bonzini
Opaque KVM structs are useful for prototypes in asm/kvm_host.h, to avoid "'struct foo' declared inside parameter list" warnings (and consequent breakage due to conflicting types). Move them from individual files to a generic place in linux/kvm_types.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 656473003bc7e056c3bbd4a4d9832dad01e86f76) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: ARM/arm64: fix broken __percpu annotationWill Deacon
Running sparse results in a bunch of noisy address space mismatches thanks to the broken __percpu annotation on kvm_get_running_vcpus. This function returns a pcpu pointer to a pointer, not a pointer to a pcpu pointer. This patch fixes the annotation, which kills the warnings from sparse. Cc: Christoffer Dall <christoffer.dall@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 4000be423cb01a8d09de878bb8184511c49d4238) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: ARM/arm64: fix non-const declaration of function returning constWill Deacon
Sparse kicks up about a type mismatch for kvm_target_cpu: arch/arm64/kvm/guest.c:271:25: error: symbol 'kvm_target_cpu' redeclared with different type (originally declared at ./arch/arm64/include/asm/kvm_host.h:45) - different modifiers so fix this by adding the missing const attribute to the function declaration. Cc: Christoffer Dall <christoffer.dall@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 6951e48bff0b55d2a8e825a953fc1f8e3a34bf1c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm/arm64: KVM: Support KVM_CAP_READONLY_MEMChristoffer Dall
When userspace loads code and data in a read-only memory regions, KVM needs to be able to handle this on arm and arm64. Specifically this is used when running code directly from a read-only flash device; the common scenario is a UEFI blob loaded with the -bios option in QEMU. Note that the MMIO exit on writes to a read-only memory is ABI and can be used to emulate block-erase style flash devices. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 98047888bb9fd57734028c44ec17413ddd623958) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: fix 64bit CP15 VM access for 32bit guestsMarc Zyngier
Commit f0a3eaff71b8 (ARM64: KVM: fix big endian issue in access_vm_reg for 32bit guest) changed the way we handle CP15 VM accesses, so that all 64bit accesses are done via vcpu_sys_reg. This looks like a good idea as it solves indianness issues in an elegant way, except for one small detail: the register index is doesn't refer to the same array! We end up corrupting some random data structure instead. Fix this by reverting to the original code, except for the introduction of a vcpu_cp15_64_high macro that deals with the endianness thing. Tested on Juno with 32bit SMP guests. Cc: Victor Kamensky <victor.kamensky@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit dedf97e8ff2c7513b1370e36b56e08b6bd0f0290) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: add trap handlers for AArch32 debug registersMarc Zyngier
Add handlers for all the AArch32 debug registers that are accessible from EL0 or EL1. The code follow the same strategy as the AArch64 counterpart with regards to tracking the dirty state of the debug registers. Reviewed-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit bdfb4b389c8d8f07e2d5b8e1291e01c789ba4aad) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: common infrastructure for handling AArch32 CP14/CP15Marc Zyngier
As we're about to trap a bunch of CP14 registers, let's rework the CP15 handling so it can be generalized and work with multiple tables. Reviewed-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 72564016aae45f42e488f926bc803f9a2e1c771c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: add trap handlers for AArch64 debug registersMarc Zyngier
Add handlers for all the AArch64 debug registers that are accessible from EL0 or EL1. The trapping code keeps track of the state of the debug registers, allowing for the switch code to implement a lazy switching strategy. Reviewed-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 0c557ed4983b7abe152212b5b1726c2a789b2c61) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: move DBG_MDSCR_* to asm/debug-monitors.hMarc Zyngier
In order to be able to use the DBG_MDSCR_* macros from the KVM code, move the relevant definitions to the obvious include file. Also move the debug_el enum to a portion of the file that is guarded by #ifndef __ASSEMBLY__ in order to use that file from assembly code. Acked-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 51ba248164d0eeb8b4f94d405430c18a56c6ac9a) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02ARM64: KVM: fix big endian issue in access_vm_reg for 32bit guestVictor Kamensky
Fix issue with 32bit guests running on top of BE KVM host. Indexes of high and low words of 64bit cp15 register are swapped in case of big endian code, since 64bit cp15 state is restored or saved with double word write or read instruction. Define helper macro to access low words of 64bit cp15 register. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit f0a3eaff71b8bd5d5acfda1f0cf3eedf49755622) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02ARM64: KVM: MMIO support BE host running LE codeVictor Kamensky
In case of guest CPU running in LE mode and host runs in BE mode we need byteswap data, so read/write is emulated correctly. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit b30070862edbdb252f9d0d3a1e61b8dc4c68e3d2) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: vgic: enable GICv2 emulation on top on GICv3 hardwareMarc Zyngier
Add the last missing bits that enable GICv2 emulation on top of GICv3 hardware. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 67b2abfedb7b861bead93400fa315c5c30879d51) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: vgic: add GICv3 world switchMarc Zyngier
Introduce the GICv3 world switch code used to save/restore the GICv3 context. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 754d37726010d872f1f714a8ce8920acdfa4978c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02KVM: ARM: vgic: add the GICv3 backendMarc Zyngier
Introduce the support code for emulating a GICv2 on top of GICv3 hardware. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit b2fb1c0d378399e1427a91bb991c094f2ca09a2f) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: move HCR_EL2.{IMO,FMO} manipulation into the vgic switch codeMarc Zyngier
GICv3 requires the IMO and FMO bits to be tightly coupled with some of the interrupt controller's register switch. In order to have similar code paths, move the manipulation of these bits to the GICv2 switch code. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit ac3c3747e2db2f326ffc601651de544cdd33a8e9) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: split GICv2 world switch from hyp codeMarc Zyngier
Move the GICv2 world switch code into its own file, and add the necessary indirection to the arm64 switch code. Also introduce a new type field to the vgic_params structure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 1a9b13056dde7e3092304d6041ccc60a913042ea) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: remove __kvm_hyp_code_{start,end} from hyp.SMarc Zyngier
We already have __hyp_text_{start,end} to express the boundaries of the HYP text section, and __kvm_hyp_code_{start,end} are getting in the way of a more modular world switch code. Just turn __kvm_hyp_code_{start,end} into #defines mapping the linker-emited symbols. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 45451914c875bba44903ce4f1445e047b7992bf7) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm/arm64: KVM: Fix and refactor unmap_rangeChristoffer Dall
unmap_range() was utterly broken, to quote Marc, and broke in all sorts of situations. It was also quite complicated to follow and didn't follow the usual scheme of having a separate iterating function for each level of page tables. Address this by refactoring the code and introduce a pgd_clear() function. Reviewed-by: Jungseok Lee <jays.lee@samsung.com> Reviewed-by: Mario Smarduch <m.smarduch@samsung.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 4f853a714bf16338ff5261128e6c7ae2569e9505) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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