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2014-10-11Merge remote-tracking branch 'lsk/v3.10/topic/kvm' into linux-linaro-lskMark Brown
Conflicts: arch/arm/kvm/arm.c arch/arm64/Makefile arch/arm64/kernel/asm-offsets.c virt/kvm/kvm_main.c
2014-10-02arm/arm64: KVM: vgic: make number of irqs a configurable attributeMarc Zyngier
In order to make the number of interrupts configurable, use the new fancy device management API to add KVM_DEV_ARM_VGIC_GRP_NR_IRQS as a VGIC configurable attribute. Userspace can now specify the exact size of the GIC (by increments of 32 interrupts). Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit a98f26f183801685ef57333de4bafd4bbc692c7c) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm/arm64: KVM: Support KVM_CAP_READONLY_MEMChristoffer Dall
When userspace loads code and data in a read-only memory regions, KVM needs to be able to handle this on arm and arm64. Specifically this is used when running code directly from a read-only flash device; the common scenario is a UEFI blob loaded with the -bios option in QEMU. Note that the MMIO exit on writes to a read-only memory is ABI and can be used to emulate block-erase style flash devices. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 98047888bb9fd57734028c44ec17413ddd623958) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: Enable minimalistic support for Cortex-A53Marc Zyngier
In order to allow KVM to run on Cortex-A53 implementations, wire the minimal support required. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 1252b3313642c3d0dff5b951b625468bf0dcd059) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02ARM/ARM64: KVM: Add base for PSCI v0.2 emulationAnup Patel
Currently, the in-kernel PSCI emulation provides PSCI v0.1 interface to VCPUs. This patch extends current in-kernel PSCI emulation to provide PSCI v0.2 interface to VCPUs. By default, ARM/ARM64 KVM will always provide PSCI v0.1 interface for keeping the ABI backward-compatible. To select PSCI v0.2 interface for VCPUs, the user space (i.e. QEMU or KVMTOOL) will have to set KVM_ARM_VCPU_PSCI_0_2 feature when doing VCPU init using KVM_ARM_VCPU_INIT ioctl. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 7d0f84aae9e231930985eaff63ac91b61aaa15d6) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: Add VGIC device control for arm64Christoffer Dall
This fixes the build breakage introduced by c07a0191ef2de1f9510f12d1f88e3b0b5cd8d66f and adds support for the device control API and save/restore of the VGIC state for ARMv8. The defines were simply missing from the arm64 header files and uaccess.h must be implicitly imported from somewhere else on arm. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 2a2f3e269c75edf916de5967079069aeb6a601cb) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: Support X-Gene guest VCPU on APM X-Gene hostAnup Patel
This patch allows us to have X-Gene guest VCPU when using KVM arm64 on APM X-Gene host. We add KVM_ARM_TARGET_XGENE_POTENZA for X-Gene Potenza compatible guest VCPU and we return KVM_ARM_TARGET_XGENE_POTENZA in kvm_target_cpu() when running on X-Gene host with Potenza core. [maz: sanitized the commit log] Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit e28100bd8ed9e37b7cd4578140a1e7f95bd40835) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02ARM/KVM: save and restore generic timer registersAndre Przywara
For migration to work we need to save (and later restore) the state of each core's virtual generic timer. Since this is per VCPU, we can use the [gs]et_one_reg ioctl and export the three needed registers (control, counter, compare value). Though they live in cp15 space, we don't use the existing list, since they need special accessor functions and the arch timer is optional. Acked-by: Marc Zynger <marc.zyngier@arm.com> Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 39735a3a390431bcf60f9174b7d64f787fd6afa9) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: enable initialization of a 32bit vcpuMarc Zyngier
Wire the init of a 32bit vcpu by allowing 32bit modes in pstate, and providing sensible defaults out of reset state. This feature is of course conditioned by the presence of 32bit capability on the physical CPU, and is checked by the KVM_CAP_ARM_EL1_32BIT capability. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 0d854a60b1d7d39a37b25dd28f63cfa0df637b91) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: define 32bit specific registersMarc Zyngier
Define the 32bit specific registers (SPSRs, cp15...). Most CPU registers are directly mapped to a 64bit register (r0->x0...). Only the SPSRs have separate registers. cp15 registers are also mapped into their 64bit counterpart in most cases. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 40033a614ea3db196d57c477ca328f44eb1e4df0) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: PSCI implementationMarc Zyngier
Wire the PSCI backend into the exit handling code. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit dcd2e40c1e1cce302498d16d095b0f8a30326f74) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: system register handlingMarc Zyngier
Provide 64bit system register handling, modeled after the cp15 handling for ARM. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 7c8c5e6a9101ea57a1c2c9faff0917e79251a21e) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-10-02arm64: KVM: user space interfaceMarc Zyngier
Provide the kvm.h file that defines the user space visible interface. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> (cherry picked from commit 54f81d0eb93896da73d1636bca84cf90f52cabdf) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-05-22Merge remote-tracking branch 'lsk/v3.10/topic/arm64-perf' into linux-linaro-lskMark Brown
Conflicts: arch/arm64/kernel/Makefile
2014-05-21ARM64: perf: add support for perf registers APIJean Pihet
This patch implements the functions required for the perf registers API, allowing the perf tool to interface kernel register dumps with libunwind in order to provide userspace backtracing. Compat mode is also supported. Only the general purpose user space registers are exported, i.e.: PERF_REG_ARM_X0, ... PERF_REG_ARM_X28, PERF_REG_ARM_FP, PERF_REG_ARM_LR, PERF_REG_ARM_SP, PERF_REG_ARM_PC and not the PERF_REG_ARM_V* registers. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 2ee0d7fd36a3f87bc5b29b1ec54ad6728deedb41) Signed-off-by: Mark Brown <broonie@linaro.org> Conflicts: arch/arm64/kernel/Makefile
2014-05-20Merge remote-tracking branch 'lsk/v3.10/topic/arm64-crypto' into ↵Mark Brown
linux-linaro-lsk Conflicts: arch/arm64/include/asm/arch_timer.h arch/arm64/include/asm/hwcap.h arch/arm64/include/uapi/asm/hwcap.h arch/arm64/kernel/setup.c
2014-05-19arm64: Add hwcaps for crypto and CRC32 extensions.Steve Capper
Advertise the optional cryptographic and CRC32 instructions to user space where present. Several hwcap bits [3-7] are allocated. Signed-off-by: Steve Capper <steve.capper@linaro.org> [bit 2 is taken now so use bits 3-7 instead] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 4bff28ccda2b7a3fbdf8e80aef7a599284681dc6) Signed-off-by: Mark Brown <broonie@linaro.org>
2014-05-05ARM64: arch_timer: add support to configure and enable event streamSudeep KarkadaNagesha
This patch adds support for configuring the event stream frequency and enabling it. It also adds the hwcaps as well as compat-specific definitions to the user to detect this event stream feature. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> (cherry picked from commit 46efe547aca8498d51b64460c02366ae4032ca32) Signed-off-by: Alex Shi <alex.shi@linaro.org> Conflicts: arch/arm64/include/asm/arch_timer.h
2014-04-28ARM64: arch_timer: add support to configure and enable event streamSudeep KarkadaNagesha
This patch adds support for configuring the event stream frequency and enabling it. It also adds the hwcaps as well as compat-specific definitions to the user to detect this event stream feature. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> (cherry picked from commit 46efe547aca8498d51b64460c02366ae4032ca32) Signed-off-by: Alex Shi <alex.shi@linaro.org> Conflicts: arch/arm64/include/asm/arch_timer.h
2014-03-13arm64: big-endian: fix byteorder includeWill Deacon
For big-endian processors, we must include linux/byteorder/big_endian.h to get the relevant definitions for swabbing between CPU order and a defined endianness. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit c194520ada7c8f2eddec5ebf24982483b49736a0) Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
2013-01-29arm64: Add kvm_para.h and xor.h generic headersCatalin Marinas
Required for make allyesconfig. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2012-10-18arm64: ptrace: make structure padding explicit for debug registersWill Deacon
The user_hwdebug_state structure contains implicit padding to conform to the alignment requirements of the AArch64 ABI (namely that aggregates must be aligned to their most aligned member). This patch fixes the ptrace functions operating on struct user_hwdebug_state so that the padding is handled correctly. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2012-10-11UAPI: (Scripted) Disintegrate arch/arm64/include/asmDavid Howells
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
2012-10-02UAPI: (Scripted) Set up UAPI Kbuild filesDavid Howells
Set up empty UAPI Kbuild files to be populated by the header splitter. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
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