From ca148125e6134de334b61822539d220794d8da18 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 1 Jun 2010 13:18:15 -0700 Subject: MIPS: Octeon: Implement delays with cycle counter. Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/octeon/octeon.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/include/asm/octeon') diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index c29debe7a8ad..917a6c413b1a 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -50,6 +50,7 @@ extern void octeon_crypto_disable(struct octeon_cop2_state *state, extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task); extern void octeon_init_cvmcount(void); +extern void octeon_setup_delays(void); #define OCTEON_ARGV_MAX_ARGS 64 #define OCTOEN_SERIAL_LEN 20 -- cgit v1.2.3