diff options
author | Will Deacon <will.deacon@arm.com> | 2018-02-05 15:34:16 +0000 |
---|---|---|
committer | Alex Shi <alex.shi@linaro.org> | 2018-03-22 16:48:59 +0800 |
commit | 986f9bd628aac1c0d2a7ab010b9ee6a89688da06 (patch) | |
tree | 9d8ed2697b89dc246ff60222f640af109c94fd51 | |
parent | c73cf78fef4f53aedf1499f64483a859a0d5dde3 (diff) |
arm64: barrier: Add CSDB macros to control data-value prediction
commit 669474e772b9 upstream.
For CPUs capable of data value prediction, CSDB waits for any outstanding
predictions to architecturally resolve before allowing speculative execution
to continue. Provide macros to expose it to the arch code.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Alex Shi <alex.shi@linaro.org>
-rw-r--r-- | arch/arm64/include/asm/assembler.h | 16 | ||||
-rw-r--r-- | arch/arm64/include/asm/barrier.h | 2 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 290e13428f4a..9d56fe5fe69c 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -98,6 +98,22 @@ .endm /* + * Value prediction barrier + */ + .macro csdb + hint #20 + .endm + +/* + * NOP sequence + */ + .macro nops, num + .rept \num + nop + .endr + .endm + +/* * Emit an entry into the exception table */ .macro _asm_extable, from, to diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index f2d2c0bbe21b..574486634c62 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -28,6 +28,8 @@ #define dmb(opt) asm volatile("dmb " #opt : : : "memory") #define dsb(opt) asm volatile("dsb " #opt : : : "memory") +#define csdb() asm volatile("hint #20" : : : "memory") + #define mb() dsb(sy) #define rmb() dsb(ld) #define wmb() dsb(st) |