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| author | Kevin Hilman <khilman@linaro.org> | 2015-11-04 10:01:20 -0800 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2015-11-04 10:01:20 -0800 |
| commit | 49bd04cb11e57c4cd4d2c00feca898537dd6db1f (patch) | |
| tree | 846c594b2b1d2f203c24ff32569b6c615822a5dc /arch/arm/mach-shmobile/headsmp-scu.S | |
| parent | 260409578ecbf7ce1725b85f9c082312bff808c0 (diff) | |
| parent | 12ba397b828b7e7f5d28a73e9a2ee14470b7edc7 (diff) | |
Merge tag 'v4.1.12-rt12' of git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel into v4.1/topic/rtv4.1/topic/rt
v4.1.12-rt12
Diffstat (limited to 'arch/arm/mach-shmobile/headsmp-scu.S')
| -rw-r--r-- | arch/arm/mach-shmobile/headsmp-scu.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S index 69df8bfac167..fa5248c52399 100644 --- a/arch/arm/mach-shmobile/headsmp-scu.S +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -22,7 +22,7 @@ * Boot code for secondary CPUs. * * First we turn on L1 cache coherency for our CPU. Then we jump to - * shmobile_invalidate_start that invalidates the cache and hands over control + * secondary_startup that invalidates the cache and hands over control * to the common ARM startup code. */ ENTRY(shmobile_boot_scu) @@ -36,7 +36,7 @@ ENTRY(shmobile_boot_scu) bic r2, r2, r3 @ Clear bits of our CPU (Run Mode) str r2, [r0, #8] @ write back - b shmobile_invalidate_start + b secondary_startup ENDPROC(shmobile_boot_scu) .text |