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| author | Alex Shi <alex.shi@linaro.org> | 2017-05-31 12:02:43 +0800 |
|---|---|---|
| committer | Alex Shi <alex.shi@linaro.org> | 2017-05-31 12:02:43 +0800 |
| commit | a898540914d4136f29bc738ce593c1c501006f23 (patch) | |
| tree | 9440b7f76c029143611c89ed919718ba6ff353f4 /arch/powerpc/kernel/setup_64.c | |
| parent | d97f745e1d2fea4d2f308e5e06eee81a9a84f3f5 (diff) | |
| parent | 56d847e3ef9433d7ac92376e4ba49d3cf3cb70d2 (diff) | |
Merge tag 'v4.1.40' into linux-linaro-lsk-v4.1lsk-v4.1-17.06lsk-v4.1-17.05linux-linaro-lsk-v4.1
This is the 4.1.40 stable release
Diffstat (limited to 'arch/powerpc/kernel/setup_64.c')
| -rw-r--r-- | arch/powerpc/kernel/setup_64.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index c69671c03c3b..6844e1f29a96 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -212,6 +212,15 @@ static void cpu_ready_for_interrupts(void) unsigned long lpcr = mfspr(SPRN_LPCR); mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); } + + /* + * Fixup HFSCR:TM based on CPU features. The bit is set by our + * early asm init because at that point we haven't updated our + * CPU features from firmware and device-tree. Here we have, + * so let's do it. + */ + if (cpu_has_feature(CPU_FTR_HVMODE) && !cpu_has_feature(CPU_FTR_TM_COMP)) + mtspr(SPRN_HFSCR, mfspr(SPRN_HFSCR) & ~HFSCR_TM); } /* |