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| author | Alex Shi <alex.shi@linaro.org> | 2017-09-24 22:45:01 -0700 |
|---|---|---|
| committer | Alex Shi <alex.shi@linaro.org> | 2017-09-24 22:45:01 -0700 |
| commit | 1cfb9d628fa24c0a8b24cd604ae62dfa10a0d716 (patch) | |
| tree | 4e57e7465ce5fbc2a6cc838fd78e5e8a2b9799ff /arch/sparc/kernel/tsb.S | |
| parent | d595150285cf886cf2399fd74b0eeb43b444c706 (diff) | |
| parent | 7ecc9777c5c76d7b31c376ffd4f59c4a85472a1b (diff) | |
Merge branch 'linux-linaro-lsk-v4.9' into v4.9/topic/ionv4.9/topic/ion
Diffstat (limited to 'arch/sparc/kernel/tsb.S')
| -rw-r--r-- | arch/sparc/kernel/tsb.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sparc/kernel/tsb.S b/arch/sparc/kernel/tsb.S index 395ec1800530..7d961f6e3907 100644 --- a/arch/sparc/kernel/tsb.S +++ b/arch/sparc/kernel/tsb.S @@ -375,6 +375,7 @@ tsb_flush: * %o1: TSB base config pointer * %o2: TSB huge config pointer, or NULL if none * %o3: Hypervisor TSB descriptor physical address + * %o4: Secondary context to load, if non-zero * * We have to run this whole thing with interrupts * disabled so that the current cpu doesn't change @@ -387,6 +388,17 @@ __tsb_context_switch: rdpr %pstate, %g1 wrpr %g1, PSTATE_IE, %pstate + brz,pn %o4, 1f + mov SECONDARY_CONTEXT, %o5 + +661: stxa %o4, [%o5] ASI_DMMU + .section .sun4v_1insn_patch, "ax" + .word 661b + stxa %o4, [%o5] ASI_MMU + .previous + flush %g6 + +1: TRAP_LOAD_TRAP_BLOCK(%g2, %g3) stx %o0, [%g2 + TRAP_PER_CPU_PGD_PADDR] |