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authorKevin Hilman <khilman@linaro.org>2015-06-29 10:27:46 -0700
committerKevin Hilman <khilman@linaro.org>2015-06-29 10:27:46 -0700
commit7863a65cb422a2979b89bd1d93884091464944a0 (patch)
tree4221ca69ad1bd569b5cec9aed5601bcb8bf60fe9 /arch/x86
parent94865bf8aa24aa359903de3c858a517243e20263 (diff)
parente99d350e5ba34ef020d2f3bf585134571f1bb323 (diff)
Merge tag 'v3.14.44' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into linux-linaro-lsk-v3.14-rt
This is the 3.14.44 stable release * tag 'v3.14.44' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (63 commits) Linux 3.14.44 fs/binfmt_elf.c:load_elf_binary(): return -EINVAL on zero-length mappings vfs: read file_handle only once in handle_to_path drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling" drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling drm/radeon: add new bonaire pci id ACPI / init: Fix the ordering of acpi_reserve_resources() sd: Disable support for 256 byte/sector disks storvsc: Set the SRB flags correctly when no data transfer is needed Input: elantech - fix semi-mt protocol for v3 HW rtlwifi: rtl8192cu: Fix kernel deadlock md/raid0: fix restore to sector variable in raid0_make_request md/raid5: don't record new size if resize_stripes fails. thermal: step_wise: Revert optimization svcrpc: fix potential GSSX_ACCEPT_SEC_CONTEXT decoding failures mm, numa: really disable NUMA balancing by default on single node machines tools/vm: fix page-flags build ARM: fix missing syscall trace exit ARM: dts: imx27: only map 4 Kbyte for fec registers mac80211: move WEP tailroom size check ...
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kvm/mmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 32e5329ab0b6..5ba31d053088 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -4073,7 +4073,7 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
++vcpu->kvm->stat.mmu_pte_write;
kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
- mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
+ mask.cr0_wp = mask.cr4_pae = mask.nxe = mask.smep_andnot_wp = 1;
for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
if (detect_write_misaligned(sp, gpa, bytes) ||
detect_write_flooding(sp)) {