diff options
| author | CQ Tang <cq.tang@intel.com> | 2016-01-13 21:15:03 +0000 |
|---|---|---|
| committer | Sasha Levin <sasha.levin@oracle.com> | 2016-02-23 00:46:35 -0500 |
| commit | 789a2e5a69bc3dd5197b8f51451359d06c4ac8a1 (patch) | |
| tree | c0e239b538730a359da9f48ee8801704cdecaf0c /drivers/iommu | |
| parent | 83fdace666f72dbfc4a7681a04e3689b61dae3b9 (diff) | |
iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG
[ Upstream commit fda3bec12d0979aae3f02ee645913d66fbc8a26e ]
This is a 32-bit register. Apparently harmless on real hardware, but
causing justified warnings in simulation.
Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/dmar.c | 2 | ||||
| -rw-r--r-- | drivers/iommu/intel_irq_remapping.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 9847613085e1..5a2ec39e1fd9 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -1342,7 +1342,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index 5709ae9c3e77..04b39be8f1f3 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -544,7 +544,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end; |