diff options
-rw-r--r-- | Documentation/devicetree/bindings/arm/coresight.txt | 4 | ||||
-rw-r--r-- | Documentation/trace/coresight.txt | 4 | ||||
-rw-r--r-- | drivers/coresight/coresight-etb10.c | 14 | ||||
-rw-r--r-- | drivers/coresight/coresight-etm3x.c | 24 | ||||
-rw-r--r-- | drivers/coresight/coresight-funnel.c | 12 | ||||
-rw-r--r-- | drivers/coresight/coresight-priv.h | 2 | ||||
-rw-r--r-- | drivers/coresight/coresight-replicator.c | 2 | ||||
-rw-r--r-- | drivers/coresight/coresight-tmc.c | 12 | ||||
-rw-r--r-- | drivers/coresight/coresight-tpiu.c | 12 | ||||
-rw-r--r-- | drivers/coresight/coresight.c | 11 | ||||
-rw-r--r-- | drivers/coresight/of_coresight.c | 22 | ||||
-rw-r--r-- | include/linux/coresight.h | 22 |
12 files changed, 46 insertions, 95 deletions
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index d790f49066f3..a3089359aaa6 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -38,8 +38,6 @@ its hardware characteristcs. AMBA markee): - "arm,coresight-replicator" - * id: a unique number that will identify this replicator. - * port or ports: same as above. * Optional properties for ETM/PTMs: @@ -94,8 +92,6 @@ Example: * AMBA bus. As such no need to add "arm,primecell". */ compatible = "arm,coresight-replicator"; - /* this will show up in debugfs as "0.replicator" */ - id = <0>; ports { #address-cells = <1>; diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt index bba7dbfc49ed..02361552a3ea 100644 --- a/Documentation/trace/coresight.txt +++ b/Documentation/trace/coresight.txt @@ -46,7 +46,7 @@ At typical coresight system would look like this: | | . | ! | | . | ! | ! . | | SWD/ | | . | ! | | . | ! | ! . | | JTAG *****************************************************************<-| - *************************** AMBA Debug ABP ************************ + *************************** AMBA Debug APB ************************ ***************************************************************** | . ! . ! ! . | | . * . * * . | @@ -79,7 +79,7 @@ At typical coresight system would look like this: To trace port TPIU= Trace Port Interface Unit SWD = Serial Wire Debug -While on target configuration of the components is done via the ABP bus, +While on target configuration of the components is done via the APB bus, all trace data are carried out-of-band on the ATB bus. The CTM provides a way to aggregate and distribute signals between CoreSight components. diff --git a/drivers/coresight/coresight-etb10.c b/drivers/coresight/coresight-etb10.c index c922d4aded8a..c9acd406f0d0 100644 --- a/drivers/coresight/coresight-etb10.c +++ b/drivers/coresight/coresight-etb10.c @@ -454,7 +454,7 @@ static int etb_probe(struct amba_device *adev, const struct amba_id *id) if (ret) return ret; - drvdata->buffer_depth = etb_get_buffer_depth(drvdata); + drvdata->buffer_depth = etb_get_buffer_depth(drvdata); clk_disable_unprepare(drvdata->clk); if (drvdata->buffer_depth < 0) @@ -521,17 +521,7 @@ static struct amba_driver etb_driver = { .id_table = etb_ids, }; -static int __init etb_init(void) -{ - return amba_driver_register(&etb_driver); -} -module_init(etb_init); - -static void __exit etb_exit(void) -{ - amba_driver_unregister(&etb_driver); -} -module_exit(etb_exit); +module_amba_driver(etb_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("CoreSight Embedded Trace Buffer driver"); diff --git a/drivers/coresight/coresight-etm3x.c b/drivers/coresight/coresight-etm3x.c index d9e3ed6aa857..c965f5724abd 100644 --- a/drivers/coresight/coresight-etm3x.c +++ b/drivers/coresight/coresight-etm3x.c @@ -34,14 +34,8 @@ #include "coresight-etm.h" -#ifdef CONFIG_CORESIGHT_SOURCE_ETM_DEFAULT_ENABLE -static int boot_enable = 1; -#else static int boot_enable; -#endif -module_param_named( - boot_enable, boot_enable, int, S_IRUGO -); +module_param_named(boot_enable, boot_enable, int, S_IRUGO); /* The number of ETM/PTM currently registered */ static int etm_count; @@ -573,7 +567,8 @@ static ssize_t mode_store(struct device *dev, if (drvdata->mode & ETM_MODE_STALL) { if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) { dev_warn(drvdata->dev, "stall mode not supported\n"); - return -EINVAL; + ret = -EINVAL; + goto err_unlock; } drvdata->ctrl |= ETMCR_STALL_MODE; } else @@ -582,7 +577,8 @@ static ssize_t mode_store(struct device *dev, if (drvdata->mode & ETM_MODE_TIMESTAMP) { if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) { dev_warn(drvdata->dev, "timestamp not supported\n"); - return -EINVAL; + ret = -EINVAL; + goto err_unlock; } drvdata->ctrl |= ETMCR_TIMESTAMP_EN; } else @@ -595,6 +591,10 @@ static ssize_t mode_store(struct device *dev, spin_unlock(&drvdata->spinlock); return size; + +err_unlock: + spin_unlock(&drvdata->spinlock); + return ret; } static DEVICE_ATTR_RW(mode); @@ -1743,7 +1743,11 @@ static void etm_init_arch_data(void *info) static void etm_init_default_data(struct etm_drvdata *drvdata) { - static int etm3x_traceid; + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and will be just as good. + */ + static int etm3x_traceid = 0x10; u32 flags = (1 << 0 | /* instruction execute*/ 3 << 3 | /* ARM instruction */ diff --git a/drivers/coresight/coresight-funnel.c b/drivers/coresight/coresight-funnel.c index 2108edffe1f4..3db36f70b666 100644 --- a/drivers/coresight/coresight-funnel.c +++ b/drivers/coresight/coresight-funnel.c @@ -252,17 +252,7 @@ static struct amba_driver funnel_driver = { .id_table = funnel_ids, }; -static int __init funnel_init(void) -{ - return amba_driver_register(&funnel_driver); -} -module_init(funnel_init); - -static void __exit funnel_exit(void) -{ - amba_driver_unregister(&funnel_driver); -} -module_exit(funnel_exit); +module_amba_driver(funnel_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("CoreSight Funnel driver"); diff --git a/drivers/coresight/coresight-priv.h b/drivers/coresight/coresight-priv.h index 7b3372fca4f6..62fcd98cc7cf 100644 --- a/drivers/coresight/coresight-priv.h +++ b/drivers/coresight/coresight-priv.h @@ -57,7 +57,7 @@ extern int etm_readl_cp14(u32 off, unsigned int *val); extern int etm_writel_cp14(u32 off, u32 val); #else static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; } -static inline int etm_writel_cp14(u32 val, u32 off) { return 0; } +static inline int etm_writel_cp14(u32 off, u32 val) { return 0; } #endif #endif diff --git a/drivers/coresight/coresight-replicator.c b/drivers/coresight/coresight-replicator.c index a2dfcf903551..cdf05537d574 100644 --- a/drivers/coresight/coresight-replicator.c +++ b/drivers/coresight/coresight-replicator.c @@ -87,7 +87,7 @@ static int replicator_probe(struct platform_device *pdev) return -ENOMEM; desc->type = CORESIGHT_DEV_TYPE_LINK; - desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; + desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; desc->ops = &replicator_cs_ops; desc->pdata = pdev->dev.platform_data; desc->dev = &pdev->dev; diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c index ce2c293f1707..3ff232f9ddf7 100644 --- a/drivers/coresight/coresight-tmc.c +++ b/drivers/coresight/coresight-tmc.c @@ -760,17 +760,7 @@ static struct amba_driver tmc_driver = { .id_table = tmc_ids, }; -static int __init tmc_init(void) -{ - return amba_driver_register(&tmc_driver); -} -module_init(tmc_init); - -static void __exit tmc_exit(void) -{ - amba_driver_unregister(&tmc_driver); -} -module_exit(tmc_exit); +module_amba_driver(tmc_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("CoreSight Trace Memory Controller driver"); diff --git a/drivers/coresight/coresight-tpiu.c b/drivers/coresight/coresight-tpiu.c index ae101082791a..3b33af2416bb 100644 --- a/drivers/coresight/coresight-tpiu.c +++ b/drivers/coresight/coresight-tpiu.c @@ -201,17 +201,7 @@ static struct amba_driver tpiu_driver = { .id_table = tpiu_ids, }; -static int __init tpiu_init(void) -{ - return amba_driver_register(&tpiu_driver); -} -module_init(tpiu_init); - -static void __exit tpiu_exit(void) -{ - amba_driver_unregister(&tpiu_driver); -} -module_exit(tpiu_exit); +module_amba_driver(tpiu_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver"); diff --git a/drivers/coresight/coresight.c b/drivers/coresight/coresight.c index 6e0181f84425..c5def9382357 100644 --- a/drivers/coresight/coresight.c +++ b/drivers/coresight/coresight.c @@ -498,17 +498,18 @@ static int coresight_orphan_match(struct device *dev, void *data) * Circle throuch all the connection of that component. If we find * an orphan connection whose name matches @csdev, link it. */ - for (i = 0; i < i_csdev->nr_outport; i++) { + for (i = 0; i < i_csdev->nr_outport; i++) { conn = &i_csdev->conns[i]; /* We have found at least one orphan connection */ if (conn->child_dev == NULL) { /* Does it match this newly added device? */ - if (!strcmp(dev_name(&csdev->dev), conn->child_name)) + if (!strcmp(dev_name(&csdev->dev), conn->child_name)) { conn->child_dev = csdev; - } else { - /* Too bad, this component still has an orphan */ - still_orphan = true; + } else { + /* This component still has an orphan */ + still_orphan = true; + } } } diff --git a/drivers/coresight/of_coresight.c b/drivers/coresight/of_coresight.c index 5030c0734508..c3efa418a86d 100644 --- a/drivers/coresight/of_coresight.c +++ b/drivers/coresight/of_coresight.c @@ -93,7 +93,7 @@ static int of_coresight_alloc_memory(struct device *dev, if (!pdata->outports) return -ENOMEM; - /* Children connected to this component via @outport */ + /* Children connected to this component via @outports */ pdata->child_names = devm_kzalloc(dev, pdata->nr_outport * sizeof(*pdata->child_names), GFP_KERNEL); @@ -117,7 +117,7 @@ struct coresight_platform_data *of_get_coresight_platform_data( struct coresight_platform_data *pdata; struct of_endpoint endpoint, rendpoint; struct device *rdev; - struct device_node *cpu; + struct device_node *dn; struct device_node *ep = NULL; struct device_node *rparent = NULL; struct device_node *rport = NULL; @@ -126,7 +126,7 @@ struct coresight_platform_data *of_get_coresight_platform_data( if (!pdata) return ERR_PTR(-ENOMEM); - /* Use device name as debugfs handle */ + /* Use device name as sysfs handle */ pdata->name = dev_name(dev); /* Get the number of input and output port for this component */ @@ -174,7 +174,7 @@ struct coresight_platform_data *of_get_coresight_platform_data( continue; rdev = of_coresight_get_endpoint_device(rparent); - if (!dev) + if (!rdev) continue; pdata->child_names[i] = dev_name(rdev); @@ -186,14 +186,16 @@ struct coresight_platform_data *of_get_coresight_platform_data( /* Affinity defaults to CPU0 */ pdata->cpu = 0; - cpu = of_parse_phandle(node, "cpu", 0); - if (cpu) { - const u32 *mpidr; + dn = of_parse_phandle(node, "cpu", 0); + if (dn) { + const u32 *cell; int len, index; + u64 hwid; - mpidr = of_get_property(cpu, "reg", &len); - if (mpidr && len == 4) { - index = get_logical_index(be32_to_cpup(mpidr)); + cell = of_get_property(dn, "reg", &len); + if (cell) { + hwid = of_read_number(cell, of_n_addr_cells(dn)); + index = get_logical_index(hwid); if (index != -EINVAL) pdata->cpu = index; } diff --git a/include/linux/coresight.h b/include/linux/coresight.h index bdde4199c74a..44c1597a738a 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -179,15 +179,6 @@ struct coresight_device { #define sink_ops(csdev) csdev->ops->sink_ops #define link_ops(csdev) csdev->ops->link_ops -#define CORESIGHT_DEBUGFS_ENTRY(__name, __entry_name, \ - __mode, __get, __set, __fmt) \ -DEFINE_SIMPLE_ATTRIBUTE(__name ## _ops, __get, __set, __fmt); \ -static const struct coresight_ops_entry __name ## _entry = { \ - .name = __entry_name, \ - .mode = __mode, \ - .ops = &__name ## _ops \ -} - /** * struct coresight_ops_sink - basic operations for a sink * Operations available for sinks @@ -236,13 +227,8 @@ coresight_register(struct coresight_desc *desc); extern void coresight_unregister(struct coresight_device *csdev); extern int coresight_enable(struct coresight_device *csdev); extern void coresight_disable(struct coresight_device *csdev); -extern int coresight_is_bit_set(u32 val, int position, int value); extern int coresight_timeout(void __iomem *addr, u32 offset, int position, int value); -#ifdef CONFIG_OF -extern struct coresight_platform_data *of_get_coresight_platform_data( - struct device *dev, struct device_node *node); -#endif #else static inline struct coresight_device * coresight_register(struct coresight_desc *desc) { return NULL; } @@ -250,14 +236,16 @@ static inline void coresight_unregister(struct coresight_device *csdev) {} static inline int coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } static inline void coresight_disable(struct coresight_device *csdev) {} -static inline int coresight_is_bit_set(u32 val, int position, int value) - { return 0; } static inline int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) { return 1; } +#endif + #ifdef CONFIG_OF +extern struct coresight_platform_data *of_get_coresight_platform_data( + struct device *dev, struct device_node *node); +#else static inline struct coresight_platform_data *of_get_coresight_platform_data( struct device *dev, struct device_node *node) { return NULL; } #endif -#endif #endif |