From c4aaa2957b6c6858459653307e67982924717d21 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 28 Dec 2012 16:29:10 -0800 Subject: cpufreq: exynos: cleanup exynos-cpufreq header Cc: Rafael J. Wysocki Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/include/mach/cpufreq.h | 36 ----------------------------- drivers/cpufreq/exynos-cpufreq.c | 4 ++-- drivers/cpufreq/exynos-cpufreq.h | 35 ++++++++++++++++++++++++++++ drivers/cpufreq/exynos4210-cpufreq.c | 3 ++- drivers/cpufreq/exynos4x12-cpufreq.c | 3 ++- drivers/cpufreq/exynos5250-cpufreq.c | 3 ++- 6 files changed, 43 insertions(+), 41 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/cpufreq.h create mode 100644 drivers/cpufreq/exynos-cpufreq.h diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h deleted file mode 100644 index 7517c3f417af..000000000000 --- a/arch/arm/mach-exynos/include/mach/cpufreq.h +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/arch/arm/mach-exynos/include/mach/cpufreq.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - CPUFreq support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -enum cpufreq_level_index { - L0, L1, L2, L3, L4, - L5, L6, L7, L8, L9, - L10, L11, L12, L13, L14, - L15, L16, L17, L18, L19, - L20, -}; - -struct exynos_dvfs_info { - unsigned long mpll_freq_khz; - unsigned int pll_safe_idx; - unsigned int pm_lock_idx; - unsigned int max_support_idx; - unsigned int min_support_idx; - struct clk *cpu_clk; - unsigned int *volt_table; - struct cpufreq_frequency_table *freq_table; - void (*set_freq)(unsigned int, unsigned int); - bool (*need_apll_change)(unsigned int, unsigned int); -}; - -extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *); -extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *); -extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *); diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c index 7012ea8bf1e7..caf638b585b5 100644 --- a/drivers/cpufreq/exynos-cpufreq.c +++ b/drivers/cpufreq/exynos-cpufreq.c @@ -18,10 +18,10 @@ #include #include -#include - #include +#include "exynos-cpufreq.h" + static struct exynos_dvfs_info *exynos_info; static struct regulator *arm_regulator; diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h new file mode 100644 index 000000000000..25c748b9b910 --- /dev/null +++ b/drivers/cpufreq/exynos-cpufreq.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * EXYNOS - CPUFreq support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +enum cpufreq_level_index { + L0, L1, L2, L3, L4, + L5, L6, L7, L8, L9, + L10, L11, L12, L13, L14, + L15, L16, L17, L18, L19, + L20, +}; + +struct exynos_dvfs_info { + unsigned long mpll_freq_khz; + unsigned int pll_safe_idx; + unsigned int pm_lock_idx; + unsigned int max_support_idx; + unsigned int min_support_idx; + struct clk *cpu_clk; + unsigned int *volt_table; + struct cpufreq_frequency_table *freq_table; + void (*set_freq)(unsigned int, unsigned int); + bool (*need_apll_change)(unsigned int, unsigned int); +}; + +extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *); +extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *); +extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *); diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c index fb148fa27678..a5d0a8184220 100644 --- a/drivers/cpufreq/exynos4210-cpufreq.c +++ b/drivers/cpufreq/exynos4210-cpufreq.c @@ -18,7 +18,8 @@ #include #include -#include + +#include "exynos-cpufreq.h" #define CPUFREQ_LEVEL_END L5 diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c index 8c5a7afa5b0b..63ff74eec521 100644 --- a/drivers/cpufreq/exynos4x12-cpufreq.c +++ b/drivers/cpufreq/exynos4x12-cpufreq.c @@ -18,7 +18,8 @@ #include #include -#include + +#include "exynos-cpufreq.h" #define CPUFREQ_LEVEL_END (L13 + 1) diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c index e64c253cb169..407126c2d7c6 100644 --- a/drivers/cpufreq/exynos5250-cpufreq.c +++ b/drivers/cpufreq/exynos5250-cpufreq.c @@ -19,7 +19,8 @@ #include #include -#include + +#include "exynos-cpufreq.h" #define CPUFREQ_LEVEL_END (L15 + 1) -- cgit v1.2.3 From 8425938602a2d83e79c22c7d23714a8dc90846f6 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 19:04:49 -0800 Subject: ARM: S5P64X0: remove gpiolib.c file in mach-s5p64x0 Since S5P64X0 gpiolib is supported in drivers/gpio/gpio-samsung.c, this can be removed. Probably, removing this file is missed when S5P64X0 gpiolib was supported in drivers/gpio/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/gpiolib.c | 508 ---------------------------------------- 1 file changed, 508 deletions(-) delete mode 100644 arch/arm/mach-s5p64x0/gpiolib.c diff --git a/arch/arm/mach-s5p64x0/gpiolib.c b/arch/arm/mach-s5p64x0/gpiolib.c deleted file mode 100644 index 700dac6c43f3..000000000000 --- a/arch/arm/mach-s5p64x0/gpiolib.c +++ /dev/null @@ -1,508 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/gpiolib.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - GPIOlib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -/* - * S5P6440 GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 6 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * F 2 2Bit Yes 4 [1] - * G 7 4Bit Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * N 16 2Bit No IRQ_EINT - * P 8 2Bit Yes 8 - * R 15 4Bit[2] Yes 8 - * - * S5P6450 GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 6 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * D 8 4Bit Yes None - * F 2 2Bit Yes None - * G 14 4Bit[2] Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * K 5 4Bit Yes None - * N 16 2Bit No IRQ_EINT - * P 11 2Bit Yes 8 - * Q 14 2Bit Yes None - * R 15 4Bit[2] Yes None - * S 8 2Bit Yes None - * - * [1] BANKF pins 14,15 do not form part of the external interrupt sources - * [2] BANK has two control registers, GPxCON0 and GPxCON1 - */ - -static int s5p64x0_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, - unsigned int offset) -{ - struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - unsigned long flags; - - switch (offset) { - case 6: - offset += 1; - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - regcon -= 4; - break; - default: - offset -= 7; - break; - } - - s3c_gpio_lock(ourchip, flags); - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(offset)); - __raw_writel(con, regcon); - - s3c_gpio_unlock(ourchip, flags); - - return 0; -} - -static int s5p64x0_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - unsigned long dat; - unsigned long flags; - unsigned con_offset = offset; - - switch (con_offset) { - case 6: - con_offset += 1; - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - regcon -= 4; - break; - default: - con_offset -= 7; - break; - } - - s3c_gpio_lock(ourchip, flags); - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(con_offset)); - con |= 0x1 << con_4bit_shift(con_offset); - - dat = __raw_readl(base + GPIODAT_OFF); - if (value) - dat |= 1 << offset; - else - dat &= ~(1 << offset); - - __raw_writel(con, regcon); - __raw_writel(dat, base + GPIODAT_OFF); - - s3c_gpio_unlock(ourchip, flags); - - return 0; -} - -int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift; - u32 con; - - switch (off) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - shift = (off & 7) * 4; - reg -= 4; - break; - case 6: - shift = ((off + 1) & 7) * 4; - reg -= 4; - default: - shift = ((off + 1) & 7) * 4; - break; - } - - if (s3c_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0xf << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} - -static struct s3c_gpio_cfg s5p64x0_gpio_cfgs[] = { - { - .cfg_eint = 0, - }, { - .cfg_eint = 7, - }, { - .cfg_eint = 3, - .set_config = s5p64x0_gpio_setcfg_4bit_rbank, - }, { - .cfg_eint = 0, - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - }, { - .cfg_eint = 2, - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - }, { - .cfg_eint = 3, - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, - }, -}; - -static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { - { - .base = S5P64X0_GPA_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6440_GPA(0), - .ngpio = S5P6440_GPIO_A_NR, - .label = "GPA", - }, - }, { - .base = S5P64X0_GPB_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6440_GPB(0), - .ngpio = S5P6440_GPIO_B_NR, - .label = "GPB", - }, - }, { - .base = S5P64X0_GPC_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6440_GPC(0), - .ngpio = S5P6440_GPIO_C_NR, - .label = "GPC", - }, - }, { - .base = S5P64X0_GPG_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6440_GPG(0), - .ngpio = S5P6440_GPIO_G_NR, - .label = "GPG", - }, - }, -}; - -static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { - { - .base = S5P64X0_GPH_BASE + 0x4, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6440_GPH(0), - .ngpio = S5P6440_GPIO_H_NR, - .label = "GPH", - }, - }, -}; - -static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = { - { - .base = S5P64X0_GPR_BASE + 0x4, - .config = &s5p64x0_gpio_cfgs[2], - .chip = { - .base = S5P6440_GPR(0), - .ngpio = S5P6440_GPIO_R_NR, - .label = "GPR", - }, - }, -}; - -static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { - { - .base = S5P64X0_GPF_BASE, - .config = &s5p64x0_gpio_cfgs[5], - .chip = { - .base = S5P6440_GPF(0), - .ngpio = S5P6440_GPIO_F_NR, - .label = "GPF", - }, - }, { - .base = S5P64X0_GPI_BASE, - .config = &s5p64x0_gpio_cfgs[3], - .chip = { - .base = S5P6440_GPI(0), - .ngpio = S5P6440_GPIO_I_NR, - .label = "GPI", - }, - }, { - .base = S5P64X0_GPJ_BASE, - .config = &s5p64x0_gpio_cfgs[3], - .chip = { - .base = S5P6440_GPJ(0), - .ngpio = S5P6440_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .base = S5P64X0_GPN_BASE, - .config = &s5p64x0_gpio_cfgs[4], - .chip = { - .base = S5P6440_GPN(0), - .ngpio = S5P6440_GPIO_N_NR, - .label = "GPN", - }, - }, { - .base = S5P64X0_GPP_BASE, - .config = &s5p64x0_gpio_cfgs[5], - .chip = { - .base = S5P6440_GPP(0), - .ngpio = S5P6440_GPIO_P_NR, - .label = "GPP", - }, - }, -}; - -static struct s3c_gpio_chip s5p6450_gpio_4bit[] = { - { - .base = S5P64X0_GPA_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPA(0), - .ngpio = S5P6450_GPIO_A_NR, - .label = "GPA", - }, - }, { - .base = S5P64X0_GPB_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPB(0), - .ngpio = S5P6450_GPIO_B_NR, - .label = "GPB", - }, - }, { - .base = S5P64X0_GPC_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPC(0), - .ngpio = S5P6450_GPIO_C_NR, - .label = "GPC", - }, - }, { - .base = S5P6450_GPD_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPD(0), - .ngpio = S5P6450_GPIO_D_NR, - .label = "GPD", - }, - }, { - .base = S5P6450_GPK_BASE, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPK(0), - .ngpio = S5P6450_GPIO_K_NR, - .label = "GPK", - }, - }, -}; - -static struct s3c_gpio_chip s5p6450_gpio_4bit2[] = { - { - .base = S5P64X0_GPG_BASE + 0x4, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPG(0), - .ngpio = S5P6450_GPIO_G_NR, - .label = "GPG", - }, - }, { - .base = S5P64X0_GPH_BASE + 0x4, - .config = &s5p64x0_gpio_cfgs[1], - .chip = { - .base = S5P6450_GPH(0), - .ngpio = S5P6450_GPIO_H_NR, - .label = "GPH", - }, - }, -}; - -static struct s3c_gpio_chip s5p6450_gpio_rbank_4bit2[] = { - { - .base = S5P64X0_GPR_BASE + 0x4, - .config = &s5p64x0_gpio_cfgs[2], - .chip = { - .base = S5P6450_GPR(0), - .ngpio = S5P6450_GPIO_R_NR, - .label = "GPR", - }, - }, -}; - -static struct s3c_gpio_chip s5p6450_gpio_2bit[] = { - { - .base = S5P64X0_GPF_BASE, - .config = &s5p64x0_gpio_cfgs[5], - .chip = { - .base = S5P6450_GPF(0), - .ngpio = S5P6450_GPIO_F_NR, - .label = "GPF", - }, - }, { - .base = S5P64X0_GPI_BASE, - .config = &s5p64x0_gpio_cfgs[3], - .chip = { - .base = S5P6450_GPI(0), - .ngpio = S5P6450_GPIO_I_NR, - .label = "GPI", - }, - }, { - .base = S5P64X0_GPJ_BASE, - .config = &s5p64x0_gpio_cfgs[3], - .chip = { - .base = S5P6450_GPJ(0), - .ngpio = S5P6450_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .base = S5P64X0_GPN_BASE, - .config = &s5p64x0_gpio_cfgs[4], - .chip = { - .base = S5P6450_GPN(0), - .ngpio = S5P6450_GPIO_N_NR, - .label = "GPN", - }, - }, { - .base = S5P64X0_GPP_BASE, - .config = &s5p64x0_gpio_cfgs[5], - .chip = { - .base = S5P6450_GPP(0), - .ngpio = S5P6450_GPIO_P_NR, - .label = "GPP", - }, - }, { - .base = S5P6450_GPQ_BASE, - .config = &s5p64x0_gpio_cfgs[4], - .chip = { - .base = S5P6450_GPQ(0), - .ngpio = S5P6450_GPIO_Q_NR, - .label = "GPQ", - }, - }, { - .base = S5P6450_GPS_BASE, - .config = &s5p64x0_gpio_cfgs[5], - .chip = { - .base = S5P6450_GPS(0), - .ngpio = S5P6450_GPIO_S_NR, - .label = "GPS", - }, - }, -}; - -void __init s5p64x0_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) -{ - for (; nr_chips > 0; nr_chips--, chipcfg++) { - if (!chipcfg->set_config) - chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit; - if (!chipcfg->get_config) - chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit; - if (!chipcfg->set_pull) - chipcfg->set_pull = s3c_gpio_setpull_updown; - if (!chipcfg->get_pull) - chipcfg->get_pull = s3c_gpio_getpull_updown; - } -} - -static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip, - int nr_chips) -{ - for (; nr_chips > 0; nr_chips--, chip++) { - chip->chip.direction_input = s5p64x0_gpiolib_rbank_4bit2_input; - chip->chip.direction_output = - s5p64x0_gpiolib_rbank_4bit2_output; - s3c_gpiolib_add(chip); - } -} - -static int __init s5p64x0_gpiolib_init(void) -{ - s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, - ARRAY_SIZE(s5p64x0_gpio_cfgs)); - - if (soc_is_s5p6450()) { - samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit, - ARRAY_SIZE(s5p6450_gpio_2bit)); - - samsung_gpiolib_add_4bit_chips(s5p6450_gpio_4bit, - ARRAY_SIZE(s5p6450_gpio_4bit)); - - samsung_gpiolib_add_4bit2_chips(s5p6450_gpio_4bit2, - ARRAY_SIZE(s5p6450_gpio_4bit2)); - - s5p64x0_gpio_add_rbank_4bit2(s5p6450_gpio_rbank_4bit2, - ARRAY_SIZE(s5p6450_gpio_rbank_4bit2)); - } else { - samsung_gpiolib_add_2bit_chips(s5p6440_gpio_2bit, - ARRAY_SIZE(s5p6440_gpio_2bit)); - - samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit, - ARRAY_SIZE(s5p6440_gpio_4bit)); - - samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2, - ARRAY_SIZE(s5p6440_gpio_4bit2)); - - s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2, - ARRAY_SIZE(s5p6440_gpio_rbank_4bit2)); - } - - return 0; -} -core_initcall(s5p64x0_gpiolib_init); -- cgit v1.2.3 From 102c3065739c933289ab67492d7dde0d40fc2369 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 18:24:57 -0800 Subject: ARM: S5P64X0: move i2c.h into local directory The can be moved into mach-s5p64x0/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/i2c.h | 16 ++++++++++++++++ arch/arm/mach-s5p64x0/include/mach/i2c.h | 17 ----------------- arch/arm/mach-s5p64x0/mach-smdk6440.c | 2 +- arch/arm/mach-s5p64x0/mach-smdk6450.c | 2 +- arch/arm/mach-s5p64x0/setup-i2c0.c | 2 +- arch/arm/mach-s5p64x0/setup-i2c1.c | 2 +- 6 files changed, 20 insertions(+), 21 deletions(-) create mode 100644 arch/arm/mach-s5p64x0/i2c.h delete mode 100644 arch/arm/mach-s5p64x0/include/mach/i2c.h diff --git a/arch/arm/mach-s5p64x0/i2c.h b/arch/arm/mach-s5p64x0/i2c.h new file mode 100644 index 000000000000..1e5bb4ea200d --- /dev/null +++ b/arch/arm/mach-s5p64x0/i2c.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5P64X0 I2C configuration + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev); +extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev); + +extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev); +extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev); diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/include/mach/i2c.h deleted file mode 100644 index 887d25209e8e..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/i2c.h +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 I2C configuration - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev); -extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev); - -extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev); -extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev); diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 1af823558c60..3fb4de34c4c5 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include @@ -56,6 +55,7 @@ #include #include "common.h" +#include "i2c.h" #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index 62526ccf6b70..53a576d12b88 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include @@ -56,6 +55,7 @@ #include #include "common.h" +#include "i2c.h" #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index a32edc545e6c..569b76ac98cb 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c @@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */ #include #include -#include +#include "i2c.h" void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) { diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index ca2c5c7f8aa6..867374e6d0bc 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c @@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */ #include #include -#include +#include "i2c.h" void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) { -- cgit v1.2.3 From 2d8c8a02830de5e042922c33dcc9de08699e5e24 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 19:14:00 -0800 Subject: ARM: S5P64X0: move s5p64x0-clock.h into local directory The can be moved into mach-s5p64x0/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/clock-s5p6440.c | 2 +- arch/arm/mach-s5p64x0/clock-s5p6450.c | 2 +- arch/arm/mach-s5p64x0/clock.h | 38 +++++++++++++++++++++ arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | 39 ---------------------- 4 files changed, 40 insertions(+), 41 deletions(-) create mode 100644 arch/arm/mach-s5p64x0/clock.h delete mode 100644 arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 5112371079d0..3537815247f1 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include @@ -32,6 +31,7 @@ #include #include +#include "clock.h" #include "common.h" static u32 epll_div[][5] = { diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 154dea702d70..af384ddd2dcf 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include @@ -32,6 +31,7 @@ #include #include +#include "clock.h" #include "common.h" static struct clksrc_clk clk_mout_dpll = { diff --git a/arch/arm/mach-s5p64x0/clock.h b/arch/arm/mach-s5p64x0/clock.h new file mode 100644 index 000000000000..28b8e3c6bd24 --- /dev/null +++ b/arch/arm/mach-s5p64x0/clock.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Header file for s5p64x0 clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S5P64X0_CLOCK_H +#define __MACH_S5P64X0_CLOCK_H __FILE__ + +#include + +extern struct clksrc_clk clk_mout_apll; +extern struct clksrc_clk clk_mout_mpll; +extern struct clksrc_clk clk_mout_epll; + +extern int s5p64x0_epll_enable(struct clk *clk, int enable); +extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); + +extern struct clksrc_clk clk_armclk; +extern struct clksrc_clk clk_dout_mpll; + +extern struct clksrc_sources clkset_hclk_low; + +extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); +extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable); +extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable); +extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable); +extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable); +extern int s5p64x0_mem_ctrl(struct clk *clk, int enable); + +extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable); + +#endif /* __MACH_S5P64X0_CLOCK_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h deleted file mode 100644 index 0ef47d1b7670..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h +++ /dev/null @@ -1,39 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p64x0 clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H __FILE__ - -#include - -extern struct clksrc_clk clk_mout_apll; -extern struct clksrc_clk clk_mout_mpll; -extern struct clksrc_clk clk_mout_epll; - -extern int s5p64x0_epll_enable(struct clk *clk, int enable); -extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); - -extern struct clksrc_clk clk_armclk; -extern struct clksrc_clk clk_dout_mpll; - -extern struct clksrc_sources clkset_hclk_low; - -extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); -extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable); -extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable); -extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable); -extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable); -extern int s5p64x0_mem_ctrl(struct clk *clk, int enable); - -extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable); - -#endif /* __ASM_ARCH_CLOCK_H */ -- cgit v1.2.3 From c48bcc2d681ac21e532114dcd96a6b9c4e72acb1 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 16:53:07 -0800 Subject: ARM: S5PV210: move regs-sys.h into setup-usb-phy.c file The can be moved into mach-s5pv210/setup-usb-phy.c file. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/include/mach/regs-sys.h | 15 --------------- arch/arm/mach-s5pv210/setup-usb-phy.c | 7 ++++++- 2 files changed, 6 insertions(+), 16 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-sys.h diff --git a/arch/arm/mach-s5pv210/include/mach/regs-sys.h b/arch/arm/mach-s5pv210/include/mach/regs-sys.h deleted file mode 100644 index cccb1eddaa38..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/regs-sys.h +++ /dev/null @@ -1,15 +0,0 @@ -/* arch/arm/mach-s5pv210/include/mach/regs-sys.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - System registers definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C) -#define S5PV210_USB_PHY0_EN (1 << 0) -#define S5PV210_USB_PHY1_EN (1 << 1) diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c b/arch/arm/mach-s5pv210/setup-usb-phy.c index be39cf4aa91b..356a0900af03 100644 --- a/arch/arm/mach-s5pv210/setup-usb-phy.c +++ b/arch/arm/mach-s5pv210/setup-usb-phy.c @@ -12,12 +12,17 @@ #include #include #include + #include -#include + #include #include #include +#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C) +#define S5PV210_USB_PHY0_EN (1 << 0) +#define S5PV210_USB_PHY1_EN (1 << 1) + static int s5pv210_usb_otgphy_init(struct platform_device *pdev) { struct clk *xusbxti; -- cgit v1.2.3 From ccd458c15df62e4e7001a09b1b000b1fce696640 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Mon, 31 Dec 2012 10:06:48 -0800 Subject: ARM: EXYNOS: move mach/pmu.h file into common.h Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 1 - arch/arm/mach-exynos/common.h | 20 +++++++++++++++++++ arch/arm/mach-exynos/cpuidle.c | 3 ++- arch/arm/mach-exynos/include/mach/pmu.h | 34 --------------------------------- arch/arm/mach-exynos/pm.c | 3 ++- arch/arm/mach-exynos/pmu.c | 3 ++- 6 files changed, 26 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/pmu.h diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index d6d0dc651089..bec1c922d1a9 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 04744f9c120f..e1af3a9b72a7 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -64,4 +64,24 @@ extern struct smp_operations exynos_smp_ops; extern void exynos_cpu_die(unsigned int cpu); +/* PMU(Power Management Unit) support */ + +#define PMU_TABLE_END NULL + +enum sys_powerdown { + SYS_AFTR, + SYS_LPA, + SYS_SLEEP, + NUM_SYS_POWERDOWN, +}; + +extern unsigned long l2x0_regs_phys; +struct exynos_pmu_conf { + void __iomem *reg; + unsigned int val[NUM_SYS_POWERDOWN]; +}; + +extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); +extern void s3c_cpu_resume(void); + #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index 050924152776..fcfe0251aa3e 100644 --- a/arch/arm/mach-exynos/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c @@ -23,10 +23,11 @@ #include #include #include -#include #include +#include "common.h" + #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \ S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \ (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0)) diff --git a/arch/arm/mach-exynos/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h deleted file mode 100644 index 7c27c2d4bf44..000000000000 --- a/arch/arm/mach-exynos/include/mach/pmu.h +++ /dev/null @@ -1,34 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/pmu.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * EXYNOS4210 - PMU(Power Management Unit) support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_PMU_H -#define __ASM_ARCH_PMU_H __FILE__ - -#define PMU_TABLE_END NULL - -enum sys_powerdown { - SYS_AFTR, - SYS_LPA, - SYS_SLEEP, - NUM_SYS_POWERDOWN, -}; - -extern unsigned long l2x0_regs_phys; -struct exynos_pmu_conf { - void __iomem *reg; - unsigned int val[NUM_SYS_POWERDOWN]; -}; - -extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); -extern void s3c_cpu_resume(void); - -#endif /* __ASM_ARCH_PMU_H */ diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index b9b539cac81e..f459afda822a 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -34,7 +34,8 @@ #include #include #include -#include + +#include "common.h" static struct sleep_save exynos4_set_clksrc[] = { { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, }, diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c index 3a48c852be6c..daebc1abc966 100644 --- a/arch/arm/mach-exynos/pmu.c +++ b/arch/arm/mach-exynos/pmu.c @@ -14,7 +14,8 @@ #include #include -#include + +#include "common.h" static struct exynos_pmu_conf *exynos_pmu_config; -- cgit v1.2.3 From 6ccb2aedf51d79d07c8296f39bb0b82a246af6ae Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 16:23:07 -0800 Subject: ARM: SAMSUNG: cleanup mach/regs-audss.h file Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/dev-audio.c | 3 ++- arch/arm/mach-exynos/include/mach/regs-audss.h | 18 ------------------ arch/arm/mach-s5pv210/dev-audio.c | 3 ++- arch/arm/mach-s5pv210/include/mach/regs-audss.h | 18 ------------------ 4 files changed, 4 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/regs-audss.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-audss.h diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c index 9d1a60951d7b..c662c89794b2 100644 --- a/arch/arm/mach-exynos/dev-audio.c +++ b/arch/arm/mach-exynos/dev-audio.c @@ -21,7 +21,8 @@ #include #include #include -#include + +#define EXYNOS4_AUDSS_INT_MEM (0x03000000) static int exynos4_cfg_i2s(struct platform_device *pdev) { diff --git a/arch/arm/mach-exynos/include/mach/regs-audss.h b/arch/arm/mach-exynos/include/mach/regs-audss.h deleted file mode 100644 index ca5a8b64218a..000000000000 --- a/arch/arm/mach-exynos/include/mach/regs-audss.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-exynos4/include/mach/regs-audss.h - * - * Copyright (c) 2011 Samsung Electronics - * http://www.samsung.com - * - * Exynos4 Audio SubSystem clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_REGS_AUDSS_H -#define __PLAT_REGS_AUDSS_H __FILE__ - -#define EXYNOS4_AUDSS_INT_MEM (0x03000000) - -#endif /* _PLAT_REGS_AUDSS_H */ diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c index addfb165c13d..2d67361ef431 100644 --- a/arch/arm/mach-s5pv210/dev-audio.c +++ b/arch/arm/mach-s5pv210/dev-audio.c @@ -18,7 +18,8 @@ #include #include #include -#include + +#define S5PV210_AUDSS_INT_MEM (0xC0000000) static int s5pv210_cfg_i2s(struct platform_device *pdev) { diff --git a/arch/arm/mach-s5pv210/include/mach/regs-audss.h b/arch/arm/mach-s5pv210/include/mach/regs-audss.h deleted file mode 100644 index eacc1f790807..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/regs-audss.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s5pv210/include/mach/regs-audss.h - * - * Copyright (c) 2011 Samsung Electronics - * http://www.samsung.com - * - * S5PV210 Audio SubSystem clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_REGS_AUDSS_H -#define __PLAT_REGS_AUDSS_H __FILE__ - -#define S5PV210_AUDSS_INT_MEM (0xC0000000) - -#endif /* _PLAT_REGS_AUDSS_H */ -- cgit v1.2.3 From 0a2691dade25dceb4b3982a7b4f749c708ac0b50 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Sun, 30 Dec 2012 18:28:01 -0800 Subject: ARM: SAMSUNG: cleanup mach/gpio-fns.h gpio-track.h and gpio-nrs.h remove , and Acked-by: Linus Walleij Cc: Grant Likely Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/gpio-fns.h | 1 - arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h | 97 ------------------------- arch/arm/mach-s3c24xx/include/mach/gpio-track.h | 33 --------- arch/arm/mach-s3c24xx/include/mach/gpio.h | 87 +++++++++++++++++++++- arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | 2 - arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 + arch/arm/mach-s3c24xx/mach-h1940.c | 2 - arch/arm/plat-samsung/include/plat/gpio-core.h | 13 +++- arch/arm/plat-samsung/include/plat/gpio-fns.h | 1 - drivers/gpio/gpio-samsung.c | 1 - 10 files changed, 96 insertions(+), 142 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/gpio-fns.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/gpio-track.h delete mode 100644 arch/arm/plat-samsung/include/plat/gpio-fns.h diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h b/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h deleted file mode 100644 index c53ad34c6579..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h deleted file mode 100644 index 3890a05948fb..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h +++ /dev/null @@ -1,97 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h - * - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C2410 - GPIO bank numbering - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __MACH_GPIONRS_H -#define __MACH_GPIONRS_H - -#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) - -#define S3C2410_GPIO_BANKG (32*6) -#define S3C2410_GPIO_BANKH (32*7) - -/* GPIO sizes for various SoCs: - * - * 2442 - * 2410 2412 2440 2443 2416 - * ---- ---- ---- ---- ---- - * A 23 22 25 16 25 - * B 11 11 11 11 9 - * C 16 15 16 16 16 - * D 16 16 16 16 16 - * E 16 16 16 16 16 - * F 8 8 8 8 8 - * G 16 16 16 16 8 - * H 11 11 9 15 15 - * J -- -- 13 16 -- - * K -- -- -- -- 16 - * L -- -- -- 15 7 - * M -- -- -- 2 2 - */ - -/* GPIO bank sizes */ -#define S3C2410_GPIO_A_NR (32) -#define S3C2410_GPIO_B_NR (32) -#define S3C2410_GPIO_C_NR (32) -#define S3C2410_GPIO_D_NR (32) -#define S3C2410_GPIO_E_NR (32) -#define S3C2410_GPIO_F_NR (32) -#define S3C2410_GPIO_G_NR (32) -#define S3C2410_GPIO_H_NR (32) -#define S3C2410_GPIO_J_NR (32) /* technically 16. */ -#define S3C2410_GPIO_K_NR (32) /* technically 16. */ -#define S3C2410_GPIO_L_NR (32) /* technically 15. */ -#define S3C2410_GPIO_M_NR (32) /* technically 2. */ - -#if CONFIG_S3C_GPIO_SPACE != 0 -#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment -#endif - -#define S3C2410_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) - -#ifndef __ASSEMBLY__ - -enum s3c_gpio_number { - S3C2410_GPIO_A_START = 0, - S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), - S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), - S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), - S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), - S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), - S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), - S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), - S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), - S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), - S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), - S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), -}; - -#endif /* __ASSEMBLY__ */ - -/* S3C2410 GPIO number definitions. */ - -#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) -#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) -#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) -#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) -#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) -#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) -#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) -#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) -#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) -#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) -#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) -#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) - -#endif /* __MACH_GPIONRS_H */ - diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h b/arch/arm/mach-s3c24xx/include/mach/gpio-track.h deleted file mode 100644 index c410a078622c..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h +++ /dev/null @@ -1,33 +0,0 @@ -/* arch/arm/mach-s3c24100/include/mach/gpio-core.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C2410 - GPIO core support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_CORE_H -#define __ASM_ARCH_GPIO_CORE_H __FILE__ - -#include - -extern struct samsung_gpio_chip s3c24xx_gpios[]; - -static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) -{ - struct samsung_gpio_chip *chip; - - if (pin > S3C_GPIO_END) - return NULL; - - chip = &s3c24xx_gpios[pin/32]; - return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL; -} - -#endif /* __ASM_ARCH_GPIO_CORE_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio.h b/arch/arm/mach-s3c24xx/include/mach/gpio.h index 6fac70f3484e..14591563ca70 100644 --- a/arch/arm/mach-s3c24xx/include/mach/gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio.h @@ -1,5 +1,4 @@ -/* arch/arm/mach-s3c2410/include/mach/gpio.h - * +/* * Copyright (c) 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks @@ -15,6 +14,9 @@ * devices that need GPIO. */ +#ifndef __MACH_GPIO_H +#define __MACH_GPIO_H __FILE__ + #ifdef CONFIG_CPU_S3C244X #define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA) #elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) @@ -23,8 +25,83 @@ #define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) #endif -#include -#include +/* + * GPIO sizes for various SoCs: + * + * 2410 2412 2440 2443 2416 + * 2442 + * ---- ---- ---- ---- ---- + * A 23 22 25 16 25 + * B 11 11 11 11 9 + * C 16 15 16 16 16 + * D 16 16 16 16 16 + * E 16 16 16 16 16 + * F 8 8 8 8 8 + * G 16 16 16 16 8 + * H 11 11 9 15 15 + * J -- -- 13 16 -- + * K -- -- -- -- 16 + * L -- -- -- 15 7 + * M -- -- -- 2 2 + */ + +/* GPIO bank sizes */ + +#define S3C2410_GPIO_A_NR (32) +#define S3C2410_GPIO_B_NR (32) +#define S3C2410_GPIO_C_NR (32) +#define S3C2410_GPIO_D_NR (32) +#define S3C2410_GPIO_E_NR (32) +#define S3C2410_GPIO_F_NR (32) +#define S3C2410_GPIO_G_NR (32) +#define S3C2410_GPIO_H_NR (32) +#define S3C2410_GPIO_J_NR (32) /* technically 16. */ +#define S3C2410_GPIO_K_NR (32) /* technically 16. */ +#define S3C2410_GPIO_L_NR (32) /* technically 15. */ +#define S3C2410_GPIO_M_NR (32) /* technically 2. */ + +#if CONFIG_S3C_GPIO_SPACE != 0 +#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment +#endif + +#define S3C2410_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) + +#ifndef __ASSEMBLY__ + +enum s3c_gpio_number { + S3C2410_GPIO_A_START = 0, + S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), + S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), + S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), + S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), + S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), + S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), + S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), + S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), + S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), + S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), + S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), +}; + +#endif /* __ASSEMBLY__ */ + +/* S3C2410 GPIO number definitions. */ + +#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) +#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) +#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) +#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) +#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) +#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) +#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) +#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) +#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) +#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) +#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) +#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) + +#include #ifdef CONFIG_CPU_S3C244X #define S3C_GPIO_END (S3C2410_GPJ(0) + 32) @@ -33,3 +110,5 @@ #else #define S3C_GPIO_END (S3C2410_GPH(0) + 32) #endif + +#endif /* __MACH_GPIO_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h index a11a638bd599..c2ef016032ab 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h @@ -14,8 +14,6 @@ #ifndef __ASM_ARCH_REGS_GPIO_H #define __ASM_ARCH_REGS_GPIO_H -#include - #define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) /* general configuration options */ diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c index 00381fe5de32..f51bbcb58097 100644 --- a/arch/arm/mach-s3c24xx/mach-at2440evb.c +++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index b23dd1b106e8..e208dda3c759 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -50,8 +50,6 @@ #include #include -#include -#include #include #include diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index f7a3ea2c498a..cf5aae5b0975 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -106,7 +106,18 @@ static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chi #else /* machine specific code should provide samsung_gpiolib_getchip */ -#include +extern struct samsung_gpio_chip s3c24xx_gpios[]; + +static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) +{ + struct samsung_gpio_chip *chip; + + if (pin > S3C_GPIO_END) + return NULL; + + chip = &s3c24xx_gpios[pin/32]; + return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL; +} static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { } #endif diff --git a/arch/arm/plat-samsung/include/plat/gpio-fns.h b/arch/arm/plat-samsung/include/plat/gpio-fns.h deleted file mode 100644 index d1ecef0e38e0..000000000000 --- a/arch/arm/plat-samsung/include/plat/gpio-fns.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 01f7fe955590..ba11d6e267c4 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -39,7 +39,6 @@ #include #include #include -#include #include int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, -- cgit v1.2.3 From fc351246e2a93961558c0028770f901a03e76f16 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 19:40:53 -0800 Subject: ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local The headers can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/anubis.h | 53 ++++++++++++++++++++++++ arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h | 25 ----------- arch/arm/mach-s3c24xx/include/mach/anubis-irq.h | 21 ---------- arch/arm/mach-s3c24xx/include/mach/anubis-map.h | 38 ----------------- arch/arm/mach-s3c24xx/mach-anubis.c | 13 +++--- 5 files changed, 58 insertions(+), 92 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/anubis.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/anubis-irq.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/anubis-map.h diff --git a/arch/arm/mach-s3c24xx/anubis.h b/arch/arm/mach-s3c24xx/anubis.h new file mode 100644 index 000000000000..2691665f27d9 --- /dev/null +++ b/arch/arm/mach-s3c24xx/anubis.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks + * + * ANUBIS - CPLD control constants + * ANUBIS - IRQ Number definitions + * ANUBIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_ANUBIS_H +#define __MACH_S3C24XX_ANUBIS_H __FILE__ + +/* CTRL2 - NAND WP control, IDE Reset assert/check */ + +#define ANUBIS_CTRL1_NANDSEL (0x3) + +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + +/* irq */ + +#define ANUBIS_IRQ_IDE0 IRQ_EINT2 +#define ANUBIS_IRQ_IDE1 IRQ_EINT3 +#define ANUBIS_IRQ_ASIX IRQ_EINT1 + +/* map */ + +/* start peripherals off after the S3C2410 */ + +#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) + +#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) +#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD + +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23)) + +#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) +#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) +#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) +#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) + +#endif /* __MACH_S3C24XX_ANUBIS_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h b/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h deleted file mode 100644 index 1b614d5a81f3..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h +++ /dev/null @@ -1,25 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/anubis-cpld.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_ANUBISCPLD_H -#define __ASM_ARCH_ANUBISCPLD_H - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define ANUBIS_CTRL1_NANDSEL (0x3) - -/* IDREG - revision */ - -#define ANUBIS_IDREG_REVMASK (0x7) - -#endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h b/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h deleted file mode 100644 index a2a328134e34..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h +++ /dev/null @@ -1,21 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/anubis-irq.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_ANUBISIRQ_H -#define __ASM_ARCH_ANUBISIRQ_H - -#define IRQ_IDE0 IRQ_EINT2 -#define IRQ_IDE1 IRQ_EINT3 -#define IRQ_ASIX IRQ_EINT1 - -#endif /* __ASM_ARCH_ANUBISIRQ_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h b/arch/arm/mach-s3c24xx/include/mach/anubis-map.h deleted file mode 100644 index c9deb3a5b2c3..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h +++ /dev/null @@ -1,38 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/anubis-map.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -#ifndef __ASM_ARCH_ANUBISMAP_H -#define __ASM_ARCH_ANUBISMAP_H - -/* start peripherals off after the S3C2410 */ - -#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) - -#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ -#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) - -#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) -#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) -#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) -#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) - -#endif /* __ASM_ARCH_ANUBISMAP_H */ diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c index 1ee8c4638743..113304c48dea 100644 --- a/arch/arm/mach-s3c24xx/mach-anubis.c +++ b/arch/arm/mach-s3c24xx/mach-anubis.c @@ -28,10 +28,6 @@ #include #include -#include -#include -#include - #include #include #include @@ -55,8 +51,9 @@ #include #include -#include "simtec.h" +#include "anubis.h" #include "common.h" +#include "simtec.h" #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" @@ -237,7 +234,7 @@ static struct pata_platform_info anubis_ide_platdata = { static struct resource anubis_ide0_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), - [3] = DEFINE_RES_IRQ(IRQ_IDE0), + [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0), }; static struct platform_device anubis_device_ide0 = { @@ -254,7 +251,7 @@ static struct platform_device anubis_device_ide0 = { static struct resource anubis_ide1_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), - [2] = DEFINE_RES_IRQ(IRQ_IDE0), + [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0), }; static struct platform_device anubis_device_ide1 = { @@ -279,7 +276,7 @@ static struct ax_plat_data anubis_asix_platdata = { static struct resource anubis_asix_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), - [1] = DEFINE_RES_IRQ(IRQ_ASIX), + [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX), }; static struct platform_device anubis_device_asix = { -- cgit v1.2.3 From bbd7e5e1e90954761f766400000a8f4c882d1202 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 1 Jan 2013 19:56:20 -0800 Subject: ARM: S3C24XX: make bast-cpld.h, bast-irq.h and bast-map.h local The headers can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/bast-ide.c | 18 +-- arch/arm/mach-s3c24xx/bast-irq.c | 19 +-- arch/arm/mach-s3c24xx/bast.h | 197 ++++++++++++++++++++++++ arch/arm/mach-s3c24xx/include/mach/bast-cpld.h | 53 ------- arch/arm/mach-s3c24xx/include/mach/bast-irq.h | 29 ---- arch/arm/mach-s3c24xx/include/mach/bast-map.h | 146 ------------------ arch/arm/mach-s3c24xx/include/mach/vr1000-map.h | 4 +- arch/arm/mach-s3c24xx/mach-bast.c | 52 +++---- arch/arm/mach-s3c24xx/mach-vr1000.c | 4 +- arch/arm/mach-s3c24xx/simtec-audio.c | 5 +- arch/arm/mach-s3c24xx/simtec-nor.c | 3 +- arch/arm/mach-s3c24xx/simtec-usb.c | 8 +- 12 files changed, 242 insertions(+), 296 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/bast.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/bast-cpld.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/bast-irq.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/bast-map.h diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c index ba02cf8d80a2..3f0288f2f542 100644 --- a/arch/arm/mach-s3c24xx/bast-ide.c +++ b/arch/arm/mach-s3c24xx/bast-ide.c @@ -25,8 +25,8 @@ #include #include -#include -#include + +#include "bast.h" /* IDE ports */ @@ -34,12 +34,10 @@ static struct pata_platform_info bast_ide_platdata = { .ioport_shift = 5, }; -#define IDE_CS S3C2410_CS5 - static struct resource bast_ide0_resource[] = { - [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), - [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), - [2] = DEFINE_RES_IRQ(IRQ_IDE0), + [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), + [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), + [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE0), }; static struct platform_device bast_device_ide0 = { @@ -55,9 +53,9 @@ static struct platform_device bast_device_ide0 = { }; static struct resource bast_ide1_resource[] = { - [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20), - [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), - [2] = DEFINE_RES_IRQ(IRQ_IDE1), + [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20), + [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), + [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE1), }; static struct platform_device bast_device_ide1 = { diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c index ac7b2ad5c405..c0daa9590b4c 100644 --- a/arch/arm/mach-s3c24xx/bast-irq.c +++ b/arch/arm/mach-s3c24xx/bast-irq.c @@ -27,27 +27,20 @@ #include #include -#include - -#include #include - +#include #include +#include #include -#include -#include #include -#if 0 -#include -#endif +#include "bast.h" #define irqdbf(x...) #define irqdbf2(x...) - /* handle PC104 ISA interrupts from the system CPLD */ /* table of ISA irq nos to the relevant mask... zero means @@ -87,7 +80,7 @@ bast_pc104_mask(struct irq_data *data) static void bast_pc104_maskack(struct irq_data *data) { - struct irq_desc *desc = irq_desc + IRQ_ISA; + struct irq_desc *desc = irq_desc + BAST_IRQ_ISA; bast_pc104_mask(data); desc->irq_data.chip->irq_ack(&desc->irq_data); @@ -122,7 +115,7 @@ bast_irq_pc104_demux(unsigned int irq, if (unlikely(stat == 0)) { /* ack if we get an irq with nothing (ie, startup) */ - desc = irq_desc + IRQ_ISA; + desc = irq_desc + BAST_IRQ_ISA; desc->irq_data.chip->irq_ack(&desc->irq_data); } else { /* handle the IRQ */ @@ -147,7 +140,7 @@ static __init int bast_irq_init(void) __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); - irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux); + irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux); /* register our IRQs */ diff --git a/arch/arm/mach-s3c24xx/bast.h b/arch/arm/mach-s3c24xx/bast.h new file mode 100644 index 000000000000..5c7534bae92d --- /dev/null +++ b/arch/arm/mach-s3c24xx/bast.h @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2003-2004 Simtec Electronics + * Ben Dooks + * + * BAST - CPLD control constants + * BAST - IRQ Number definitions + * BAST - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_BAST_H +#define __MACH_S3C24XX_BAST_H __FILE__ + +/* CTRL1 - Audio LR routing */ + +#define BAST_CPLD_CTRL1_LRCOFF (0x00) +#define BAST_CPLD_CTRL1_LRCADC (0x01) +#define BAST_CPLD_CTRL1_LRCDAC (0x02) +#define BAST_CPLD_CTRL1_LRCARM (0x03) +#define BAST_CPLD_CTRL1_LRMASK (0x03) + +/* CTRL2 - NAND WP control, IDE Reset assert/check */ + +#define BAST_CPLD_CTRL2_WNAND (0x04) +#define BAST_CPLD_CTLR2_IDERST (0x08) + +/* CTRL3 - rom write control, CPLD identity */ + +#define BAST_CPLD_CTRL3_IDMASK (0x0e) +#define BAST_CPLD_CTRL3_ROMWEN (0x01) + +/* CTRL4 - 8bit LCD interface control/status */ + +#define BAST_CPLD_CTRL4_LLAT (0x01) +#define BAST_CPLD_CTRL4_LCDRW (0x02) +#define BAST_CPLD_CTRL4_LCDCMD (0x04) +#define BAST_CPLD_CTRL4_LCDE2 (0x01) + +/* CTRL5 - DMA routing */ + +#define BAST_CPLD_DMA0_PRIIDE (0) +#define BAST_CPLD_DMA0_SECIDE (1) +#define BAST_CPLD_DMA0_ISA15 (2) +#define BAST_CPLD_DMA0_ISA36 (3) + +#define BAST_CPLD_DMA1_PRIIDE (0 << 2) +#define BAST_CPLD_DMA1_SECIDE (1 << 2) +#define BAST_CPLD_DMA1_ISA15 (2 << 2) +#define BAST_CPLD_DMA1_ISA36 (3 << 2) + +/* irq numbers to onboard peripherals */ + +#define BAST_IRQ_USBOC IRQ_EINT18 +#define BAST_IRQ_IDE0 IRQ_EINT16 +#define BAST_IRQ_IDE1 IRQ_EINT17 +#define BAST_IRQ_PCSERIAL1 IRQ_EINT15 +#define BAST_IRQ_PCSERIAL2 IRQ_EINT14 +#define BAST_IRQ_PCPARALLEL IRQ_EINT13 +#define BAST_IRQ_ASIX IRQ_EINT11 +#define BAST_IRQ_DM9000 IRQ_EINT10 +#define BAST_IRQ_ISA IRQ_EINT9 +#define BAST_IRQ_SMALERT IRQ_EINT8 + +/* map */ + +/* + * ok, we've used up to 0x13000000, now we need to find space for the + * peripherals that live in the nGCS[x] areas, which are quite numerous + * in their space. We also have the board's CPLD to find register space + * for. + */ + +#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) +#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000) + +#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) +#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000) + +#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) +#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000) + +#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) +#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000) + +/* next, we have the PC104 ISA interrupt registers */ + +#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) +#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000) + +#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) +#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000) + +#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) +#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000) + +#define BAST_PA_LCD_RCMD1 (0x8800000) +#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000) + +#define BAST_PA_LCD_WCMD1 (0x8000000) +#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000) + +#define BAST_PA_LCD_RDATA1 (0x9800000) +#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000) + +#define BAST_PA_LCD_WDATA1 (0x9000000) +#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000) + +#define BAST_PA_LCD_RCMD2 (0xA800000) +#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000) + +#define BAST_PA_LCD_WCMD2 (0xA000000) +#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000) + +#define BAST_PA_LCD_RDATA2 (0xB800000) +#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000) + +#define BAST_PA_LCD_WDATA2 (0xB000000) +#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000) + + +/* + * 0xE0000000 contains the IO space that is split by speed and + * whether the access is for 8 or 16bit IO... this ensures that + * the correct access is made + * + * 0x10000000 of space, partitioned as so: + * + * 0x00000000 to 0x04000000 8bit, slow + * 0x04000000 to 0x08000000 16bit, slow + * 0x08000000 to 0x0C000000 16bit, net + * 0x0C000000 to 0x10000000 16bit, fast + * + * each of these spaces has the following in: + * + * 0x00000000 to 0x01000000 16MB ISA IO space + * 0x01000000 to 0x02000000 16MB ISA memory space + * 0x02000000 to 0x02100000 1MB IDE primary channel + * 0x02100000 to 0x02200000 1MB IDE primary channel aux + * 0x02200000 to 0x02400000 1MB IDE secondary channel + * 0x02300000 to 0x02400000 1MB IDE secondary channel aux + * 0x02400000 to 0x02500000 1MB ASIX ethernet controller + * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller + * 0x02600000 to 0x02700000 1MB PC SuperIO controller + * + * the phyiscal layout of the zones are: + * nGCS2 - 8bit, slow + * nGCS3 - 16bit, slow + * nGCS4 - 16bit, net + * nGCS5 - 16bit, fast + */ + +#define BAST_VA_MULTISPACE (0xE0000000) + +#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000) +#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000) +#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000) +#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000) +#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000) +#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000) +#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000) +#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000) +#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000) + +#define BAST_VAM_CS2 (0x00000000) +#define BAST_VAM_CS3 (0x04000000) +#define BAST_VAM_CS4 (0x08000000) +#define BAST_VAM_CS5 (0x0C000000) + +/* physical offset addresses for the peripherals */ + +#define BAST_PA_ISAIO (0x00000000) +#define BAST_PA_ASIXNET (0x01000000) +#define BAST_PA_SUPERIO (0x01800000) +#define BAST_PA_IDEPRI (0x02000000) +#define BAST_PA_IDEPRIAUX (0x02800000) +#define BAST_PA_IDESEC (0x03000000) +#define BAST_PA_IDESECAUX (0x03800000) +#define BAST_PA_ISAMEM (0x04000000) +#define BAST_PA_DM9000 (0x05000000) + +/* some configurations for the peripherals */ + +#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2) + +#define BAST_ASIXNET_CS BAST_VAM_CS5 +#define BAST_DM9000_CS BAST_VAM_CS4 + +#define BAST_IDE_CS S3C2410_CS5 + +#endif /* __MACH_S3C24XX_BAST_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h b/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h deleted file mode 100644 index bee2a7a932a0..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h +++ /dev/null @@ -1,53 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/bast-cpld.h - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks - * - * BAST - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_BASTCPLD_H -#define __ASM_ARCH_BASTCPLD_H - -/* CTRL1 - Audio LR routing */ - -#define BAST_CPLD_CTRL1_LRCOFF (0x00) -#define BAST_CPLD_CTRL1_LRCADC (0x01) -#define BAST_CPLD_CTRL1_LRCDAC (0x02) -#define BAST_CPLD_CTRL1_LRCARM (0x03) -#define BAST_CPLD_CTRL1_LRMASK (0x03) - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define BAST_CPLD_CTRL2_WNAND (0x04) -#define BAST_CPLD_CTLR2_IDERST (0x08) - -/* CTRL3 - rom write control, CPLD identity */ - -#define BAST_CPLD_CTRL3_IDMASK (0x0e) -#define BAST_CPLD_CTRL3_ROMWEN (0x01) - -/* CTRL4 - 8bit LCD interface control/status */ - -#define BAST_CPLD_CTRL4_LLAT (0x01) -#define BAST_CPLD_CTRL4_LCDRW (0x02) -#define BAST_CPLD_CTRL4_LCDCMD (0x04) -#define BAST_CPLD_CTRL4_LCDE2 (0x01) - -/* CTRL5 - DMA routing */ - -#define BAST_CPLD_DMA0_PRIIDE (0<<0) -#define BAST_CPLD_DMA0_SECIDE (1<<0) -#define BAST_CPLD_DMA0_ISA15 (2<<0) -#define BAST_CPLD_DMA0_ISA36 (3<<0) - -#define BAST_CPLD_DMA1_PRIIDE (0<<2) -#define BAST_CPLD_DMA1_SECIDE (1<<2) -#define BAST_CPLD_DMA1_ISA15 (2<<2) -#define BAST_CPLD_DMA1_ISA36 (3<<2) - -#endif /* __ASM_ARCH_BASTCPLD_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h b/arch/arm/mach-s3c24xx/include/mach/bast-irq.h deleted file mode 100644 index cac428c42e7f..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h +++ /dev/null @@ -1,29 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/bast-irq.h - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_BASTIRQ_H -#define __ASM_ARCH_BASTIRQ_H - -/* irq numbers to onboard peripherals */ - -#define IRQ_USBOC IRQ_EINT18 -#define IRQ_IDE0 IRQ_EINT16 -#define IRQ_IDE1 IRQ_EINT17 -#define IRQ_PCSERIAL1 IRQ_EINT15 -#define IRQ_PCSERIAL2 IRQ_EINT14 -#define IRQ_PCPARALLEL IRQ_EINT13 -#define IRQ_ASIX IRQ_EINT11 -#define IRQ_DM9000 IRQ_EINT10 -#define IRQ_ISA IRQ_EINT9 -#define IRQ_SMALERT IRQ_EINT8 - -#endif /* __ASM_ARCH_BASTIRQ_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-map.h b/arch/arm/mach-s3c24xx/include/mach/bast-map.h deleted file mode 100644 index eecea2a50f8f..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/bast-map.h +++ /dev/null @@ -1,146 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/bast-map.h - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#ifndef __ASM_ARCH_BASTMAP_H -#define __ASM_ARCH_BASTMAP_H - -#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) /* 0x01300000 */ -#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) /* 0x01400000 */ -#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) /* 0x01500000 */ -#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) /* 0x01600000 */ -#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000) - -#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000) - -#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000) - -#define BAST_PA_LCD_RCMD1 (0x8800000) -#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000) - -#define BAST_PA_LCD_WCMD1 (0x8000000) -#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000) - -#define BAST_PA_LCD_RDATA1 (0x9800000) -#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000) - -#define BAST_PA_LCD_WDATA1 (0x9000000) -#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000) - -#define BAST_PA_LCD_RCMD2 (0xA800000) -#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000) - -#define BAST_PA_LCD_WCMD2 (0xA000000) -#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000) - -#define BAST_PA_LCD_RDATA2 (0xB800000) -#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000) - -#define BAST_PA_LCD_WDATA2 (0xB000000) -#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000) - - -/* 0xE0000000 contains the IO space that is split by speed and - * whether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x00000000 to 0x01000000 16MB ISA IO space - * 0x01000000 to 0x02000000 16MB ISA memory space - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02400000 to 0x02500000 1MB ASIX ethernet controller - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller - * 0x02600000 to 0x02700000 1MB PC SuperIO controller - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000) -#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000) -#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000) -#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000) -#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000) -#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000) -#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000) -#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000) -#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000) - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VAM_CS2 (0x00000000) -#define BAST_VAM_CS3 (0x04000000) -#define BAST_VAM_CS4 (0x08000000) -#define BAST_VAM_CS5 (0x0C000000) - -/* physical offset addresses for the peripherals */ - -#define BAST_PA_ISAIO (0x00000000) -#define BAST_PA_ASIXNET (0x01000000) -#define BAST_PA_SUPERIO (0x01800000) -#define BAST_PA_IDEPRI (0x02000000) -#define BAST_PA_IDEPRIAUX (0x02800000) -#define BAST_PA_IDESEC (0x03000000) -#define BAST_PA_IDESECAUX (0x03800000) -#define BAST_PA_ISAMEM (0x04000000) -#define BAST_PA_DM9000 (0x05000000) - -/* some configurations for the peripherals */ - -#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2) -/* */ - -#define BAST_ASIXNET_CS BAST_VAM_CS5 -#define BAST_IDE_CS BAST_VAM_CS5 -#define BAST_DM9000_CS BAST_VAM_CS4 - -#endif /* __ASM_ARCH_BASTMAP_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h index 28376e56dd3b..5f836a73cda3 100644 --- a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h @@ -21,9 +21,7 @@ #ifndef __ASM_ARCH_VR1000MAP_H #define __ASM_ARCH_VR1000MAP_H -#include - -#define VR1000_IOADDR(x) BAST_IOADDR(x) +#define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) /* we put the CPLD registers next, to get them out of the way */ diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c index 6a30ce7e4aa7..1ed29b456be7 100644 --- a/arch/arm/mach-s3c24xx/mach-bast.c +++ b/arch/arm/mach-s3c24xx/mach-bast.c @@ -24,48 +24,42 @@ #include #include #include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include #include +#include #include #include #include - -#include -#include -#include - -#include -#include #include -//#include -#include +#include +#include #include -#include #include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include +#include #include -#include #include #include +#include #include -#include +#include -#include "simtec.h" +#include "bast.h" #include "common.h" +#include "simtec.h" #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" @@ -312,7 +306,7 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = { static struct resource bast_dm9k_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), - [2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ + [2] = DEFINE_RES_NAMED(BAST_IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ | IORESOURCE_IRQ_HIGHLEVEL), }; @@ -343,7 +337,7 @@ static struct platform_device bast_device_dm9k = { static struct plat_serial8250_port bast_sio_data[] = { [0] = { .mapbase = SERIAL_BASE + 0x2f8, - .irq = IRQ_PCSERIAL1, + .irq = BAST_IRQ_PCSERIAL1, .flags = SERIAL_FLAGS, .iotype = UPIO_MEM, .regshift = 0, @@ -351,7 +345,7 @@ static struct plat_serial8250_port bast_sio_data[] = { }, [1] = { .mapbase = SERIAL_BASE + 0x3f8, - .irq = IRQ_PCSERIAL2, + .irq = BAST_IRQ_PCSERIAL2, .flags = SERIAL_FLAGS, .iotype = UPIO_MEM, .regshift = 0, @@ -390,7 +384,7 @@ static struct ax_plat_data bast_asix_platdata = { static struct resource bast_asix_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), - [2] = DEFINE_RES_IRQ(IRQ_ASIX), + [2] = DEFINE_RES_IRQ(BAST_IRQ_ASIX), }; static struct platform_device bast_device_asix = { diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index 14d5b12e388c..80cffbffb826 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c @@ -32,7 +32,6 @@ #include #include -#include #include #include #include @@ -51,8 +50,9 @@ #include #include -#include "simtec.h" +#include "bast.h" #include "common.h" +#include "simtec.h" /* macros for virtual address mods for the io space entries */ #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) diff --git a/arch/arm/mach-s3c24xx/simtec-audio.c b/arch/arm/mach-s3c24xx/simtec-audio.c index fd0ef05763a9..67cb5120dfeb 100644 --- a/arch/arm/mach-s3c24xx/simtec-audio.c +++ b/arch/arm/mach-s3c24xx/simtec-audio.c @@ -17,16 +17,13 @@ #include #include -#include -#include -#include - #include #include #include #include +#include "bast.h" #include "simtec.h" /* platform ops for audio */ diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c index 029744fcaacb..8884bffa619a 100644 --- a/arch/arm/mach-s3c24xx/simtec-nor.c +++ b/arch/arm/mach-s3c24xx/simtec-nor.c @@ -27,9 +27,8 @@ #include #include -#include -#include +#include "bast.h" #include "simtec.h" static void simtec_nor_vpp(struct platform_device *pdev, int vpp) diff --git a/arch/arm/mach-s3c24xx/simtec-usb.c b/arch/arm/mach-s3c24xx/simtec-usb.c index ddf7a3c743ac..2ed2e32430dc 100644 --- a/arch/arm/mach-s3c24xx/simtec-usb.c +++ b/arch/arm/mach-s3c24xx/simtec-usb.c @@ -28,15 +28,13 @@ #include #include -#include -#include - #include #include #include #include +#include "bast.h" #include "simtec.h" /* control power and monitor over-current events on various Simtec @@ -79,7 +77,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on) int ret; if (on) { - ret = request_irq(IRQ_USBOC, usb_simtec_ocirq, + ret = request_irq(BAST_IRQ_USBOC, usb_simtec_ocirq, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "USB Over-current", info); @@ -87,7 +85,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on) printk(KERN_ERR "failed to request usb oc irq\n"); } } else { - free_irq(IRQ_USBOC, info); + free_irq(BAST_IRQ_USBOC, info); } } -- cgit v1.2.3 From b2ca78717cea921151baf4af5ac9322eacf872c6 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 09:57:59 -0800 Subject: ARM: S3C24XX: make gta02.h local The header can be local in mach-s3c24xx/ and sort out inclusions. Accordingly, the GTA02_ macro in driver can be replaced. Cc: Sangbeom Kim Cc: Mark Brown Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/gta02.h | 23 ++++++++++++ arch/arm/mach-s3c24xx/include/mach/gta02.h | 15 -------- arch/arm/mach-s3c24xx/mach-gta02.c | 59 ++++++++++++++---------------- sound/soc/samsung/neo1973_wm8753.c | 8 ++-- 4 files changed, 54 insertions(+), 51 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/gta02.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/gta02.h diff --git a/arch/arm/mach-s3c24xx/gta02.h b/arch/arm/mach-s3c24xx/gta02.h new file mode 100644 index 000000000000..9430a71e9184 --- /dev/null +++ b/arch/arm/mach-s3c24xx/gta02.h @@ -0,0 +1,23 @@ +/* + * GTA02 header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_GTA02_H +#define __MACH_S3C24XX_GTA02_H __FILE__ + +#include + +#define GTA02_GPIO_AUX_LED S3C2410_GPB(2) +#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) +#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) +#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) +#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ +#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ + +#define GTA02_IRQ_PCF50633 IRQ_EINT9 + +#endif /* __MACH_S3C24XX_GTA02_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/gta02.h b/arch/arm/mach-s3c24xx/include/mach/gta02.h deleted file mode 100644 index 217393482153..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/gta02.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _GTA02_H -#define _GTA02_H - -#include - -#define GTA02_GPIO_AUX_LED S3C2410_GPB(2) -#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) -#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) -#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) -#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ -#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ - -#define GTA02_IRQ_PCF50633 IRQ_EINT9 - -#endif /* _GTA02_H */ diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index 973b87ca87f4..1053706c0ea5 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c @@ -1,6 +1,4 @@ /* - * linux/arch/arm/mach-s3c2442/mach-gta02.c - * * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner. * * Copyright (C) 2006-2009 by Openmoko, Inc. @@ -23,7 +21,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA - * */ #include @@ -34,62 +31,60 @@ #include #include #include +#include #include #include #include -#include -#include +#include +#include +#include #include +#include +#include +#include +#include +#include +#include + #include #include #include #include #include -#include -#include #include -#include -#include -#include -#include -#include -#include - -#include -#include +#include +#include +#include +#include #include #include #include -#include -#include +#include +#include +#include +#include +#include -#include -#include #include - -#include -#include #include +#include +#include +#include -#include - -#include -#include -#include #include -#include -#include +#include #include -#include -#include +#include +#include #include "common.h" +#include "gta02.h" static struct pcf50633 *gta02_pcf; diff --git a/sound/soc/samsung/neo1973_wm8753.c b/sound/soc/samsung/neo1973_wm8753.c index c7e965f80d2e..a301d8cfaa34 100644 --- a/sound/soc/samsung/neo1973_wm8753.c +++ b/sound/soc/samsung/neo1973_wm8753.c @@ -237,7 +237,7 @@ static int lm4853_set_spk(struct snd_kcontrol *kcontrol, { gta02_speaker_enabled = ucontrol->value.integer.value[0]; - gpio_set_value(GTA02_GPIO_HP_IN, !gta02_speaker_enabled); + gpio_set_value(S3C2410_GPJ(2), !gta02_speaker_enabled); return 0; } @@ -252,7 +252,7 @@ static int lm4853_get_spk(struct snd_kcontrol *kcontrol, static int lm4853_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(GTA02_GPIO_AMP_SHUT, SND_SOC_DAPM_EVENT_OFF(event)); + gpio_set_value(S3C2410_GPJ(1), SND_SOC_DAPM_EVENT_OFF(event)); return 0; } @@ -396,8 +396,8 @@ static struct snd_soc_codec_conf neo1973_codec_conf[] = { }; static const struct gpio neo1973_gta02_gpios[] = { - { GTA02_GPIO_HP_IN, GPIOF_OUT_INIT_HIGH, "GTA02_HP_IN" }, - { GTA02_GPIO_AMP_SHUT, GPIOF_OUT_INIT_HIGH, "GTA02_AMP_SHUT" }, + { S3C2410_GPJ(2), GPIOF_OUT_INIT_HIGH, "GTA02_HP_IN" }, + { S3C2410_GPJ(1), GPIOF_OUT_INIT_HIGH, "GTA02_AMP_SHUT" }, }; static struct snd_soc_card neo1973 = { -- cgit v1.2.3 From 232910d6bf8d9565a20824aea0d4393b5772e985 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 10:18:58 -0800 Subject: ARM: S3C24XX: make h1940.h and h1940-latch.h local The headers can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/h1940-bluetooth.c | 6 +-- arch/arm/mach-s3c24xx/h1940.h | 53 ++++++++++++++++++++++++ arch/arm/mach-s3c24xx/include/mach/h1940-latch.h | 43 ------------------- arch/arm/mach-s3c24xx/include/mach/h1940.h | 24 ----------- arch/arm/mach-s3c24xx/mach-h1940.c | 35 +++++++--------- arch/arm/mach-s3c24xx/mach-rx1950.c | 32 +++++++------- arch/arm/mach-s3c24xx/mach-rx3715.c | 16 +++---- arch/arm/mach-s3c24xx/pm-s3c2410.c | 6 +-- sound/soc/samsung/h1940_uda1380.c | 13 +++--- 9 files changed, 105 insertions(+), 123 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/h1940.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/h1940-latch.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/h1940.h diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c index 57aee916bdb1..93bdb927df1b 100644 --- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c +++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c @@ -19,10 +19,10 @@ #include #include -#include #include -#include -#include +#include + +#include "h1940.h" #define DRV_NAME "h1940-bt" diff --git a/arch/arm/mach-s3c24xx/h1940.h b/arch/arm/mach-s3c24xx/h1940.h new file mode 100644 index 000000000000..2950cc466840 --- /dev/null +++ b/arch/arm/mach-s3c24xx/h1940.h @@ -0,0 +1,53 @@ +/* + * Copyright 2006 Ben Dooks + * + * Copyright (c) 2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * iPAQ H1940 series definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_H1940_H +#define __MACH_S3C24XX_H1940_H __FILE__ + +#define H1940_SUSPEND_CHECKSUM (0x30003ff8) +#define H1940_SUSPEND_RESUMEAT (0x30081000) +#define H1940_SUSPEND_CHECK (0x30080000) + +extern void h1940_pm_return(void); +extern int h1940_led_blink_set(unsigned gpio, int state, + unsigned long *delay_on, + unsigned long *delay_off); + +#include + +#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) + +/* SD layer latch */ + +#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0) +#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1) +#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2) +#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3) +#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4) +#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5) +#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6) +#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7) + +/* CPU layer latch */ + +#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8) +#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9) +#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10) +#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11) +#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12) +#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13) +#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) +#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) + +#endif /* __MACH_S3C24XX_H1940_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h b/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h deleted file mode 100644 index fc897d3a056c..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h +++ /dev/null @@ -1,43 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/h1940-latch.h - * - * Copyright (c) 2005 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * iPAQ H1940 series - latch definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_H1940_LATCH_H -#define __ASM_ARCH_H1940_LATCH_H - -#include - -#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) - -/* SD layer latch */ - -#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0) -#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1) -#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2) -#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3) -#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4) -#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5) -#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6) -#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7) - -/* CPU layer latch */ - -#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8) -#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9) -#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10) -#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11) -#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12) -#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13) -#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) -#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) - -#endif /* __ASM_ARCH_H1940_LATCH_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940.h b/arch/arm/mach-s3c24xx/include/mach/h1940.h deleted file mode 100644 index 2aa683c8d3d6..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/h1940.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/h1940.h - * - * Copyright 2006 Ben Dooks - * - * H1940 definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_H1940_H -#define __ASM_ARCH_H1940_H - -#define H1940_SUSPEND_CHECKSUM (0x30003ff8) -#define H1940_SUSPEND_RESUMEAT (0x30081000) -#define H1940_SUSPEND_CHECK (0x30080000) - -extern void h1940_pm_return(void); -extern int h1940_led_blink_set(unsigned gpio, int state, - unsigned long *delay_on, unsigned long *delay_off); - - -#endif /* __ASM_ARCH_H1940_H */ diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index e208dda3c759..afc05a7c24a1 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -1,5 +1,4 @@ -/* linux/arch/arm/mach-s3c2410/mach-h1940.c - * +/* * Copyright (c) 2003-2005 Simtec Electronics * Ben Dooks * @@ -37,38 +36,36 @@ #include #include +#include +#include #include #include #include -#include -#include -#include - -#include -#include -#include +#include +#include +#include +#include -#include +#include -#include -#include #include -#include -#include +#include +#include +#include +#include -#include #include -#include #include +#include +#include #include #include -#include -#include +#include -#include #include "common.h" +#include "h1940.h" #define H1940_LATCH ((void __force __iomem *)0xF8000000) diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 0606f2faaa5c..bdcfb8bb6811 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -1,5 +1,4 @@ -/* linux/arch/arm/mach-s3c2440/mach-rx1950.c - * +/* * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev, * Copyright (c) 2007-2010 Vasily Khoruzhick * @@ -37,31 +36,32 @@ #include +#include #include #include -#include +#include +#include +#include +#include +#include + +#include + +#include #include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include #include -#include +#include #include -#include - -#include +#include +#include +#include #include "common.h" +#include "h1940.h" #define LCD_PWM_PERIOD 192960 #define LCD_PWM_DUTY 127353 diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c index dacbb9a2122a..b261dd3efd5c 100644 --- a/arch/arm/mach-s3c24xx/mach-rx3715.c +++ b/arch/arm/mach-s3c24xx/mach-rx3715.c @@ -31,27 +31,27 @@ #include #include -#include #include +#include + +#include -#include #include #include -#include +#include +#include #include #include -#include -#include -#include - #include -#include #include +#include #include +#include #include "common.h" +#include "h1940.h" static struct map_desc rx3715_iodesc[] __initdata = { /* dump ISA space somewhere unused */ diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c index 949ae05e07c5..2d82c4f116cd 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2410.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c @@ -29,16 +29,16 @@ #include #include -#include - #include +#include #include -#include #include #include +#include "h1940.h" + static void s3c2410_pm_prepare(void) { /* ensure at least GSTATUS3 has the resume address */ diff --git a/sound/soc/samsung/h1940_uda1380.c b/sound/soc/samsung/h1940_uda1380.c index 3870e9678b5d..15a3817aa5c8 100644 --- a/sound/soc/samsung/h1940_uda1380.c +++ b/sound/soc/samsung/h1940_uda1380.c @@ -21,7 +21,6 @@ #include #include -#include #include #include "s3c24xx-i2s.h" @@ -147,9 +146,9 @@ static int h1940_spk_power(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { if (SND_SOC_DAPM_EVENT_ON(event)) - gpio_set_value(H1940_LATCH_AUDIO_POWER, 1); + gpio_set_value(S3C_GPIO_END + 9, 1); else - gpio_set_value(H1940_LATCH_AUDIO_POWER, 0); + gpio_set_value(S3C_GPIO_END + 9, 0); return 0; } @@ -233,11 +232,11 @@ static int __init h1940_init(void) return -ENODEV; /* configure some gpios */ - ret = gpio_request(H1940_LATCH_AUDIO_POWER, "speaker-power"); + ret = gpio_request(S3C_GPIO_END + 9, "speaker-power"); if (ret) goto err_out; - ret = gpio_direction_output(H1940_LATCH_AUDIO_POWER, 0); + ret = gpio_direction_output(S3C_GPIO_END + 9, 0); if (ret) goto err_gpio; @@ -258,7 +257,7 @@ static int __init h1940_init(void) err_plat: platform_device_put(s3c24xx_snd_device); err_gpio: - gpio_free(H1940_LATCH_AUDIO_POWER); + gpio_free(S3C_GPIO_END + 9); err_out: return ret; @@ -269,7 +268,7 @@ static void __exit h1940_exit(void) platform_device_unregister(s3c24xx_snd_device); snd_soc_jack_free_gpios(&hp_jack, ARRAY_SIZE(hp_jack_gpios), hp_jack_gpios); - gpio_free(H1940_LATCH_AUDIO_POWER); + gpio_free(S3C_GPIO_END + 9); } module_init(h1940_init); -- cgit v1.2.3 From 507c4d6839e2baf16e3ed7c8ede26163ed99e0e2 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 10:27:36 -0800 Subject: ARM: S3C24XX: make osiris-cpld.h and osiris-map.h local This makes the headers local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h | 30 -------------- arch/arm/mach-s3c24xx/include/mach/osiris-map.h | 42 ------------------- arch/arm/mach-s3c24xx/mach-osiris.c | 27 ++++++------ arch/arm/mach-s3c24xx/mach-rx1950.c | 1 - arch/arm/mach-s3c24xx/osiris.h | 53 ++++++++++++++++++++++++ 5 files changed, 65 insertions(+), 88 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/osiris-map.h create mode 100644 arch/arm/mach-s3c24xx/osiris.h diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h deleted file mode 100644 index e9e36b0abbac..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h +++ /dev/null @@ -1,30 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/osiris-cpld.h - * - * Copyright 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * OSIRIS - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_OSIRISCPLD_H -#define __ASM_ARCH_OSIRISCPLD_H - -/* CTRL0 - NAND WP control */ - -#define OSIRIS_CTRL0_NANDSEL (0x3) -#define OSIRIS_CTRL0_BOOT_INT (1<<3) -#define OSIRIS_CTRL0_PCMCIA (1<<4) -#define OSIRIS_CTRL0_FIX8 (1<<5) -#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) - -#define OSIRIS_CTRL1_FIX8 (1<<0) - -#define OSIRIS_ID_REVMASK (0x7) - -#endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h b/arch/arm/mach-s3c24xx/include/mach/osiris-map.h deleted file mode 100644 index 17380f848428..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h +++ /dev/null @@ -1,42 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/osiris-map.h - * - * Copyright 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * OSIRIS - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -#ifndef __ASM_ARCH_OSIRISMAP_H -#define __ASM_ARCH_OSIRISMAP_H - -/* start peripherals off after the S3C2410 */ - -#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) - -#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) - -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) - -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) -#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) - -#endif /* __ASM_ARCH_OSIRISMAP_H */ diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c index bb36d832bd3d..1eeeee4169ac 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris.c +++ b/arch/arm/mach-s3c24xx/mach-osiris.c @@ -1,5 +1,4 @@ -/* linux/arch/arm/mach-s3c2440/mach-osiris.c - * +/* * Copyright (c) 2005-2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks @@ -25,22 +24,12 @@ #include +#include #include #include #include - -#include -#include - -#include #include -#include -#include -#include -#include -#include -#include #include #include @@ -49,12 +38,20 @@ #include #include -#include #include -#include #include +#include +#include +#include +#include + +#include +#include +#include +#include #include "common.h" +#include "osiris.h" /* onboard perihperal map */ diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index bdcfb8bb6811..c7db76767bec 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -55,7 +55,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/osiris.h b/arch/arm/mach-s3c24xx/osiris.h new file mode 100644 index 000000000000..b8d56074abac --- /dev/null +++ b/arch/arm/mach-s3c24xx/osiris.h @@ -0,0 +1,53 @@ +/* + * Copyright 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks + * + * OSIRIS - CPLD control constants + * OSIRIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_OSIRIS_H +#define __MACH_S3C24XX_OSIRIS_H __FILE__ + +/* CTRL0 - NAND WP control */ + +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_CTRL1_FIX8 (1<<0) + +#define OSIRIS_ID_REVMASK (0x7) + +/* start peripherals off after the S3C2410 */ + +#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) + +#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) + +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) + +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) + +#endif /* __MACH_S3C24XX_OSIRIS_H */ -- cgit v1.2.3 From 0afdff5d3017806cdb509330c421907d2271a3d5 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 10:32:55 -0800 Subject: ARM: S3C24XX: make otom-map.h local The header can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/otom-map.h | 30 --------------------------- arch/arm/mach-s3c24xx/mach-otom.c | 20 ++++++++---------- arch/arm/mach-s3c24xx/otom.h | 28 +++++++++++++++++++++++++ 3 files changed, 37 insertions(+), 41 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/otom-map.h create mode 100644 arch/arm/mach-s3c24xx/otom.h diff --git a/arch/arm/mach-s3c24xx/include/mach/otom-map.h b/arch/arm/mach-s3c24xx/include/mach/otom-map.h deleted file mode 100644 index f9277a52c145..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/otom-map.h +++ /dev/null @@ -1,30 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/otom-map.h - * - * (c) 2005 Guillaume GOURAT / NexVision - * guillaume.gourat@nexvision.fr - * - * NexVision OTOM board memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x01300000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. - */ - -#ifndef __ASM_ARCH_OTOMMAP_H -#define __ASM_ARCH_OTOMMAP_H - -#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */ -#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */ - -/* physical offset addresses for the peripherals */ - -#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) /* Bank 0 */ - -#endif /* __ASM_ARCH_OTOMMAP_H */ diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c index bca39f0232b3..91d8493a436c 100644 --- a/arch/arm/mach-s3c24xx/mach-otom.c +++ b/arch/arm/mach-s3c24xx/mach-otom.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c2410/mach-otom.c +/* * * Copyright (c) 2004 Nex Vision * Guillaume GOURAT @@ -6,7 +6,6 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * */ #include @@ -19,26 +18,25 @@ #include #include +#include + +#include +#include #include #include #include -#include - #include -#include -#include - -#include #include -#include #include -#include -#include #include +#include +#include +#include #include "common.h" +#include "otom.h" static struct map_desc otom11_iodesc[] __initdata = { /* Device area */ diff --git a/arch/arm/mach-s3c24xx/otom.h b/arch/arm/mach-s3c24xx/otom.h new file mode 100644 index 000000000000..321b7be1c0f7 --- /dev/null +++ b/arch/arm/mach-s3c24xx/otom.h @@ -0,0 +1,28 @@ +/* + * (c) 2005 Guillaume GOURAT / NexVision + * guillaume.gourat@nexvision.fr + * + * NexVision OTOM board memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* + * ok, we've used up to 0x01300000, now we need to find space for the + * peripherals that live in the nGCS[x] areas, which are quite numerous + * in their space. + */ + +#ifndef __MACH_S3C24XX_OTOM_H +#define __MACH_S3C24XX_OTOM_H __FILE__ + +#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */ +#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */ + +/* physical offset addresses for the peripherals */ + +#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) + +#endif /* __MACH_S3C24XX_OTOM_H */ -- cgit v1.2.3 From db8304edee3f94d8a912cd2419f7ce787e8308da Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 10:47:40 -0800 Subject: ARM: S3C24XX: make vr1000-cpld.h, vr1000-irq.h and vr1000-map.h local The headers can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h | 18 ---- arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h | 26 ----- arch/arm/mach-s3c24xx/include/mach/vr1000-map.h | 108 --------------------- arch/arm/mach-s3c24xx/mach-vr1000.c | 33 +++---- arch/arm/mach-s3c24xx/vr1000.h | 118 +++++++++++++++++++++++ 5 files changed, 133 insertions(+), 170 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/vr1000-map.h create mode 100644 arch/arm/mach-s3c24xx/vr1000.h diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h deleted file mode 100644 index e4119913d7c5..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * VR1000 - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_VR1000CPLD_H -#define __ASM_ARCH_VR1000CPLD_H - -#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */ - -#endif /* __ASM_ARCH_VR1000CPLD_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h deleted file mode 100644 index 47add133b8ee..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h +++ /dev/null @@ -1,26 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks - * - * Machine VR1000 - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_VR1000IRQ_H -#define __ASM_ARCH_VR1000IRQ_H - -/* irq numbers to onboard peripherals */ - -#define IRQ_USBOC IRQ_EINT19 -#define IRQ_IDE0 IRQ_EINT16 -#define IRQ_IDE1 IRQ_EINT17 -#define IRQ_VR1000_SERIAL IRQ_EINT12 -#define IRQ_VR1000_DM9000A IRQ_EINT10 -#define IRQ_VR1000_DM9000N IRQ_EINT9 -#define IRQ_SMALERT IRQ_EINT8 - -#endif /* __ASM_ARCH_VR1000IRQ_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h deleted file mode 100644 index 5f836a73cda3..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h +++ /dev/null @@ -1,108 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/vr1000-map.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * Machine VR1000 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#ifndef __ASM_ARCH_VR1000MAP_H -#define __ASM_ARCH_VR1000MAP_H - -#define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */ -#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */ -#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */ -#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */ -#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000) - -#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000) - -#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000) - -/* 0xE0000000 contains the IO space that is split by speed and - * whether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers - * 0x02600000 to 0x02700000 1MB - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define VR1000_VA_MULTISPACE (0xE0000000) - -#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000) -#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000) -#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000) -#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000) -#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000) -#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000) -#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000) -#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000) -#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000) - -/* physical offset addresses for the peripherals */ - -#define VR1000_PA_IDEPRI (0x02000000) -#define VR1000_PA_IDEPRIAUX (0x02800000) -#define VR1000_PA_IDESEC (0x03000000) -#define VR1000_PA_IDESECAUX (0x03800000) -#define VR1000_PA_DM9000 (0x05000000) - -#define VR1000_PA_SERIAL (0x11800000) -#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000)) - -/* VR1000 ram is in CS1, with A26..A24 = 2_101 */ -#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000) - -/* some configurations for the peripherals */ - -#define VR1000_DM9000_CS VR1000_VAM_CS4 - -#endif /* __ASM_ARCH_VR1000MAP_H */ diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index 80cffbffb826..d4db3853ae79 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c @@ -1,5 +1,4 @@ -/* linux/arch/arm/mach-s3c2410/mach-vr1000.c - * +/* * Copyright (c) 2003-2008 Simtec Electronics * Ben Dooks * @@ -32,27 +31,25 @@ #include #include -#include -#include -#include - -#include #include #include -#include -#include #include +#include +#include + +#include +#include #include -#include #include -#include -#include +#include +#include #include "bast.h" #include "common.h" #include "simtec.h" +#include "vr1000.h" /* macros for virtual address mods for the io space entries */ #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) @@ -143,7 +140,7 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { static struct plat_serial8250_port serial_platform_data[] = { [0] = { .mapbase = VR1000_SERIAL_MAPBASE(0), - .irq = IRQ_VR1000_SERIAL + 0, + .irq = VR1000_IRQ_SERIAL + 0, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .iotype = UPIO_MEM, .regshift = 0, @@ -151,7 +148,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, [1] = { .mapbase = VR1000_SERIAL_MAPBASE(1), - .irq = IRQ_VR1000_SERIAL + 1, + .irq = VR1000_IRQ_SERIAL + 1, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .iotype = UPIO_MEM, .regshift = 0, @@ -159,7 +156,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, [2] = { .mapbase = VR1000_SERIAL_MAPBASE(2), - .irq = IRQ_VR1000_SERIAL + 2, + .irq = VR1000_IRQ_SERIAL + 2, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .iotype = UPIO_MEM, .regshift = 0, @@ -167,7 +164,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, [3] = { .mapbase = VR1000_SERIAL_MAPBASE(3), - .irq = IRQ_VR1000_SERIAL + 3, + .irq = VR1000_IRQ_SERIAL + 3, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .iotype = UPIO_MEM, .regshift = 0, @@ -189,14 +186,14 @@ static struct platform_device serial_device = { static struct resource vr1000_dm9k0_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), - [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \ + [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \ | IORESOURCE_IRQ_HIGHLEVEL), }; static struct resource vr1000_dm9k1_resource[] = { [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), - [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \ + [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \ | IORESOURCE_IRQ_HIGHLEVEL), }; diff --git a/arch/arm/mach-s3c24xx/vr1000.h b/arch/arm/mach-s3c24xx/vr1000.h new file mode 100644 index 000000000000..7fcd2c2f183c --- /dev/null +++ b/arch/arm/mach-s3c24xx/vr1000.h @@ -0,0 +1,118 @@ + +/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h + * + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks + * + * VR1000 - CPLD control constants + * Machine VR1000 - IRQ Number definitions + * Machine VR1000 - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_VR1000_H +#define __MACH_S3C24XX_VR1000_H __FILE__ + +#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */ + +/* irq numbers to onboard peripherals */ + +#define VR1000_IRQ_USBOC IRQ_EINT19 +#define VR1000_IRQ_IDE0 IRQ_EINT16 +#define VR1000_IRQ_IDE1 IRQ_EINT17 +#define VR1000_IRQ_SERIAL IRQ_EINT12 +#define VR1000_IRQ_DM9000A IRQ_EINT10 +#define VR1000_IRQ_DM9000N IRQ_EINT9 +#define VR1000_IRQ_SMALERT IRQ_EINT8 + +/* map */ + +#define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */ +#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000) + +#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */ +#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000) + +#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */ +#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000) + +#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */ +#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000) + +/* next, we have the PC104 ISA interrupt registers */ + +#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ +#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000) + +#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ +#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000) + +#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ +#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000) + +/* + * 0xE0000000 contains the IO space that is split by speed and + * whether the access is for 8 or 16bit IO... this ensures that + * the correct access is made + * + * 0x10000000 of space, partitioned as so: + * + * 0x00000000 to 0x04000000 8bit, slow + * 0x04000000 to 0x08000000 16bit, slow + * 0x08000000 to 0x0C000000 16bit, net + * 0x0C000000 to 0x10000000 16bit, fast + * + * each of these spaces has the following in: + * + * 0x02000000 to 0x02100000 1MB IDE primary channel + * 0x02100000 to 0x02200000 1MB IDE primary channel aux + * 0x02200000 to 0x02400000 1MB IDE secondary channel + * 0x02300000 to 0x02400000 1MB IDE secondary channel aux + * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers + * 0x02600000 to 0x02700000 1MB + * + * the phyiscal layout of the zones are: + * nGCS2 - 8bit, slow + * nGCS3 - 16bit, slow + * nGCS4 - 16bit, net + * nGCS5 - 16bit, fast + */ + +#define VR1000_VA_MULTISPACE (0xE0000000) + +#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000) +#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000) +#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000) +#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000) +#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000) +#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000) +#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000) +#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000) +#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000) + +/* physical offset addresses for the peripherals */ + +#define VR1000_PA_IDEPRI (0x02000000) +#define VR1000_PA_IDEPRIAUX (0x02800000) +#define VR1000_PA_IDESEC (0x03000000) +#define VR1000_PA_IDESECAUX (0x03800000) +#define VR1000_PA_DM9000 (0x05000000) + +#define VR1000_PA_SERIAL (0x11800000) +#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000)) + +/* VR1000 ram is in CS1, with A26..A24 = 2_101 */ +#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000) + +/* some configurations for the peripherals */ + +#define VR1000_DM9000_CS VR1000_VAM_CS4 + +#endif /* __MACH_S3C24XX_VR1000_H */ -- cgit v1.2.3 From d2fc6e9741f4f842d18d53f9245c19136b05abc5 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 10:54:26 -0800 Subject: ARM: S3C2416: remove regs-s3c2416-mem.h and regs-s3c2416.h The headers no longer used anywhere now. Signed-off-by: Kukjin Kim --- .../mach-s3c24xx/include/mach/regs-s3c2416-mem.h | 30 ---------------------- arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h | 24 ----------------- 2 files changed, 54 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h delete mode 100644 arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h deleted file mode 100644 index 2f31b74974af..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h +++ /dev/null @@ -1,30 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h - * - * Copyright (c) 2009 Yauhen Kharuzhy , - * as part of OpenInkpot project - * Copyright (c) 2009 Promwad Innovation Company - * Yauhen Kharuzhy - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2416 memory register definitions -*/ - -#ifndef __ASM_ARM_REGS_S3C2416_MEM -#define __ASM_ARM_REGS_S3C2416_MEM - -#ifndef S3C2416_MEMREG -#define S3C2416_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) -#endif - -#define S3C2416_BANKCFG S3C2416_MEMREG(0x00) -#define S3C2416_BANKCON1 S3C2416_MEMREG(0x04) -#define S3C2416_BANKCON2 S3C2416_MEMREG(0x08) -#define S3C2416_BANKCON3 S3C2416_MEMREG(0x0C) - -#define S3C2416_REFRESH S3C2416_MEMREG(0x10) -#define S3C2416_TIMEOUT S3C2416_MEMREG(0x14) - -#endif /* __ASM_ARM_REGS_S3C2416_MEM */ diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h deleted file mode 100644 index e443167efb87..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h - * - * Copyright (c) 2009 Yauhen Kharuzhy , - * as part of OpenInkpot project - * Copyright (c) 2009 Promwad Innovation Company - * Yauhen Kharuzhy - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2416 specific register definitions -*/ - -#ifndef __ASM_ARCH_REGS_S3C2416_H -#define __ASM_ARCH_REGS_S3C2416_H "s3c2416" - -#define S3C2416_SWRST (S3C24XX_VA_CLKPWR + 0x44) -#define S3C2416_SWRST_RESET (0x533C2416) - -/* see regs-power.h for the other registers in the power block. */ - -#endif /* __ASM_ARCH_REGS_S3C2416_H */ - -- cgit v1.2.3 From fd4e5a5baff3df7bd889216716779d383c6a25c1 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 11:04:57 -0800 Subject: ARM: S3C2412: cleanup regs-s3c2412.h Move the regs-s3c2412.h into mach-s3c24xx/s3c2412.c file. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h | 23 ------------------- arch/arm/mach-s3c24xx/s3c2412.c | 28 +++++++++++------------ 2 files changed, 14 insertions(+), 37 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h deleted file mode 100644 index aa69dc79bc38..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h +++ /dev/null @@ -1,23 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2412 specific register definitions -*/ - -#ifndef __ASM_ARCH_REGS_S3C2412_H -#define __ASM_ARCH_REGS_S3C2412_H "s3c2412" - -#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) -#define S3C2412_SWRST_RESET (0x533C2412) - -/* see regs-power.h for the other registers in the power block. */ - -#endif /* __ASM_ARCH_REGS_S3C2412_H */ - diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index 6c5f4031ff0c..26ab76094a65 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -1,5 +1,4 @@ -/* linux/arch/arm/mach-s3c2412/s3c2412.c - * +/* * Copyright (c) 2006 Simtec Electronics * Ben Dooks * @@ -28,28 +27,29 @@ #include #include -#include #include #include #include -#include - +#include #include -#include -#include -#include #include -#include -#include +#include +#include -#include +#include #include +#include #include -#include -#include -#include #include +#include +#include +#include +#include +#include + +#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) +#define S3C2412_SWRST_RESET (0x533C2412) #ifndef CONFIG_CPU_S3C2412_ONLY void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; -- cgit v1.2.3 From 2a8394f815153c91d087129f5816a01b45c58277 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 13:55:32 -0800 Subject: ARM: S3C24XX: remove idle.h The is no longer used. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/idle.h | 24 ------------------------ arch/arm/mach-s3c24xx/mach-smdk2413.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2416.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2440.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2443.c | 1 - arch/arm/mach-s3c24xx/mach-vstms.c | 1 - 6 files changed, 29 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/include/mach/idle.h diff --git a/arch/arm/mach-s3c24xx/include/mach/idle.h b/arch/arm/mach-s3c24xx/include/mach/idle.h deleted file mode 100644 index e9ddd706b16e..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/idle.h +++ /dev/null @@ -1,24 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/idle.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 CPU Idle controls -*/ - -#ifndef __ASM_ARCH_IDLE_H -#define __ASM_ARCH_IDLE_H __FILE__ - -/* This allows the over-ride of the default idle code, in case there - * is any other things to be done over idle (like DVS) -*/ - -extern void (*s3c24xx_idle)(void); - -extern void s3c24xx_default_idle(void); - -#endif /* __ASM_ARCH_IDLE_H */ diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c index ce99fd8bbbc5..b9d5703e438f 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c @@ -37,7 +37,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c index f30d7fccbfee..7de4120189e8 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c @@ -39,7 +39,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c index b7ff882c6ce6..0bba78698ae4 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2440.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c @@ -35,7 +35,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c index 2568656f046f..c6d1a038ca08 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2443.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c @@ -35,7 +35,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c index f1d44ae11833..eef559cbbcc7 100644 --- a/arch/arm/mach-s3c24xx/mach-vstms.c +++ b/arch/arm/mach-s3c24xx/mach-vstms.c @@ -36,7 +36,6 @@ #include #include -#include #include #include -- cgit v1.2.3 From b4353784ea6d5fd4cffa7498b656f5a72d20f2cd Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 14:01:09 -0800 Subject: ARM: S3C24XX: remove dsc.c and make regs-dsc.h local The mach-s3c2440/dsc.c is no longer used and the header, regs-dsc.h can be local in mach-s3c24xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2440/Makefile | 2 - arch/arm/mach-s3c2440/dsc.c | 54 ------- arch/arm/mach-s3c24xx/include/mach/regs-dsc.h | 220 -------------------------- arch/arm/mach-s3c24xx/pm-s3c2412.c | 8 +- arch/arm/mach-s3c24xx/regs-dsc.h | 220 ++++++++++++++++++++++++++ arch/arm/mach-s3c24xx/s3c2412.c | 3 +- arch/arm/mach-s3c24xx/s3c244x.c | 3 +- 7 files changed, 228 insertions(+), 282 deletions(-) delete mode 100644 arch/arm/mach-s3c2440/dsc.c delete mode 100644 arch/arm/mach-s3c24xx/include/mach/regs-dsc.h create mode 100644 arch/arm/mach-s3c24xx/regs-dsc.h diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile index c46092439814..0ddd17fa067e 100644 --- a/arch/arm/mach-s3c2440/Makefile +++ b/arch/arm/mach-s3c2440/Makefile @@ -9,8 +9,6 @@ obj-m := obj-n := obj- := -obj-$(CONFIG_CPU_S3C2440) += dsc.o - obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c deleted file mode 100644 index 9ea66e31f626..000000000000 --- a/arch/arm/mach-s3c2440/dsc.c +++ /dev/null @@ -1,54 +0,0 @@ -/* linux/arch/arm/mach-s3c2440/dsc.c - * - * Copyright (c) 2004-2005 Simtec Electronics - * Ben Dooks - * - * Samsung S3C2440 Drive Strength Control support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include - -int s3c2440_set_dsc(unsigned int pin, unsigned int value) -{ - void __iomem *base; - unsigned long val; - unsigned long flags; - unsigned long mask; - - base = (pin & S3C2440_SELECT_DSC1) ? S3C2440_DSC1 : S3C2440_DSC0; - mask = 3 << S3C2440_DSC_GETSHIFT(pin); - - local_irq_save(flags); - - val = __raw_readl(base); - val &= ~mask; - val |= value & mask; - __raw_writel(val, base); - - local_irq_restore(flags); - return 0; -} - -EXPORT_SYMBOL(s3c2440_set_dsc); diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h b/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h deleted file mode 100644 index 98fd4a05587c..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h +++ /dev/null @@ -1,220 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-dsc.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2440/S3C2412 Signal Drive Strength Control -*/ - - -#ifndef __ASM_ARCH_REGS_DSC_H -#define __ASM_ARCH_REGS_DSC_H "2440-dsc" - -#if defined(CONFIG_CPU_S3C2412) -#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) -#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) -#endif - -#if defined(CONFIG_CPU_S3C2416) -#define S3C2416_DSC0 S3C2410_GPIOREG(0xc0) -#define S3C2416_DSC1 S3C2410_GPIOREG(0xc4) -#define S3C2416_DSC2 S3C2410_GPIOREG(0xc8) -#define S3C2416_DSC3 S3C2410_GPIOREG(0x110) - -#define S3C2416_SELECT_DSC0 (0 << 30) -#define S3C2416_SELECT_DSC1 (1 << 30) -#define S3C2416_SELECT_DSC2 (2 << 30) -#define S3C2416_SELECT_DSC3 (3 << 30) - -#define S3C2416_DSC_GETSHIFT(x) (x & 30) - -#define S3C2416_DSC0_CF (S3C2416_SELECT_DSC0 | 28) -#define S3C2416_DSC0_CF_5mA (0 << 28) -#define S3C2416_DSC0_CF_10mA (1 << 28) -#define S3C2416_DSC0_CF_15mA (2 << 28) -#define S3C2416_DSC0_CF_21mA (3 << 28) -#define S3C2416_DSC0_CF_MASK (3 << 28) - -#define S3C2416_DSC0_nRBE (S3C2416_SELECT_DSC0 | 26) -#define S3C2416_DSC0_nRBE_5mA (0 << 26) -#define S3C2416_DSC0_nRBE_10mA (1 << 26) -#define S3C2416_DSC0_nRBE_15mA (2 << 26) -#define S3C2416_DSC0_nRBE_21mA (3 << 26) -#define S3C2416_DSC0_nRBE_MASK (3 << 26) - -#define S3C2416_DSC0_nROE (S3C2416_SELECT_DSC0 | 24) -#define S3C2416_DSC0_nROE_5mA (0 << 24) -#define S3C2416_DSC0_nROE_10mA (1 << 24) -#define S3C2416_DSC0_nROE_15mA (2 << 24) -#define S3C2416_DSC0_nROE_21mA (3 << 24) -#define S3C2416_DSC0_nROE_MASK (3 << 24) - -#endif - -#if defined(CONFIG_CPU_S3C244X) - -#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) -#define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) - -#define S3C2440_SELECT_DSC0 (0) -#define S3C2440_SELECT_DSC1 (1<<31) - -#define S3C2440_DSC_GETSHIFT(x) ((x) & 31) - -#define S3C2440_DSC0_DISABLE (1<<31) - -#define S3C2440_DSC0_ADDR (S3C2440_SELECT_DSC0 | 8) -#define S3C2440_DSC0_ADDR_12mA (0<<8) -#define S3C2440_DSC0_ADDR_10mA (1<<8) -#define S3C2440_DSC0_ADDR_8mA (2<<8) -#define S3C2440_DSC0_ADDR_6mA (3<<8) -#define S3C2440_DSC0_ADDR_MASK (3<<8) - -/* D24..D31 */ -#define S3C2440_DSC0_DATA3 (S3C2440_SELECT_DSC0 | 6) -#define S3C2440_DSC0_DATA3_12mA (0<<6) -#define S3C2440_DSC0_DATA3_10mA (1<<6) -#define S3C2440_DSC0_DATA3_8mA (2<<6) -#define S3C2440_DSC0_DATA3_6mA (3<<6) -#define S3C2440_DSC0_DATA3_MASK (3<<6) - -/* D16..D23 */ -#define S3C2440_DSC0_DATA2 (S3C2440_SELECT_DSC0 | 4) -#define S3C2440_DSC0_DATA2_12mA (0<<4) -#define S3C2440_DSC0_DATA2_10mA (1<<4) -#define S3C2440_DSC0_DATA2_8mA (2<<4) -#define S3C2440_DSC0_DATA2_6mA (3<<4) -#define S3C2440_DSC0_DATA2_MASK (3<<4) - -/* D8..D15 */ -#define S3C2440_DSC0_DATA1 (S3C2440_SELECT_DSC0 | 2) -#define S3C2440_DSC0_DATA1_12mA (0<<2) -#define S3C2440_DSC0_DATA1_10mA (1<<2) -#define S3C2440_DSC0_DATA1_8mA (2<<2) -#define S3C2440_DSC0_DATA1_6mA (3<<2) -#define S3C2440_DSC0_DATA1_MASK (3<<2) - -/* D0..D7 */ -#define S3C2440_DSC0_DATA0 (S3C2440_SELECT_DSC0 | 0) -#define S3C2440_DSC0_DATA0_12mA (0<<0) -#define S3C2440_DSC0_DATA0_10mA (1<<0) -#define S3C2440_DSC0_DATA0_8mA (2<<0) -#define S3C2440_DSC0_DATA0_6mA (3<<0) -#define S3C2440_DSC0_DATA0_MASK (3<<0) - -#define S3C2440_DSC1_SCK1 (S3C2440_SELECT_DSC1 | 28) -#define S3C2440_DSC1_SCK1_12mA (0<<28) -#define S3C2440_DSC1_SCK1_10mA (1<<28) -#define S3C2440_DSC1_SCK1_8mA (2<<28) -#define S3C2440_DSC1_SCK1_6mA (3<<28) -#define S3C2440_DSC1_SCK1_MASK (3<<28) - -#define S3C2440_DSC1_SCK0 (S3C2440_SELECT_DSC1 | 26) -#define S3C2440_DSC1_SCK0_12mA (0<<26) -#define S3C2440_DSC1_SCK0_10mA (1<<26) -#define S3C2440_DSC1_SCK0_8mA (2<<26) -#define S3C2440_DSC1_SCK0_6mA (3<<26) -#define S3C2440_DSC1_SCK0_MASK (3<<26) - -#define S3C2440_DSC1_SCKE (S3C2440_SELECT_DSC1 | 24) -#define S3C2440_DSC1_SCKE_10mA (0<<24) -#define S3C2440_DSC1_SCKE_8mA (1<<24) -#define S3C2440_DSC1_SCKE_6mA (2<<24) -#define S3C2440_DSC1_SCKE_4mA (3<<24) -#define S3C2440_DSC1_SCKE_MASK (3<<24) - -/* SDRAM nRAS/nCAS */ -#define S3C2440_DSC1_SDR (S3C2440_SELECT_DSC1 | 22) -#define S3C2440_DSC1_SDR_10mA (0<<22) -#define S3C2440_DSC1_SDR_8mA (1<<22) -#define S3C2440_DSC1_SDR_6mA (2<<22) -#define S3C2440_DSC1_SDR_4mA (3<<22) -#define S3C2440_DSC1_SDR_MASK (3<<22) - -/* NAND Flash Controller */ -#define S3C2440_DSC1_NFC (S3C2440_SELECT_DSC1 | 20) -#define S3C2440_DSC1_NFC_10mA (0<<20) -#define S3C2440_DSC1_NFC_8mA (1<<20) -#define S3C2440_DSC1_NFC_6mA (2<<20) -#define S3C2440_DSC1_NFC_4mA (3<<20) -#define S3C2440_DSC1_NFC_MASK (3<<20) - -/* nBE[0..3] */ -#define S3C2440_DSC1_nBE (S3C2440_SELECT_DSC1 | 18) -#define S3C2440_DSC1_nBE_10mA (0<<18) -#define S3C2440_DSC1_nBE_8mA (1<<18) -#define S3C2440_DSC1_nBE_6mA (2<<18) -#define S3C2440_DSC1_nBE_4mA (3<<18) -#define S3C2440_DSC1_nBE_MASK (3<<18) - -#define S3C2440_DSC1_WOE (S3C2440_SELECT_DSC1 | 16) -#define S3C2440_DSC1_WOE_10mA (0<<16) -#define S3C2440_DSC1_WOE_8mA (1<<16) -#define S3C2440_DSC1_WOE_6mA (2<<16) -#define S3C2440_DSC1_WOE_4mA (3<<16) -#define S3C2440_DSC1_WOE_MASK (3<<16) - -#define S3C2440_DSC1_CS7 (S3C2440_SELECT_DSC1 | 14) -#define S3C2440_DSC1_CS7_10mA (0<<14) -#define S3C2440_DSC1_CS7_8mA (1<<14) -#define S3C2440_DSC1_CS7_6mA (2<<14) -#define S3C2440_DSC1_CS7_4mA (3<<14) -#define S3C2440_DSC1_CS7_MASK (3<<14) - -#define S3C2440_DSC1_CS6 (S3C2440_SELECT_DSC1 | 12) -#define S3C2440_DSC1_CS6_10mA (0<<12) -#define S3C2440_DSC1_CS6_8mA (1<<12) -#define S3C2440_DSC1_CS6_6mA (2<<12) -#define S3C2440_DSC1_CS6_4mA (3<<12) -#define S3C2440_DSC1_CS6_MASK (3<<12) - -#define S3C2440_DSC1_CS5 (S3C2440_SELECT_DSC1 | 10) -#define S3C2440_DSC1_CS5_10mA (0<<10) -#define S3C2440_DSC1_CS5_8mA (1<<10) -#define S3C2440_DSC1_CS5_6mA (2<<10) -#define S3C2440_DSC1_CS5_4mA (3<<10) -#define S3C2440_DSC1_CS5_MASK (3<<10) - -#define S3C2440_DSC1_CS4 (S3C2440_SELECT_DSC1 | 8) -#define S3C2440_DSC1_CS4_10mA (0<<8) -#define S3C2440_DSC1_CS4_8mA (1<<8) -#define S3C2440_DSC1_CS4_6mA (2<<8) -#define S3C2440_DSC1_CS4_4mA (3<<8) -#define S3C2440_DSC1_CS4_MASK (3<<8) - -#define S3C2440_DSC1_CS3 (S3C2440_SELECT_DSC1 | 6) -#define S3C2440_DSC1_CS3_10mA (0<<6) -#define S3C2440_DSC1_CS3_8mA (1<<6) -#define S3C2440_DSC1_CS3_6mA (2<<6) -#define S3C2440_DSC1_CS3_4mA (3<<6) -#define S3C2440_DSC1_CS3_MASK (3<<6) - -#define S3C2440_DSC1_CS2 (S3C2440_SELECT_DSC1 | 4) -#define S3C2440_DSC1_CS2_10mA (0<<4) -#define S3C2440_DSC1_CS2_8mA (1<<4) -#define S3C2440_DSC1_CS2_6mA (2<<4) -#define S3C2440_DSC1_CS2_4mA (3<<4) -#define S3C2440_DSC1_CS2_MASK (3<<4) - -#define S3C2440_DSC1_CS1 (S3C2440_SELECT_DSC1 | 2) -#define S3C2440_DSC1_CS1_10mA (0<<2) -#define S3C2440_DSC1_CS1_8mA (1<<2) -#define S3C2440_DSC1_CS1_6mA (2<<2) -#define S3C2440_DSC1_CS1_4mA (3<<2) -#define S3C2440_DSC1_CS1_MASK (3<<2) - -#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0) -#define S3C2440_DSC1_CS0_10mA (0<<0) -#define S3C2440_DSC1_CS0_8mA (1<<0) -#define S3C2440_DSC1_CS0_6mA (2<<0) -#define S3C2440_DSC1_CS0_4mA (3<<0) -#define S3C2440_DSC1_CS0_MASK (3<<0) - -#endif /* CONFIG_CPU_S3C2440 */ - -#endif /* __ASM_ARCH_REGS_DSC_H */ - diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c index c60f67a75aff..206765cc4092 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2412.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c @@ -21,19 +21,19 @@ #include #include -#include #include #include -#include +#include #include -#include +#include #include #include - #include +#include "regs-dsc.h" + extern void s3c2412_sleep_enter(void); static int s3c2412_cpu_suspend(unsigned long arg) diff --git a/arch/arm/mach-s3c24xx/regs-dsc.h b/arch/arm/mach-s3c24xx/regs-dsc.h new file mode 100644 index 000000000000..98fd4a05587c --- /dev/null +++ b/arch/arm/mach-s3c24xx/regs-dsc.h @@ -0,0 +1,220 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-dsc.h + * + * Copyright (c) 2004 Simtec Electronics + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2440/S3C2412 Signal Drive Strength Control +*/ + + +#ifndef __ASM_ARCH_REGS_DSC_H +#define __ASM_ARCH_REGS_DSC_H "2440-dsc" + +#if defined(CONFIG_CPU_S3C2412) +#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) +#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) +#endif + +#if defined(CONFIG_CPU_S3C2416) +#define S3C2416_DSC0 S3C2410_GPIOREG(0xc0) +#define S3C2416_DSC1 S3C2410_GPIOREG(0xc4) +#define S3C2416_DSC2 S3C2410_GPIOREG(0xc8) +#define S3C2416_DSC3 S3C2410_GPIOREG(0x110) + +#define S3C2416_SELECT_DSC0 (0 << 30) +#define S3C2416_SELECT_DSC1 (1 << 30) +#define S3C2416_SELECT_DSC2 (2 << 30) +#define S3C2416_SELECT_DSC3 (3 << 30) + +#define S3C2416_DSC_GETSHIFT(x) (x & 30) + +#define S3C2416_DSC0_CF (S3C2416_SELECT_DSC0 | 28) +#define S3C2416_DSC0_CF_5mA (0 << 28) +#define S3C2416_DSC0_CF_10mA (1 << 28) +#define S3C2416_DSC0_CF_15mA (2 << 28) +#define S3C2416_DSC0_CF_21mA (3 << 28) +#define S3C2416_DSC0_CF_MASK (3 << 28) + +#define S3C2416_DSC0_nRBE (S3C2416_SELECT_DSC0 | 26) +#define S3C2416_DSC0_nRBE_5mA (0 << 26) +#define S3C2416_DSC0_nRBE_10mA (1 << 26) +#define S3C2416_DSC0_nRBE_15mA (2 << 26) +#define S3C2416_DSC0_nRBE_21mA (3 << 26) +#define S3C2416_DSC0_nRBE_MASK (3 << 26) + +#define S3C2416_DSC0_nROE (S3C2416_SELECT_DSC0 | 24) +#define S3C2416_DSC0_nROE_5mA (0 << 24) +#define S3C2416_DSC0_nROE_10mA (1 << 24) +#define S3C2416_DSC0_nROE_15mA (2 << 24) +#define S3C2416_DSC0_nROE_21mA (3 << 24) +#define S3C2416_DSC0_nROE_MASK (3 << 24) + +#endif + +#if defined(CONFIG_CPU_S3C244X) + +#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) +#define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) + +#define S3C2440_SELECT_DSC0 (0) +#define S3C2440_SELECT_DSC1 (1<<31) + +#define S3C2440_DSC_GETSHIFT(x) ((x) & 31) + +#define S3C2440_DSC0_DISABLE (1<<31) + +#define S3C2440_DSC0_ADDR (S3C2440_SELECT_DSC0 | 8) +#define S3C2440_DSC0_ADDR_12mA (0<<8) +#define S3C2440_DSC0_ADDR_10mA (1<<8) +#define S3C2440_DSC0_ADDR_8mA (2<<8) +#define S3C2440_DSC0_ADDR_6mA (3<<8) +#define S3C2440_DSC0_ADDR_MASK (3<<8) + +/* D24..D31 */ +#define S3C2440_DSC0_DATA3 (S3C2440_SELECT_DSC0 | 6) +#define S3C2440_DSC0_DATA3_12mA (0<<6) +#define S3C2440_DSC0_DATA3_10mA (1<<6) +#define S3C2440_DSC0_DATA3_8mA (2<<6) +#define S3C2440_DSC0_DATA3_6mA (3<<6) +#define S3C2440_DSC0_DATA3_MASK (3<<6) + +/* D16..D23 */ +#define S3C2440_DSC0_DATA2 (S3C2440_SELECT_DSC0 | 4) +#define S3C2440_DSC0_DATA2_12mA (0<<4) +#define S3C2440_DSC0_DATA2_10mA (1<<4) +#define S3C2440_DSC0_DATA2_8mA (2<<4) +#define S3C2440_DSC0_DATA2_6mA (3<<4) +#define S3C2440_DSC0_DATA2_MASK (3<<4) + +/* D8..D15 */ +#define S3C2440_DSC0_DATA1 (S3C2440_SELECT_DSC0 | 2) +#define S3C2440_DSC0_DATA1_12mA (0<<2) +#define S3C2440_DSC0_DATA1_10mA (1<<2) +#define S3C2440_DSC0_DATA1_8mA (2<<2) +#define S3C2440_DSC0_DATA1_6mA (3<<2) +#define S3C2440_DSC0_DATA1_MASK (3<<2) + +/* D0..D7 */ +#define S3C2440_DSC0_DATA0 (S3C2440_SELECT_DSC0 | 0) +#define S3C2440_DSC0_DATA0_12mA (0<<0) +#define S3C2440_DSC0_DATA0_10mA (1<<0) +#define S3C2440_DSC0_DATA0_8mA (2<<0) +#define S3C2440_DSC0_DATA0_6mA (3<<0) +#define S3C2440_DSC0_DATA0_MASK (3<<0) + +#define S3C2440_DSC1_SCK1 (S3C2440_SELECT_DSC1 | 28) +#define S3C2440_DSC1_SCK1_12mA (0<<28) +#define S3C2440_DSC1_SCK1_10mA (1<<28) +#define S3C2440_DSC1_SCK1_8mA (2<<28) +#define S3C2440_DSC1_SCK1_6mA (3<<28) +#define S3C2440_DSC1_SCK1_MASK (3<<28) + +#define S3C2440_DSC1_SCK0 (S3C2440_SELECT_DSC1 | 26) +#define S3C2440_DSC1_SCK0_12mA (0<<26) +#define S3C2440_DSC1_SCK0_10mA (1<<26) +#define S3C2440_DSC1_SCK0_8mA (2<<26) +#define S3C2440_DSC1_SCK0_6mA (3<<26) +#define S3C2440_DSC1_SCK0_MASK (3<<26) + +#define S3C2440_DSC1_SCKE (S3C2440_SELECT_DSC1 | 24) +#define S3C2440_DSC1_SCKE_10mA (0<<24) +#define S3C2440_DSC1_SCKE_8mA (1<<24) +#define S3C2440_DSC1_SCKE_6mA (2<<24) +#define S3C2440_DSC1_SCKE_4mA (3<<24) +#define S3C2440_DSC1_SCKE_MASK (3<<24) + +/* SDRAM nRAS/nCAS */ +#define S3C2440_DSC1_SDR (S3C2440_SELECT_DSC1 | 22) +#define S3C2440_DSC1_SDR_10mA (0<<22) +#define S3C2440_DSC1_SDR_8mA (1<<22) +#define S3C2440_DSC1_SDR_6mA (2<<22) +#define S3C2440_DSC1_SDR_4mA (3<<22) +#define S3C2440_DSC1_SDR_MASK (3<<22) + +/* NAND Flash Controller */ +#define S3C2440_DSC1_NFC (S3C2440_SELECT_DSC1 | 20) +#define S3C2440_DSC1_NFC_10mA (0<<20) +#define S3C2440_DSC1_NFC_8mA (1<<20) +#define S3C2440_DSC1_NFC_6mA (2<<20) +#define S3C2440_DSC1_NFC_4mA (3<<20) +#define S3C2440_DSC1_NFC_MASK (3<<20) + +/* nBE[0..3] */ +#define S3C2440_DSC1_nBE (S3C2440_SELECT_DSC1 | 18) +#define S3C2440_DSC1_nBE_10mA (0<<18) +#define S3C2440_DSC1_nBE_8mA (1<<18) +#define S3C2440_DSC1_nBE_6mA (2<<18) +#define S3C2440_DSC1_nBE_4mA (3<<18) +#define S3C2440_DSC1_nBE_MASK (3<<18) + +#define S3C2440_DSC1_WOE (S3C2440_SELECT_DSC1 | 16) +#define S3C2440_DSC1_WOE_10mA (0<<16) +#define S3C2440_DSC1_WOE_8mA (1<<16) +#define S3C2440_DSC1_WOE_6mA (2<<16) +#define S3C2440_DSC1_WOE_4mA (3<<16) +#define S3C2440_DSC1_WOE_MASK (3<<16) + +#define S3C2440_DSC1_CS7 (S3C2440_SELECT_DSC1 | 14) +#define S3C2440_DSC1_CS7_10mA (0<<14) +#define S3C2440_DSC1_CS7_8mA (1<<14) +#define S3C2440_DSC1_CS7_6mA (2<<14) +#define S3C2440_DSC1_CS7_4mA (3<<14) +#define S3C2440_DSC1_CS7_MASK (3<<14) + +#define S3C2440_DSC1_CS6 (S3C2440_SELECT_DSC1 | 12) +#define S3C2440_DSC1_CS6_10mA (0<<12) +#define S3C2440_DSC1_CS6_8mA (1<<12) +#define S3C2440_DSC1_CS6_6mA (2<<12) +#define S3C2440_DSC1_CS6_4mA (3<<12) +#define S3C2440_DSC1_CS6_MASK (3<<12) + +#define S3C2440_DSC1_CS5 (S3C2440_SELECT_DSC1 | 10) +#define S3C2440_DSC1_CS5_10mA (0<<10) +#define S3C2440_DSC1_CS5_8mA (1<<10) +#define S3C2440_DSC1_CS5_6mA (2<<10) +#define S3C2440_DSC1_CS5_4mA (3<<10) +#define S3C2440_DSC1_CS5_MASK (3<<10) + +#define S3C2440_DSC1_CS4 (S3C2440_SELECT_DSC1 | 8) +#define S3C2440_DSC1_CS4_10mA (0<<8) +#define S3C2440_DSC1_CS4_8mA (1<<8) +#define S3C2440_DSC1_CS4_6mA (2<<8) +#define S3C2440_DSC1_CS4_4mA (3<<8) +#define S3C2440_DSC1_CS4_MASK (3<<8) + +#define S3C2440_DSC1_CS3 (S3C2440_SELECT_DSC1 | 6) +#define S3C2440_DSC1_CS3_10mA (0<<6) +#define S3C2440_DSC1_CS3_8mA (1<<6) +#define S3C2440_DSC1_CS3_6mA (2<<6) +#define S3C2440_DSC1_CS3_4mA (3<<6) +#define S3C2440_DSC1_CS3_MASK (3<<6) + +#define S3C2440_DSC1_CS2 (S3C2440_SELECT_DSC1 | 4) +#define S3C2440_DSC1_CS2_10mA (0<<4) +#define S3C2440_DSC1_CS2_8mA (1<<4) +#define S3C2440_DSC1_CS2_6mA (2<<4) +#define S3C2440_DSC1_CS2_4mA (3<<4) +#define S3C2440_DSC1_CS2_MASK (3<<4) + +#define S3C2440_DSC1_CS1 (S3C2440_SELECT_DSC1 | 2) +#define S3C2440_DSC1_CS1_10mA (0<<2) +#define S3C2440_DSC1_CS1_8mA (1<<2) +#define S3C2440_DSC1_CS1_6mA (2<<2) +#define S3C2440_DSC1_CS1_4mA (3<<2) +#define S3C2440_DSC1_CS1_MASK (3<<2) + +#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0) +#define S3C2440_DSC1_CS0_10mA (0<<0) +#define S3C2440_DSC1_CS0_8mA (1<<0) +#define S3C2440_DSC1_CS0_6mA (2<<0) +#define S3C2440_DSC1_CS0_4mA (3<<0) +#define S3C2440_DSC1_CS0_MASK (3<<0) + +#endif /* CONFIG_CPU_S3C2440 */ + +#endif /* __ASM_ARCH_REGS_DSC_H */ + diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index 26ab76094a65..c511a225f07a 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -33,7 +33,6 @@ #include #include -#include #include #include @@ -48,6 +47,8 @@ #include #include +#include "regs-dsc.h" + #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) #define S3C2412_SWRST_RESET (0x533C2412) diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index b0b60a1154d6..ad2671baa910 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include @@ -48,6 +47,8 @@ #include #include +#include "regs-dsc.h" + static struct map_desc s3c244x_iodesc[] __initdata = { IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), -- cgit v1.2.3 From e62359283cc5ce3264a1634f822822669c6b2d9f Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 11:18:31 -0800 Subject: ARM: S3C64XX: make crag6410.h local The header can be local in mach-s3c64xx/. Cc: Mark Brown Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/crag6410.h | 24 ++++++++++++++++++++++++ arch/arm/mach-s3c64xx/include/mach/crag6410.h | 24 ------------------------ arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +- arch/arm/mach-s3c64xx/mach-crag6410.c | 2 +- 4 files changed, 26 insertions(+), 26 deletions(-) create mode 100644 arch/arm/mach-s3c64xx/crag6410.h delete mode 100644 arch/arm/mach-s3c64xx/include/mach/crag6410.h diff --git a/arch/arm/mach-s3c64xx/crag6410.h b/arch/arm/mach-s3c64xx/crag6410.h new file mode 100644 index 000000000000..4c3c9994fc2c --- /dev/null +++ b/arch/arm/mach-s3c64xx/crag6410.h @@ -0,0 +1,24 @@ +/* Cragganmore 6410 shared definitions + * + * Copyright 2011 Wolfson Microelectronics plc + * Mark Brown + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef MACH_CRAG6410_H +#define MACH_CRAG6410_H + +#include + +#define GLENFARCLAS_PMIC_IRQ_BASE IRQ_BOARD_START + +#define PCA935X_GPIO_BASE GPIO_BOARD_START +#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) +#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32) +#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64) +#define MMGPIO_GPIO_BASE (GPIO_BOARD_START + 96) + +#endif diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h deleted file mode 100644 index 4c3c9994fc2c..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h +++ /dev/null @@ -1,24 +0,0 @@ -/* Cragganmore 6410 shared definitions - * - * Copyright 2011 Wolfson Microelectronics plc - * Mark Brown - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef MACH_CRAG6410_H -#define MACH_CRAG6410_H - -#include - -#define GLENFARCLAS_PMIC_IRQ_BASE IRQ_BOARD_START - -#define PCA935X_GPIO_BASE GPIO_BOARD_START -#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) -#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32) -#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64) -#define MMGPIO_GPIO_BASE (GPIO_BOARD_START + 96) - -#endif diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index c6d8dba90623..6e3d717fedbf 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c @@ -29,7 +29,7 @@ #include -#include +#include "crag6410.h" static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = { .line = S3C64XX_GPC(3), diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index cdde249166b5..d5599694457b 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -53,7 +53,6 @@ #include #include #include -#include #include @@ -72,6 +71,7 @@ #include #include "common.h" +#include "crag6410.h" /* serial port setup */ -- cgit v1.2.3 From 8bb86ead0663b098bd9770f457db5b797ae2f071 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 13:20:38 -0800 Subject: ARM: S3C64XX: make regs-gpio-memport.h local The header can be local in mach-s3c64xx/. Cc: Mark Brown Signed-off-by: Kukjin Kim --- .../mach-s3c64xx/include/mach/regs-gpio-memport.h | 25 ---------------------- arch/arm/mach-s3c64xx/mach-crag6410.c | 3 +-- arch/arm/mach-s3c64xx/pm.c | 3 ++- arch/arm/mach-s3c64xx/regs-gpio-memport.h | 24 +++++++++++++++++++++ 4 files changed, 27 insertions(+), 28 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h create mode 100644 arch/arm/mach-s3c64xx/regs-gpio-memport.h diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h deleted file mode 100644 index 82342f6fd27d..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - GPIO memory port register definitions - */ - -#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H -#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ - -#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) -#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) - -#define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0) -#define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4) -#define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8) - -#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) -#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) - -#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */ - diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index d5599694457b..e1a0742b2509 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -54,8 +54,6 @@ #include #include -#include - #include #include #include @@ -72,6 +70,7 @@ #include "common.h" #include "crag6410.h" +#include "regs-gpio-memport.h" /* serial port setup */ diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 7feb426fc202..f4319874ce59 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -30,9 +30,10 @@ #include #include #include -#include #include +#include "regs-gpio-memport.h" + struct s3c64xx_pm_domain { char *const name; u32 ena; diff --git a/arch/arm/mach-s3c64xx/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/regs-gpio-memport.h new file mode 100644 index 000000000000..b927593019f5 --- /dev/null +++ b/arch/arm/mach-s3c64xx/regs-gpio-memport.h @@ -0,0 +1,24 @@ +/* + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - GPIO memory port register definitions + */ + +#ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H +#define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ + +#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) +#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) + +#define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0) +#define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4) +#define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8) + +#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) +#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) + +#endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */ + -- cgit v1.2.3 From a81c19700d605a2a07b9a502f0306a9efd3e079d Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 13:24:12 -0800 Subject: ARM: S3C64XX: make regs-modem.h local The header can be local in mach-s3c64xx/. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/include/mach/regs-modem.h | 31 ------------------------- arch/arm/mach-s3c64xx/mach-anw6410.c | 2 +- arch/arm/mach-s3c64xx/mach-crag6410.c | 2 +- arch/arm/mach-s3c64xx/mach-mini6410.c | 2 +- arch/arm/mach-s3c64xx/mach-real6410.c | 2 +- arch/arm/mach-s3c64xx/mach-smartq.c | 2 +- arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +- arch/arm/mach-s3c64xx/pm.c | 2 +- arch/arm/mach-s3c64xx/regs-modem.h | 30 ++++++++++++++++++++++++ 9 files changed, 37 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-modem.h create mode 100644 arch/arm/mach-s3c64xx/regs-modem.h diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h deleted file mode 100644 index 49f7759dedfa..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h +++ /dev/null @@ -1,31 +0,0 @@ -/* arch/arm/plat-s3c64xx/include/plat/regs-modem.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C64XX - modem block registers - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_S3C64XX_REGS_MODEM_H -#define __PLAT_S3C64XX_REGS_MODEM_H __FILE__ - -#define S3C64XX_MODEMREG(x) (S3C64XX_VA_MODEM + (x)) - -#define S3C64XX_MODEM_INT2AP S3C64XX_MODEMREG(0x0) -#define S3C64XX_MODEM_INT2MODEM S3C64XX_MODEMREG(0x4) -#define S3C64XX_MODEM_MIFCON S3C64XX_MODEMREG(0x8) -#define S3C64XX_MODEM_MIFPCON S3C64XX_MODEMREG(0xC) -#define S3C64XX_MODEM_INTCLR S3C64XX_MODEMREG(0x10) -#define S3C64XX_MODEM_DMA_TXADDR S3C64XX_MODEMREG(0x14) -#define S3C64XX_MODEM_DMA_RXADDR S3C64XX_MODEMREG(0x18) - -#define MIFPCON_INT2M_LEVEL (1 << 4) -#define MIFPCON_LCD_BYPASS (1 << 3) - -#endif /* __PLAT_S3C64XX_REGS_MODEM_H */ diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 99e82ac81b69..dac03ab6aec6 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -50,9 +50,9 @@ #include #include #include -#include #include "common.h" +#include "regs-modem.h" /* DM9000 */ #define ANW6410_PA_DM9000 (0x18000000) diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index e1a0742b2509..d2541359ef1f 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -52,7 +52,6 @@ #include #include -#include #include #include @@ -71,6 +70,7 @@ #include "common.h" #include "crag6410.h" #include "regs-gpio-memport.h" +#include "regs-modem.h" /* serial port setup */ diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 07c349cca333..67881e6dae77 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -31,7 +31,6 @@ #include #include -#include #include #include @@ -46,6 +45,7 @@ #include