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authorVictor Kamensky <victor.kamensky@linaro.org>2013-11-08 19:30:38 +0200
committerAndrey Konovalov <andrey.konovalov@linaro.org>2014-04-06 19:50:34 +0400
commit297f1efeba00343e3f2a5ff96d39aa58555144c1 (patch)
tree6a071fee2b0397a85dd2f2e262cc4ba156b92a6b
parent45569199a12eace0b6f5ddb6f8ad9bcce1acd37f (diff)
USB: ehci-omap: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
-rw-r--r--drivers/usb/host/ehci-omap.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index a24720beb39d..f5870aa626ef 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -73,12 +73,12 @@ struct omap_hcd {
static inline void ehci_write(void __iomem *base, u32 reg, u32 val)
{
- __raw_writel(val, base + reg);
+ writel_relaxed(val, base + reg);
}
static inline u32 ehci_read(void __iomem *base, u32 reg)
{
- return __raw_readl(base + reg);
+ return readl_relaxed(base + reg);
}
/* configure so an HC device and id are always provided */