diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2012-02-14 12:09:09 +0000 |
|---|---|---|
| committer | Jon Medhurst <tixy@linaro.org> | 2012-03-19 09:06:33 +0000 |
| commit | 19b45d92a9bd07de334ba2ccdc6060aa5495cd07 (patch) | |
| tree | 2746e4d78b2220b08ed7a6b62cbe531dc1d4135f | |
| parent | 088e82eaee80e14a71d35d5f915395ca36530823 (diff) | |
ARMv7: Flush the vectors page using the base addresstracking-armlt-arm-arch-fixes-3.3-2012.03-2tracking-armlt-arm-arch-fixes
With the domains removal patch, the vectors page is populated using the
kernel linear mapping address. However, the flush_icache_range()
function must be called on the high vectors address because the I-cache
is allowed to have aliases (or can even be ASID-tagged VIVT). Note that
on ARMv7 processors the D-cache is non-aliasing.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: stable@vger.kernel.org
| -rw-r--r-- | arch/arm/kernel/traps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index f84dfe67724f..49cd46a33ed4 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -819,6 +819,6 @@ void __init early_trap_init(void) memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE), syscall_restart_code, sizeof(syscall_restart_code)); - flush_icache_range(vectors, vectors + PAGE_SIZE); + flush_icache_range(CONFIG_VECTORS_BASE, CONFIG_VECTORS_BASE+PAGE_SIZE); modify_domain(DOMAIN_USER, DOMAIN_CLIENT); } |