diff options
author | Jassi Brar <jaswinder.singh@linaro.org> | 2012-04-24 18:01:21 +0530 |
---|---|---|
committer | Andy Green <andy.green@linaro.org> | 2012-04-25 08:17:54 +0800 |
commit | b59fd629de1fc019c7dc05a03716142ef002f7b4 (patch) | |
tree | 805d285613c58230057ca232b98fd5aab6bb4491 | |
parent | 8340c55b8137dfcaee0b80478badc9c219b312c1 (diff) |
Get back the proper cpufreq driverlinux-release-2012-04
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
-rw-r--r-- | arch/arm/mach-omap2/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap2plus-cpufreq.c | 422 |
2 files changed, 423 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 3b1ff1c4ba7f..0c2f864ec473 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -66,7 +66,7 @@ endif obj-$(CONFIG_ARCH_OMAP5) += opp4xxx_data.o # CPUFREQ driver -obj-$(CONFIG_CPU_FREQ) += dvfs.o +obj-$(CONFIG_CPU_FREQ) += dvfs.o omap2plus-cpufreq.o # Power Management ifeq ($(CONFIG_PM),y) diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c new file mode 100644 index 000000000000..8f5ae3ce2eb6 --- /dev/null +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c @@ -0,0 +1,422 @@ +/* + * CPU frequency scaling for OMAP using OPP information + * + * Copyright (C) 2005 Nokia Corporation + * Written by Tony Lindgren <tony@atomide.com> + * + * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King + * + * Copyright (C) 2007-2011 Texas Instruments, Inc. + * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/cpufreq.h> +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/opp.h> +#include <linux/cpu.h> +#include <linux/thermal_framework.h> + +#include <asm/system.h> +#include <asm/smp_plat.h> +#include <asm/cpu.h> + +#include <plat/clock.h> +#include <plat/omap-pm.h> +#include <plat/common.h> + +#include <mach/hardware.h> + +#include "dvfs.h" + +#include "dvfs.h" + +#ifdef CONFIG_SMP +struct lpj_info { + unsigned long ref; + unsigned int freq; +}; + +static DEFINE_PER_CPU(struct lpj_info, lpj_ref); +static struct lpj_info global_lpj_ref; +#endif + +static struct cpufreq_frequency_table *freq_table; +static atomic_t freq_table_users = ATOMIC_INIT(0); +static struct clk *mpu_clk; +static char *mpu_clk_name; +static struct device *mpu_dev; +static DEFINE_MUTEX(omap_cpufreq_lock); + +static unsigned int max_thermal; +static unsigned int max_freq; +static unsigned int current_target_freq; +static unsigned int current_cooling_level; +static bool omap_cpufreq_ready; + +static unsigned int omap_getspeed(unsigned int cpu) +{ + unsigned long rate; + + if (cpu >= NR_CPUS) + return 0; + + rate = clk_get_rate(mpu_clk) / 1000; + return rate; +} + +static int omap_cpufreq_scale(unsigned int target_freq, unsigned int cur_freq) +{ + unsigned int i; + int ret; + struct cpufreq_freqs freqs; + + freqs.new = target_freq; + freqs.old = omap_getspeed(0); + + /* + * If the new frequency is more than the thermal max allowed + * frequency, go ahead and scale the mpu device to proper frequency. + */ + if (freqs.new > max_thermal) + freqs.new = max_thermal; + + if ((freqs.old == freqs.new) && (cur_freq == freqs.new)) + return 0; + + /* notifiers */ + for_each_online_cpu(freqs.cpu) + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + +#ifdef CONFIG_CPU_FREQ_DEBUG + printk("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); +#endif + + ret = omap_device_scale(mpu_dev, mpu_dev, freqs.new * 1000); + + freqs.new = omap_getspeed(0); + +#ifdef CONFIG_SMP + /* + * Note that loops_per_jiffy is not updated on SMP systems in + * cpufreq driver. So, update the per-CPU loops_per_jiffy value + * on frequency transition. We need to update all dependent CPUs. + */ + for_each_possible_cpu(i) { + struct lpj_info *lpj = &per_cpu(lpj_ref, i); + if (!lpj->freq) { + lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; + lpj->freq = freqs.old; + } + + per_cpu(cpu_data, i).loops_per_jiffy = + cpufreq_scale(lpj->ref, lpj->freq, freqs.new); + } + + /* And don't forget to adjust the global one */ + if (!global_lpj_ref.freq) { + global_lpj_ref.ref = loops_per_jiffy; + global_lpj_ref.freq = freqs.old; + } + loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, + freqs.new); +#endif + + /* notifiers */ + for_each_online_cpu(freqs.cpu) + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return ret; +} + +static unsigned int omap_thermal_lower_speed(void) +{ + unsigned int max = 0; + unsigned int curr; + int i; + + curr = max_thermal; + + for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) + if (freq_table[i].frequency > max && + freq_table[i].frequency < curr) + max = freq_table[i].frequency; + + if (!max) + return curr; + + return max; +} + +static int omap_verify_speed(struct cpufreq_policy *policy) +{ + if (!freq_table) + return -EINVAL; + return cpufreq_frequency_table_verify(policy, freq_table); +} + +static int omap_target(struct cpufreq_policy *policy, + unsigned int target_freq, unsigned int relation) +{ + unsigned int i; + int ret = 0; + + if (!freq_table) { + dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, + policy->cpu); + return -EINVAL; + } + + ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, + relation, &i); + if (ret) { + dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", + __func__, policy->cpu, target_freq, ret); + return ret; + } + + mutex_lock(&omap_cpufreq_lock); + current_target_freq = freq_table[i].frequency; + ret = omap_cpufreq_scale(current_target_freq, policy->cur); + mutex_unlock(&omap_cpufreq_lock); + + return ret; +} + +static inline void freq_table_free(void) +{ + if (atomic_dec_and_test(&freq_table_users)) + opp_free_cpufreq_table(mpu_dev, &freq_table); +} + +#ifdef CONFIG_THERMAL_FRAMEWORK +static void omap_thermal_step_freq_down(void) +{ + unsigned int cur; + + mutex_lock(&omap_cpufreq_lock); + + max_thermal = omap_thermal_lower_speed(); + + pr_debug("%s: temperature too high, starting cpu throttling at max %u\n", + __func__, max_thermal); + + cur = omap_getspeed(0); + if (cur > max_thermal) + omap_cpufreq_scale(max_thermal, cur); + + mutex_unlock(&omap_cpufreq_lock); +} + +static void omap_thermal_step_freq_up(void) +{ + unsigned int cur; + + mutex_lock(&omap_cpufreq_lock); + max_thermal = max_freq; + + pr_debug("%s: temperature reduced, stepping up to %i\n", + __func__, current_target_freq); + + cur = omap_getspeed(0); + omap_cpufreq_scale(current_target_freq, cur); + + mutex_unlock(&omap_cpufreq_lock); +} + +/* + * cpufreq_apply_cooling: based on requested cooling level, throttle the cpu + * @param cooling_level: percentage of required cooling at the moment + * + * The maximum cpu frequency will be readjusted based on the required + * cooling_level. +*/ +static int cpufreq_apply_cooling(struct thermal_dev *dev, int cooling_level) +{ + if (cooling_level < current_cooling_level) { + pr_debug("%s: Unthrottle cool level %i curr cool %i\n", + __func__, cooling_level, current_cooling_level); + omap_thermal_step_freq_up(); + } else if (cooling_level > current_cooling_level) { + pr_debug("%s: Throttle cool level %i curr cool %i\n", + __func__, cooling_level, current_cooling_level); + omap_thermal_step_freq_down(); + } + + current_cooling_level = cooling_level; + + return 0; +} + +static struct thermal_dev_ops cpufreq_cooling_ops = { + .cool_device = cpufreq_apply_cooling, +}; + +static struct thermal_dev thermal_dev = { + .name = "cpufreq_cooling", + .domain_name = "cpu", + .dev_ops = &cpufreq_cooling_ops, +}; + +static int __init omap_cpufreq_cooling_init(void) +{ + return thermal_cooling_dev_register(&thermal_dev); +} + +static void __exit omap_cpufreq_cooling_exit(void) +{ + thermal_governor_dev_unregister(&thermal_dev); +} +#else +static int __init omap_cpufreq_cooling_init(void) +{ + return 0; +} + +static void __exit omap_cpufreq_cooling_exit(void) +{ +} +#endif + +static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) +{ + int result = 0; + int i; + + mpu_clk = clk_get(NULL, mpu_clk_name); + if (IS_ERR(mpu_clk)) + return PTR_ERR(mpu_clk); + + if (policy->cpu >= NR_CPUS) { + result = -EINVAL; + goto fail_ck; + } + + policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); + + if (atomic_inc_return(&freq_table_users) == 1) + result = opp_init_cpufreq_table(mpu_dev, &freq_table); + + if (result) { + dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", + __func__, policy->cpu, result); + goto fail_ck; + } + + result = cpufreq_frequency_table_cpuinfo(policy, freq_table); + if (result) + goto fail_table; + + cpufreq_frequency_table_get_attr(freq_table, policy->cpu); + + policy->min = policy->cpuinfo.min_freq; + policy->max = policy->cpuinfo.max_freq; + policy->cur = omap_getspeed(policy->cpu); + + for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) + max_freq = max(freq_table[i].frequency, max_freq); + max_thermal = max_freq; + current_cooling_level = 0; + + /* + * On OMAP SMP configuartion, both processors share the voltage + * and clock. So both CPUs needs to be scaled together and hence + * needs software co-ordination. Use cpufreq affected_cpus + * interface to handle this scenario. Additional is_smp() check + * is to keep SMP_ON_UP build working. + */ + if (is_smp()) { + policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; + cpumask_setall(policy->cpus); + } + + omap_cpufreq_cooling_init(); + + /* FIXME: what's the actual transition time? */ +#ifdef CONFIG_MACH_OMAP_5430ZEBU + policy->cpuinfo.transition_latency = 10000 * 1000; +#else + policy->cpuinfo.transition_latency = 300 * 1000; +#endif + return 0; + +fail_table: + freq_table_free(); +fail_ck: + clk_put(mpu_clk); + return result; +} + +static int omap_cpu_exit(struct cpufreq_policy *policy) +{ + freq_table_free(); + clk_put(mpu_clk); + return 0; +} + +static struct freq_attr *omap_cpufreq_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, +}; + +static struct cpufreq_driver omap_driver = { + .flags = CPUFREQ_STICKY, + .verify = omap_verify_speed, + .target = omap_target, + .get = omap_getspeed, + .init = omap_cpu_init, + .exit = omap_cpu_exit, + .name = "omap2plus", + .attr = omap_cpufreq_attr, +}; + +static int __init omap_cpufreq_init(void) +{ + int ret; + + if (cpu_is_omap24xx()) + mpu_clk_name = "virt_prcm_set"; + else if (cpu_is_omap34xx()) + mpu_clk_name = "dpll1_ck"; + else if (cpu_is_omap443x()) + mpu_clk_name = "dpll_mpu_ck"; + else if (cpu_is_omap446x() || (cpu_is_omap54xx())) + mpu_clk_name = "virt_dpll_mpu_ck"; + + if (!mpu_clk_name) { + pr_err("%s: unsupported Silicon?\n", __func__); + return -EINVAL; + } + + mpu_dev = omap2_get_mpuss_device(); + if (!mpu_dev) { + pr_warning("%s: unable to get the mpu device\n", __func__); + return -EINVAL; + } + + ret = cpufreq_register_driver(&omap_driver); + omap_cpufreq_ready = !ret; + return ret; + +} + +static void __exit omap_cpufreq_exit(void) +{ + omap_cpufreq_cooling_exit(); + cpufreq_unregister_driver(&omap_driver); +} + +MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); +MODULE_LICENSE("GPL"); +late_initcall(omap_cpufreq_init); +module_exit(omap_cpufreq_exit); |