aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2014-10-08Merge branch 'tracking-ll-fixes' into merge-linux-linaroll-20141008.0ll_20141008.0Andrey Konovalov
2014-10-08Merge branch 'tracking-llvm' into merge-linux-linaroAndrey Konovalov
2014-10-08fixup: ATAG MEM fixup loader for Qualcomm devicesBjorn Andersson
The fixup.bin will when prepended to zImage fixup the atag mem such that the kernel will be happy. Without this a panic will occur upon freeing bootmem. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2014-10-08ARM: multi_v7_defconfig: Add QCOM specific driversSrinivas Kandagatla
This patch adds common kconfig options required for qcom chips to work. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM:qcom: Add WLAN reset supportSrinivas Kandagatla
This patch adds wlan reset functionality to board specific data as sdio device does not support platform speific data from DT yet. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ath6kl: Add SDIO device ID for QCA6234X SupportSrinivas Kandagatla
This patch adds device ID 402 to support QCA6234X found in APQ8064 SOC in IFC6410 board. Tested with mainline mmci sdio driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08mmc: mmci_qcom_dml: fix is never less than zero warning.Srinivas Kandagatla
This patch fixes a typo which resulted in 'is never less than zero warning' reported by static checker. drivers/mmc/host/mmci_qcom_dml.c:131 dml_hw_init() warn: unsigned 'producer_id' is never less than zero. drivers/mmc/host/mmci_qcom_dml.c 121 /* Initialize the dml hardware connected to SD Card controller */ 122 int dml_hw_init(struct mmci_host *host, struct device_node *np) 123 { 124 u32 config; 125 void __iomem *base; 126 u32 consumer_id, producer_id; 127 128 consumer_id = of_get_dml_pipe_index(np, "tx"); 129 producer_id = of_get_dml_pipe_index(np, "rx"); 130 131 if (producer_id < 0 || consumer_id < 0) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 132 Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08mmc: mmci: rename sdio flag in vendor data to st_sdioSrinivas Kandagatla
This patch renames sdio flag in vendor data to st_sdio, as this flag is only used to enable ST specific sdio setup. This will also ensure that the ST specfic setup is not done on other vendor like Qualcomm. Originally the issue was detected while testing WLAN ath6kl on IFC6410 board with APQ8064 SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08mmc: mmci: Add sdio enable mask in variant dataSrinivas Kandagatla
This patch adds sdio enable mask in variant data, SOCs like ST have special bits in datactrl register to enable sdio. Unconditionally setting this bit in this driver breaks other SOCs like Qualcomm which maps this bits to something else, so making this enable bit to come from variant data solves the issue. Originally the issue is detected while testing WLAN ath6kl on Qualcomm APQ8064. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08mmc: mmci: Support any block sizes for ux500v2 and qcom variantUlf Hansson
For the ux500v2 variant of the PL18x block, any block sizes are supported. This will make it possible to decrease data overhead for SDIO transfers. This patch is based on Ulf Hansson patch http://www.spinics.net/lists/linux-mmc/msg12160.html Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> enabled this support on qcom variant. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-08mmc: mmci: Add qcom dml support to the driver.Srinivas Kandagatla
On Qualcomm APQ8064 SOCs, SD card controller has an additional glue called DML (Data Mover Local/Lite) to assist dma transfers. This hardware needs to be setup before any dma transfer is requested. DML itself is not a DMA engine, its just a gule between the SD card controller and dma controller. Most of this code has been ported from qualcomm's 3.4 kernel. This patch adds the code necessary to intialize the hardware and setup before doing any dma transfers. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08regulator: qcom-rpm: Regulator driver for the Qualcomm RPMBjorn Andersson
Driver for regulators exposed by the Resource Power Manager (RPM) found in Qualcomm 8660, 8960 and 8064 based devices. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2014-10-08mfd: qcom-rpm: Driver for the Qualcomm RPMBjorn Andersson
Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960 and 8064 based devices. The driver exposes resources that child drivers can operate on; to implementing regulator, clock and bus frequency drivers. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2014-10-08mfd: devicetree: bindings: Add Qualcomm RPM DT bindingBjorn Andersson
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660, 8960 and 8064 based devices. The binding currently describes the rpm itself and the regulator subnodes. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2014-10-08pci: qcom: move device init to subsys_initcall_syncSrinivas Kandagatla
This patch moves device init call from subsys_initcall to its sync variant. This is required because most of the dependent regulators drivers comeup at subsys_initcall level and this will result in defer probe of this driver. This behaviour will have an side effect of pci devices being probed at pci_scan_root_bus call, which means before the bus resources are actually allocated. moving to subsys_initcall_sync call will ensure that all the subsys_initcall level calls are finished before invoking the deivce init. Originally found while testing atl1c driver on IFC6410 board. [ 0.281558] qcom_pcie 1b500000.pci: Failed to get vdd supply [ 0.286396] platform 1b500000.pci: Driver qcom_pcie requests probe deferral ... [ 1.804406] PCI host bridge to bus 0000:00 [ 1.806090] pci_bus 0000:00: root bus resource [mem 0x08000000-0x0fdfffff] [ 1.810247] pci_bus 0000:00: root bus resource [io 0xfe00000-0xfefffff] [ 1.817105] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 1.824023] pci 0000:00:00.0: [17cb:0101] type 01 class 0xff0000 [ 1.832008] pci 0000:00:00.0: supports D1 [ 1.837829] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 1.842170] PCI: bus0: Fast back to back transfers disabled [ 1.847485] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 1.853206] pci 0000:01:00.0: [1969:1083] type 00 class 0x020000 [ 1.860920] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0003ffff 64bit] [ 1.867123] pci 0000:01:00.0: reg 0x18: [io 0x0000-0x007f] [ 1.874105] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 1.879499] PCI: bus1: Fast back to back transfers disabled [ 1.885777] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 1.891336] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 01 [ 1.898325] atl1c 0000:01:00.0: can't enable device: BAR 0 [mem 0x00000000-0x0003ffff 64bit] not claimed [ 1.904509] atl1c 0000:01:00.0: cannot enable PCI device [ 1.914232] atl1c: probe of 0000:01:00.0 failed with error -22 [ 1.919630] pci 0000:00:00.0: BAR 8: assigned [mem 0x08000000-0x080fffff] [ 1.925172] pci 0000:00:00.0: BAR 7: assigned [io 0xfe00000-0xfe00fff] [ 1.932044] pci 0000:01:00.0: BAR 0: assigned [mem 0x08000000-0x0803ffff 64bit] [ 1.938488] pci 0000:01:00.0: BAR 2: assigned [io 0xfe00000-0xfe0007f] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: add msi supportSrinivas Kandagatla
This patch adds msi support using irq domain in the driver, this is required to get ethernet working on IFC6410 board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: Add support to external phy reference clk.Srinivas Kandagatla
This patch adds support to configuration which use external phy reference clk, this option is now available via dt using "qcom,external-phy-refclk" property. Without this option the driver will always configure the phy to use internal clk which will not work for SOCs like APQ8064 which uses external phy reference clock on IFC6410 board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: remove static declaration of functions.Srinivas Kandagatla
This patch removes declaration of the local function, by re-ordering the usage. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: Add regulator supportSrinivas Kandagatla
This patch adds regulator support to the driver. There are 3 regulators VDD, AVDD and V3P3_PCIECLK which are necessary for pci IP to work. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: move dt parsing code out of probeSrinivas Kandagatla
This patch is a cleanup patch to probe function, as the code in probe function exceeds more than 200 lines, so its better to split it for better reablity and easy in future to add new code for regulators. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: fix unused variable warning.Srinivas Kandagatla
This patch fixes warning: unused variable ‘qcom_pcie’ in the remove code. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: qcom: fix a typo in reset gpioSrinivas Kandagatla
This patch fixes a typo in gpio reset code. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08PCI: qcom: Add support for pcie controllers on IPQ8064Kumar Gala
fixed checkpatch warnings too. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08pci: OF: Fix the conversion of IO ranges into IO resources.Liviu Dudau
The ranges property for a host bridge controller in DT describes the mapping between the PCI bus address and the CPU physical address. The resources framework however expects that the IO resources start at a pseudo "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT. The conversion from pci ranges to resources failed to take that into account. In the process move the function into drivers/of/address.c as it now depends on pci_address_to_pio() code and make it return an error message. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Tested-by: Tanmay Inamdar <tinamdar@apm.com>
2014-10-08pci: Introduce pci_register_io_range() helper function.Liviu Dudau
Some architectures do not have a simple view of the PCI I/O space and instead use a range of CPU addresses that map to bus addresses. For some architectures these ranges will be expressed by OF bindings in a device tree file. Introduce a pci_register_io_range() helper function with a generic implementation that can be used by such architectures to keep track of the I/O ranges described by the PCI bindings. If the PCI_IOBASE macro is not defined that signals lack of support for PCI and we return an error. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
2014-10-08arm: dts: qcom: Add idle states device nodes for apq8064Srinivas Kandagatla
Add allowable C-States for each cpu using the cpu-idle-states node. ARM spec dictates WFI as the default idle state at 0. Support standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08arm: dts: qcom: Add idle states device nodes for 8974Lina Iyer
Add allowable C-States for each cpu using the cpu-idle-states node. ARM spec dictates WFI as the default idle state at 0. Support standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
2014-10-08arm: dts: qcom: Add SPM device bindings for 8974Lina Iyer
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system power manager and controls the logic around the cores (cpu and L2). Each core has an instance of SPM and controls only that core. Each cpu SPM is configured to support WFI and SPC (standalone-power collapse). Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
2014-10-08ARM: dts: qcom: Add necessary DT data for Krait cpufreqStephen Boyd
Add the necessary DT nodes and data so we can probe the cpufreq driver on MSM devices with Krait CPUs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-10-08WIP: ARM: DT: ifc6410 : add lvds panelRob Clark
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08WIP: ARM: DT: APQ8064: Add iommuRob Clark
2014-10-08ARM: DT: APQ8064: Add MDP supportRob Clark
This patch adds MDP node to APQ8064 dt. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM: DT: ifc6410: add wlan node with reset line.Srinivas Kandagatla
This patch adds wlan node with platform specfic reset gpio line. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM: DT: apq8064: Add pmic gpio nodeSrinivas Kandagatla
This patch adds pmic gpio node to the device tree, this node is necessary for devices like wlan to control reset gpio. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08DT: ARM: APQ8064: add pci supportSrinivas Kandagatla
This patch adds PCIE support to APQ8064, tested on IFC6410 board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08DT:ARM:APQ8064: Add SATA controller support.Srinivas Kandagatla
This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM: DT: APQ8064: Add USB OTG supportSrinivas Kandagatla
This patch adds USB OTG support on USB1 of APQ8064 SOC. Tested on IFC6410 with ethernet gadget. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08DT: ARM: APQ8064: Add usb host support.Srinivas Kandagatla
This patch adds device tree nodes to support two usb hosts on APQ8064 SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM: DT: apq8064: add rpm supportSrinivas Kandagatla
This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
2014-10-08ARM: DT: msm8960: Add sdcc nodesStephen Boyd
Add the sdcc nodes to support the SD card controller using pl180 mmci driver. We also add a temporary fixed regulator until the regulator driver is mainlined. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: msm8660: Add sdcc nodesStephen Boyd
Add the sdcc nodes to support the SD card controller using pl180 mmci driver. We also add a temporary fixed regulator until the regulator driver is mainlined. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: apq8064: Add i2c device nodeskiran.padwal@smartplayin.com
This patch adds i2c pinctrl DT node for IFC6410 board. It also adds necessary DT support for i2c eeprom which is present on IFC6410. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: apq8064: add support to sdcc4 for wlan.Srinivas Kandagatla
This patch adds sdcc4 node to enable wlan support on IFC6410 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: dts: qcom: Add I2C dt node for MSM8974 and DB8074 boardkiran.padwal@smartplayin.com
Add support for i2c controller on the DB8074 board. It also adds necessary DT support for i2c eeprom which is present on DB8074 board. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: QCOM: apq8064: Add dma support for sdcc nodeSrinivas Kandagatla
This patch adds dma support in both sdcc1 and sdcc3 device node. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: apq8064: Add sdcc support via mcci driver.Srinivas Kandagatla
This patch adds support to SD card controller using generic pl180 mmci driver. This patch also adds temporary fixed regulator to get it going till the actual regulator is mainlined. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: dts: qcom: Add 8064 multimedia clock controller nodeStephen Boyd
Add the mmcc node so that we can probe and use the multimedia clocks on apq8064. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: APQ8064: Add node for ps_hold function in pinctrlPramod Gurav
This patch adds DT support to configure GPIO_78 as function ps_hold on apq8064. CC: Rob Herring <robh+dt@kernel.org> CC: Pawel Moll <pawel.moll@arm.com> CC: Mark Rutland <mark.rutland@arm.com> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Kumar Gala <galak@codeaurora.org> CC: devicetree@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: DT: APQ8064: Add pinctrl supportPramod Gurav
This patch adds device tree nodes to support pinctrl for apq8064 SOC CC: Rob Herring <robh+dt@kernel.org> CC: Pawel Moll <pawel.moll@arm.com> CC: Mark Rutland <mark.rutland@arm.com> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Kumar Gala <galak@codeaurora.org> CC: devicetree@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-08ARM: dts: qcom: Add TLMM DT node for APQ8084Georgi Djakov
This patch adds the TLMM node for the APQ8084 platform. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>