From f9588404af74817586880c75c8b3c82e1a17cafa Mon Sep 17 00:00:00 2001
From: Jon Medhurst <tixy@linaro.org>
Date: Wed, 10 Jun 2015 14:27:44 +0100
Subject: arm64: vexpress: Add fvp-foundation-gicv2-psci.dts

The foundation model is a cut down variant of the base model
so reuse the device-tree for that and disable missing features.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
---
 arch/arm64/boot/dts/arm/Makefile                   |  1 +
 .../boot/dts/arm/fvp-foundation-gicv2-psci.dts     | 51 ++++++++++++++++++++++
 arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi   | 12 ++---
 3 files changed, 58 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm64/boot/dts/arm/fvp-foundation-gicv2-psci.dts

(limited to 'arch')

diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
index fe062c517692..0aec3e55c3ee 100644
--- a/arch/arm64/boot/dts/arm/Makefile
+++ b/arch/arm64/boot/dts/arm/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-base-gicv2-psci.dtb
+dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-foundation-gicv2-psci.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
 
diff --git a/arch/arm64/boot/dts/arm/fvp-foundation-gicv2-psci.dts b/arch/arm64/boot/dts/arm/fvp-foundation-gicv2-psci.dts
new file mode 100644
index 000000000000..6e1ce79a87c3
--- /dev/null
+++ b/arch/arm64/boot/dts/arm/fvp-foundation-gicv2-psci.dts
@@ -0,0 +1,51 @@
+/* Foundation model is Base model with bits removed */
+
+#include "fvp-base-gicv2-psci.dts"
+
+&CPU4 {
+	status = "disabled";
+};
+
+&CPU5 {
+	status = "disabled";
+};
+
+&CPU6 {
+	status = "disabled";
+};
+
+&CPU7 {
+	status = "disabled";
+};
+
+&flash {
+	status = "disabled";
+};
+
+&v2m_video_ram {
+	status = "disabled";
+};
+
+&aaci {
+	status = "disabled";
+};
+
+&mmci {
+	status = "disabled";
+};
+
+&kmi0 {
+	status = "disabled";
+};
+
+&kmi1 {
+	status = "disabled";
+};
+
+&clcd {
+	status = "disabled";
+};
+
+&v2m_oscclk1 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index c46cbb29f3c6..5f1910454e97 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -15,7 +15,7 @@
 		#interrupt-cells = <1>;
 		ranges;
 
-		flash@0,00000000 {
+		flash: flash@0,00000000 {
 			compatible = "arm,vexpress-flash", "cfi-flash";
 			reg = <0 0x00000000 0x04000000>,
 			      <4 0x00000000 0x04000000>;
@@ -76,7 +76,7 @@
 				clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
 			};
 
-			aaci@040000 {
+			aaci: aaci@040000 {
 				compatible = "arm,pl041", "arm,primecell";
 				reg = <0x040000 0x1000>;
 				interrupts = <11>;
@@ -84,7 +84,7 @@
 				clock-names = "apb_pclk";
 			};
 
-			mmci@050000 {
+			mmci: mmci@050000 {
 				compatible = "arm,pl180", "arm,primecell";
 				reg = <0x050000 0x1000>;
 				interrupts = <9 10>;
@@ -96,7 +96,7 @@
 				clock-names = "mclk", "apb_pclk";
 			};
 
-			kmi@060000 {
+			kmi0: kmi@060000 {
 				compatible = "arm,pl050", "arm,primecell";
 				reg = <0x060000 0x1000>;
 				interrupts = <12>;
@@ -104,7 +104,7 @@
 				clock-names = "KMIREFCLK", "apb_pclk";
 			};
 
-			kmi@070000 {
+			kmi1: kmi@070000 {
 				compatible = "arm,pl050", "arm,primecell";
 				reg = <0x070000 0x1000>;
 				interrupts = <13>;
@@ -176,7 +176,7 @@
 				clock-names = "apb_pclk";
 			};
 
-			clcd@1f0000 {
+			clcd: clcd@1f0000 {
 				compatible = "arm,pl111", "arm,primecell";
 				reg = <0x1f0000 0x1000>;
 				interrupt-names = "combined";
-- 
cgit v1.2.3