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authorHaojian Zhuang <haojian.zhuang@linaro.org>2016-09-21 23:02:27 +0800
committerRyan Harkin <ryan.harkin@linaro.org>2016-10-11 17:06:10 +0100
commitda936c200ddebc2e03c274fc889cac83036ae1c7 (patch)
tree83f627576b4a3f602478d080dbf547d836958542
parent242542abf9176a31fab88f78a5990ab74257fcbe (diff)
PL180: update for indentifying SDmmc-v3-001
When CMD6 & ACMD51 are added into indentifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it'll hang when system tries to read expected data. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-rw-r--r--ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
index 5526aaca92..4d839e7145 100644
--- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
+++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
@@ -126,6 +126,15 @@ MciSendCommand (
MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT);
} else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) {
MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD);
+ } else if (MmcCmd == MMC_CMD6) {
+ MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
+ MmioWrite32 (MCI_DATA_LENGTH_REG, 64);
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
+ } else if (MmcCmd == MMC_ACMD51) {
+ MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
+ /* SCR register is 8 bytes long. */
+ MmioWrite32 (MCI_DATA_LENGTH_REG, 8);
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
}
// Create Command for PL180
@@ -223,7 +232,11 @@ MciReadBlockData (
// Read data from the RX FIFO
Loop = 0;
- Finish = MMCI0_BLOCKLEN / 4;
+ if (Length < MMCI0_BLOCKLEN) {
+ Finish = Length / 4;
+ } else {
+ Finish = MMCI0_BLOCKLEN / 4;
+ }
// Raise the TPL at the highest level to disable Interrupts.
Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);