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authorHao Wu <hao.a.wu@intel.com>2018-09-13 15:11:35 +0800
committerHao Wu <hao.a.wu@intel.com>2018-09-30 13:06:42 +0800
commit2ecd829972f8553de83fbf943c5b89863999d7c8 (patch)
treeb19b006b15a544e36068b59dba13673d9f171f63 /MdePkg/Include
parent8285f42e5808cfd0571db215059a4d136fe4a1eb (diff)
MdePkg/BaseLib: Add new AsmLfence API
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193 This commit will add a new BaseLib API AsmLfence(). This API will perform a serializing operation on all load-from-memory instructions that were issued prior to the call of this function. Please note that this API is only available on IA-32 and x64. The purpose of adding this API is to mitigate of the [CVE-2017-5753] Bounds Check Bypass issue when untrusted data are being processed within SMM. More details can be referred at the 'Bounds check bypass mitigation' section at the below link: https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'MdePkg/Include')
-rw-r--r--MdePkg/Include/Library/BaseLib.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 2fae312f2f..8cc086983d 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -7697,6 +7697,19 @@ AsmWriteTr (
);
/**
+ Performs a serializing operation on all load-from-memory instructions that
+ were issued prior the AsmLfence function.
+
+ Executes a LFENCE instruction. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmLfence (
+ VOID
+ );
+
+/**
Patch the immediate operand of an IA32 or X64 instruction such that the byte,
word, dword or qword operand is encoded at the end of the instruction's
binary representation.