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authorJeff Fan <jeff.fan@intel.com>2015-12-18 03:24:27 +0000
committervanjeff <vanjeff@Edk2>2015-12-18 03:24:27 +0000
commit4de216c01641fe4362cabfa0687378a973490832 (patch)
treee24a5835c1a90514a2f678442c0a3c83777bd78c /UefiCpuPkg
parent9d39ed931bf59b8d5afdccf7e1c30ece817b7a04 (diff)
UefiCpuPkg/CpuMpPei: Add GetApLoopMode() to get AP loop mode
Add GetApLoopMode() that will get PCD PcdCpuApLoopMode firstly. If it is ApInMwaitLoop, we will check if MONITOR/MWAIT feature supported by CPUID. If MONITOR/MWAIT feature is not supported, force AP loop mode to ApInHltLoop. GetApLoopMode() also return the largest line size required. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19343 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/CpuMpPei/CpuMpPei.c48
-rw-r--r--UefiCpuPkg/CpuMpPei/CpuMpPei.h6
-rw-r--r--UefiCpuPkg/CpuMpPei/CpuMpPei.inf1
-rw-r--r--UefiCpuPkg/Include/Register/Cpuid.h2
4 files changed, 57 insertions, 0 deletions
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
index 2e6e7611a2..ac609a01f8 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
@@ -118,6 +118,54 @@ ApFuncEnableX2Apic (
}
/**
+ Get AP loop mode.
+
+ @param MonitorFilterSize Returns the largest monitor-line size in bytes.
+
+ @return The AP loop mode.
+**/
+UINT8
+GetApLoopMode (
+ OUT UINT16 *MonitorFilterSize
+ )
+{
+ UINT8 ApLoopMode;
+ UINT32 RegEbx;
+ UINT32 RegEcx;
+ UINT32 RegEdx;
+
+ ASSERT (MonitorFilterSize != NULL);
+
+ ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
+ ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);
+ if (ApLoopMode == ApInMwaitLoop) {
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);
+ if ((RegEcx & BIT3) == 0) {
+ //
+ // If processor does not support MONITOR/MWAIT feature
+ // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode
+ //
+ ApLoopMode = ApInHltLoop;
+ }
+ }
+
+ if (ApLoopMode == ApInHltLoop) {
+ *MonitorFilterSize = 0;
+ } else if (ApLoopMode == ApInRunLoop) {
+ *MonitorFilterSize = sizeof (UINT32);
+ } else if (ApLoopMode == ApInMwaitLoop) {
+ //
+ // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes
+ // CPUID.[EAX=05H].EDX: C-states supported using MWAIT
+ //
+ AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);
+ *MonitorFilterSize = RegEbx & 0xFFFF;
+ }
+
+ return ApLoopMode;
+}
+
+/**
Get CPU MP Data pointer from the Guided HOB.
@return Pointer to Pointer to PEI CPU MP Data
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
index 2b960c6eb1..be4e312377 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
@@ -50,6 +50,12 @@ typedef enum {
CpuStateDisabled
} CPU_STATE;
+typedef enum {
+ ApInHltLoop = 1,
+ ApInMwaitLoop = 2,
+ ApInRunLoop = 3
+} AP_LOOP_MODE;
+
//
// AP reset code information
//
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf b/UefiCpuPkg/CpuMpPei/CpuMpPei.inf
index 423f7f10ed..4a5cfe75ff 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.inf
@@ -81,6 +81,7 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## CONSUMES
[Depex]
gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/UefiCpuPkg/Include/Register/Cpuid.h b/UefiCpuPkg/Include/Register/Cpuid.h
index 6730551ff8..f8ff247d09 100644
--- a/UefiCpuPkg/Include/Register/Cpuid.h
+++ b/UefiCpuPkg/Include/Register/Cpuid.h
@@ -31,6 +31,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define CPUID_CACHE_PARAMS 0x4
+#define CPUID_MONITOR_MWAIT 0x5
+
#define CPUID_EXTENDED_TOPOLOGY 0xB
#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID 0x0
#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT 0x1