From 11d90fac77bc8a7770bce3a95b5f387176f924c5 Mon Sep 17 00:00:00 2001 From: Morten Borup Petersen Date: Wed, 29 May 2019 11:07:00 +0100 Subject: add platform specific firmware files Change-Id: If4ac963b38848b130ec023c9df41490be05e9826 Signed-off-by: Morten Borup Petersen Signed-off-by: Tushar Khandelwal --- product/corstone-700/firmware/RTX_Config.h | 52 +++++++++++++++ product/corstone-700/firmware/fmw_memory.ld.S | 32 ++++++++++ product/corstone-700/firmware/rtx_config.c | 81 ++++++++++++++++++++++++ product/corstone-700/include/escm3_irq.h | 43 +++++++++++++ product/corstone-700/include/escm3_mmap.h | 45 +++++++++++++ product/corstone-700/include/escm3_system_mmap.h | 23 +++++++ product/corstone-700/include/fmw_cmsis.h | 36 +++++++++++ product/corstone-700/include/system_clock.h | 18 ++++++ product/corstone-700/product.mk | 8 +++ tools/build_system/firmware.mk | 7 -- 10 files changed, 338 insertions(+), 7 deletions(-) create mode 100644 product/corstone-700/firmware/RTX_Config.h create mode 100644 product/corstone-700/firmware/fmw_memory.ld.S create mode 100644 product/corstone-700/firmware/rtx_config.c create mode 100644 product/corstone-700/include/escm3_irq.h create mode 100644 product/corstone-700/include/escm3_mmap.h create mode 100644 product/corstone-700/include/escm3_system_mmap.h create mode 100644 product/corstone-700/include/fmw_cmsis.h create mode 100644 product/corstone-700/include/system_clock.h create mode 100644 product/corstone-700/product.mk diff --git a/product/corstone-700/firmware/RTX_Config.h b/product/corstone-700/firmware/RTX_Config.h new file mode 100644 index 0000000..b889222 --- /dev/null +++ b/product/corstone-700/firmware/RTX_Config.h @@ -0,0 +1,52 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef RTX_CONFIG_H_ +#define RTX_CONFIG_H_ + +/* System */ +#define OS_DYNAMIC_MEM_SIZE 0 +#define OS_TICK_FREQ 1000 /* Hz */ +#define OS_ROBIN_ENABLE 0 +#define OS_ROBIN_TIMEOUT 0 +#define OS_ISR_FIFO_QUEUE 16 + +/* Thread */ +#define OS_THREAD_OBJ_MEM 0 +#define OS_THREAD_NUM 1 +#define OS_THREAD_DEF_STACK_NUM 0 +#define OS_THREAD_USER_STACK_SIZE 0 +#define OS_STACK_SIZE 200 +#define OS_IDLE_THREAD_STACK_SIZE 200 +#define OS_STACK_CHECK 1 +#define OS_STACK_WATERMARK 0 +#define OS_PRIVILEGE_MODE 1 + +/* Timer */ +#define OS_TIMER_OBJ_MEM 0 +#define OS_TIMER_NUM 1 +#define OS_TIMER_THREAD_PRIO 40 +#define OS_TIMER_THREAD_STACK_SIZE 200 +#define OS_TIMER_CB_QUEUE 4 + +/* Event flags */ +#define OS_EVFLAGS_OBJ_MEM 0 +#define OS_EVFLAGS_NUM 1 + +#define OS_MUTEX_OBJ_MEM 0 +#define OS_MUTEX_NUM 1 +#define OS_SEMAPHORE_OBJ_MEM 0 +#define OS_SEMAPHORE_NUM 1 +#define OS_MEMPOOL_OBJ_MEM 0 +#define OS_MEMPOOL_NUM 1 +#define OS_MEMPOOL_DATA_SIZE 0 +#define OS_MSGQUEUE_OBJ_MEM 0 +#define OS_MSGQUEUE_NUM 1 +#define OS_MSGQUEUE_DATA_SIZE 0 + +#endif /* RTX_CONFIG_H_ */ diff --git a/product/corstone-700/firmware/fmw_memory.ld.S b/product/corstone-700/firmware/fmw_memory.ld.S new file mode 100644 index 0000000..95c278c --- /dev/null +++ b/product/corstone-700/firmware/fmw_memory.ld.S @@ -0,0 +1,32 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Description: + * Flash firmware memory layout for the linker script. + */ + +#ifndef FMW_MEMORY_LD_S +#define FMW_MEMORY_LD_S + +#include + +#define FIRMWARE_MEM_MODE FWK_MEM_MODE_DUAL_REGION_RELOCATION + +/* + * Flash memory + */ +#define FIRMWARE_MEM0_SIZE FLASH_SIZE +#define FIRMWARE_MEM0_BASE FLASH_START + +/* + * RAM memory + */ +#define FIRMWARE_MEM1_SIZE SRAM_SIZE +#define FIRMWARE_MEM1_BASE SRAM_START + +#define FIRMWARE_STACK_SIZE (2 * 1024) + +#endif /* FMW_MEMORY_LD_S */ diff --git a/product/corstone-700/firmware/rtx_config.c b/product/corstone-700/firmware/rtx_config.c new file mode 100644 index 0000000..928bdd7 --- /dev/null +++ b/product/corstone-700/firmware/rtx_config.c @@ -0,0 +1,81 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + + +#include +#include +#include +#include +#include + +#include + +/* + * Required by RTX to configure the SysTick timer. + */ +uint32_t SystemCoreClock = SYSTEM_CLOCK; + +/* + * Idle thread + */ +__NO_RETURN void osRtxIdleThread(void *argument) +{ + (void)argument; + + while (true) + __WFI(); +} + +/* + * OS error handler + */ +uint32_t osRtxErrorNotify(uint32_t code, void *object_id) +{ + (void)object_id; + + switch (code) { + case osRtxErrorStackUnderflow: + /* + * Stack underflow detected for thread + * thread_id=object_id + */ + break; + + case osRtxErrorISRQueueOverflow: + /* + * ISR Queue overflow detected when inserting object + * object_id + */ + break; + + case osRtxErrorTimerQueueOverflow: + /* + * User Timer Callback Queue overflow detected for timer + * timer_id=object_id + */ + break; + + case osRtxErrorClibSpace: + /* + * Standard C/C++ library libspace not available: + * increase OS_THREAD_LIBSPACE_NUM + */ + break; + + case osRtxErrorClibMutex: + /* + * Standard C/C++ library mutex initialization failed + */ + break; + + default: + break; + } + + osRtxIdleThread(object_id); +} diff --git a/product/corstone-700/include/escm3_irq.h b/product/corstone-700/include/escm3_irq.h new file mode 100644 index 0000000..f30aa43 --- /dev/null +++ b/product/corstone-700/include/escm3_irq.h @@ -0,0 +1,43 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef ESCM3_IRQ_H +#define ESCM3_IRQ_H + +#include + +typedef enum IRQn { + /* ------------------- Cortex-M3 Processor Exceptions Numbers ------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /*------------------- CMSDK Specific Interrupt Numbers ----------------------------*/ + TIMER0_IRQn = 0, /* TIMER 0 Interrupt */ + TIMER1_IRQn = 1, /* TIMER 1 Interrupt */ + HESMHU0_Combined_IRQn = 2, /* Host to External System MHU0 Combined Interrupt */ + ESHMHU0_Combined_IRQn = 3, /* External System to Host MHU0 Combined Interrupt */ + HESMHU1_Combined_IRQn = 4, /* Host to External System MHU1 Combined Interrupt */ + ESHMHU1_Combined_IRQn = 5, /* External System to Host MHU1 Combined Interrupt */ + SEESMHU0_Combined_IRQn = 6, /* Boot processor to External System MHU0 Combined Interrupt */ + ESSEMHU0_Combined_IRQn = 7, /* External System to Boot processor MHU0 Combined Interrupt */ + SEESMHU1_Combined_IRQn = 8, /* Boot processor to External System MHU1 Combined Interrupt */ + ESSEMHU1_Combined_IRQn = 9, /* External System to Boot processor MHU1 Combined Interrupt */ + UART0_Tx_IRQn = 10, /* UART 0 TX Interrupt */ + UART0_Rx_IRQn = 11, /* UART 0 RX Interrupt */ + UART0_RxTimeout_IRQn = 12, /* UART 0 RX Timeout Interrupt */ +} IRQn_Type; + + +#endif /* ESCM3_IRQ_H */ diff --git a/product/corstone-700/include/escm3_mmap.h b/product/corstone-700/include/escm3_mmap.h new file mode 100644 index 0000000..e29194b --- /dev/null +++ b/product/corstone-700/include/escm3_mmap.h @@ -0,0 +1,45 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef ESCM3_MMAP_H +#define ESCM3_MMAP_H + +#include +#include + +/* ===========================================================================*/ +/* ============= Processor and Core Peripheral Section ============= */ +/* ========================================================================== */ + +/* ========================================================================== */ +/* ================ Peripheral memory map ============== */ +/* ========================================================================== */ +#define ES_PL011_UART_BASE (0x4000F000ul) + +/* ============================== MHU Devices ================================*/ +#define MHU0_H_ES_BASE 0x40100000 +#define MHU0_ES_H_BASE 0x40110000 + +#define MHU1_H_ES_BASE 0x40120000 +#define MHU1_ES_H_BASE 0x40130000 + +#define MHU0_SE_ES_BASE 0x40140000 +#define MHU0_ES_SE_BASE 0x40150000 + +#define MHU1_SE_ES_BASE 0x40160000 +#define MHU1_ES_SE_BASE 0x40170000 + +enum se_mhu_device_idx { + ES_H_MHU0_DEVICE_IDX, + ES_H_MHU1_DEVICE_IDX, + ES_SE_MHU0_DEVICE_IDX, + ES_SE_MHU1_DEVICE_IDX, + ES_MHU_DEVICE_IDX_COUNT, +}; + +#endif /* ESCM3_MMAP_H */ diff --git a/product/corstone-700/include/escm3_system_mmap.h b/product/corstone-700/include/escm3_system_mmap.h new file mode 100644 index 0000000..49847d5 --- /dev/null +++ b/product/corstone-700/include/escm3_system_mmap.h @@ -0,0 +1,23 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + + +#ifndef ESCM3_SYSTEM_MMAP_H +#define ESCM3_SYSTEM_MMAP_H + +/*Memory*/ + +#define FLASH_START 0x00000000 +#define FLASH_SIZE 0x00040000 /* 256 KiB */ + + +/* Data memory zones */ +#define SRAM_START 0x20000000 +#define SRAM_SIZE 0x00008000 /* 32 KiB */ + +#endif /* ESCM3_SYSTEM_MMAP_H */ diff --git a/product/corstone-700/include/fmw_cmsis.h b/product/corstone-700/include/fmw_cmsis.h new file mode 100644 index 0000000..0031dbb --- /dev/null +++ b/product/corstone-700/include/fmw_cmsis.h @@ -0,0 +1,36 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + + +#ifndef FMW_CMSIS_H +#define FMW_CMSIS_H + +#define __CHECK_DEVICE_DEFINES +#define __CM7_REV 0x0000U +#define __FPU_PRESENT 0U +#define __MPU_PRESENT 1U +#define __ICACHE_PRESENT 0U +#define __DCACHE_PRESENT 0U +#define __DTCM_PRESENT 0U +#define __NVIC_PRIO_BITS 3U +#define __Vendor_SysTickConfig 0U + +typedef enum IRQn { + NonMaskableInt_IRQn = -14, + MemoryManagement_IRQn = -12, + BusFault_IRQn = -11, + UsageFault_IRQn = -10, + SVCall_IRQn = -5, + DebugMonitor_IRQn = -4, + PendSV_IRQn = -2, + SysTick_IRQn = -1, +} IRQn_Type; + +#include + +#endif /* FMW_CMSIS_H */ diff --git a/product/corstone-700/include/system_clock.h b/product/corstone-700/include/system_clock.h new file mode 100644 index 0000000..73c4557 --- /dev/null +++ b/product/corstone-700/include/system_clock.h @@ -0,0 +1,18 @@ +/* + * + * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + + +#ifndef SYSTEM_CLOCK_H +#define SYSTEM_CLOCK_H + +#define __XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (__XTAL / 2) + + +#endif /* SYSTEM_CLOCK_H */ diff --git a/product/corstone-700/product.mk b/product/corstone-700/product.mk new file mode 100644 index 0000000..10cdc64 --- /dev/null +++ b/product/corstone-700/product.mk @@ -0,0 +1,8 @@ +# +# Copyright (c) 2019, Arm Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +BS_PRODUCT_NAME := corstone-700 +BS_FIRMWARE_LIST := firmware diff --git a/tools/build_system/firmware.mk b/tools/build_system/firmware.mk index 91c7103..b9cebd4 100644 --- a/tools/build_system/firmware.mk +++ b/tools/build_system/firmware.mk @@ -157,13 +157,6 @@ else endif export BUILD_HAS_NOTIFICATION -ifeq ($(BS_FIRMWARE_HAS_OPENAMP),yes) - BUILD_HAS_OPENAMP := yes -else - BUILD_HAS_OPENAMP := no -endif -export BUILD_HAS_OPENAMP - # Add directories to the list of targets to build LIB_TARGETS_y += $(patsubst %,$(MODULES_DIR)/%/src, \ $(BUILD_STANDARD_MODULES)) -- cgit v1.2.3