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authorSudeep Holla <sudeep.holla@arm.com>2017-04-20 11:58:01 +0100
committerAmit Daniel Kachhap <amit.kachhap@arm.com>2018-08-02 17:21:57 +0530
commit2b0552ebec60c9222154f7374c9012c8dba0b08c (patch)
tree495d5a68184fcc5eefd562b52c462569e9f04230
parent16e54b82b449d6e3710433e0d96b8c5613cab25c (diff)
arm64: dts: juno: add mhu doorbell support and scmi device nodes
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi129
-rw-r--r--arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi6
-rw-r--r--arch/arm64/boot/dts/arm/juno-r1.dts12
-rw-r--r--arch/arm64/boot/dts/arm/juno-r2.dts12
-rw-r--r--arch/arm64/boot/dts/arm/juno.dts12
5 files changed, 91 insertions, 80 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 8fd8b98ae81a..0e9136eefea3 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -23,13 +23,14 @@
};
mailbox: mhu@2b1f0000 {
- compatible = "arm,mhu", "arm,primecell";
+ compatible = "arm,mhu-doorbell", "arm,primecell";
reg = <0x0 0x2b1f0000 0x0 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mhu_lpri_rx",
"mhu_hpri_rx";
- #mbox-cells = <1>;
+ #mbox-cells = <2>;
+ mbox-name = "ARM-MHU";
clocks = <&soc_refclk100mhz>;
clock-names = "apb_pclk";
};
@@ -53,7 +54,7 @@
#iommu-cells = <1>;
#global-interrupts = <1>;
dma-coherent;
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
gic: interrupt-controller@2c010000 {
@@ -94,7 +95,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -123,7 +124,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
tpiu_in_port: endpoint {
slave-mode;
@@ -139,7 +140,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -178,7 +179,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
etr_in_port: endpoint {
slave-mode;
@@ -195,7 +196,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
stm_out_port: endpoint {
};
@@ -208,7 +209,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm0: etm@22040000 {
@@ -217,7 +218,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster0_etm0_out_port: endpoint {
remote-endpoint = <&cluster0_funnel_in_port0>;
@@ -231,7 +232,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -267,7 +268,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm1: etm@22140000 {
@@ -276,7 +277,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster0_etm1_out_port: endpoint {
remote-endpoint = <&cluster0_funnel_in_port1>;
@@ -290,7 +291,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm2: etm@23040000 {
@@ -299,7 +300,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster1_etm0_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port0>;
@@ -313,7 +314,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -363,7 +364,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm3: etm@23140000 {
@@ -372,7 +373,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster1_etm1_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port1>;
@@ -386,7 +387,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm4: etm@23240000 {
@@ -395,7 +396,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster1_etm2_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port2>;
@@ -409,7 +410,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
};
etm5: etm@23340000 {
@@ -418,7 +419,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
port {
cluster1_etm3_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port3>;
@@ -432,7 +433,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
@@ -471,14 +472,24 @@
#size-cells = <1>;
ranges = <0 0x0 0x2e000000 0x8000>;
- cpu_scp_lpri: scp-shmem@0 {
+ cpu_scp_lpri0: scp-shmem@0 {
compatible = "arm,juno-scp-shmem";
- reg = <0x0 0x200>;
+ reg = <0x0 0x80>;
};
- cpu_scp_hpri: scp-shmem@200 {
+ cpu_scp_lpri1: scp-shmem@80 {
compatible = "arm,juno-scp-shmem";
- reg = <0x200 0x200>;
+ reg = <0x80 0x80>;
+ };
+
+ cpu_scp_hpri0: scp-shmem@100 {
+ compatible = "arm,juno-scp-shmem";
+ reg = <0x100 0x80>;
+ };
+
+ cpu_scp_hpri1: scp-shmem@180 {
+ compatible = "arm,juno-scp-shmem";
+ reg = <0x180 0x80>;
};
};
@@ -506,37 +517,37 @@
iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
};
- scpi {
- compatible = "arm,scpi";
- mboxes = <&mailbox 1>;
- shmem = <&cpu_scp_hpri>;
+ firmware {
+ scmi {
+ compatible = "arm,scmi";
+ mbox-names = "tx", "rx";
+ mboxes = <&mailbox 0 0 &mailbox 0 1>;
+ shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- clocks {
- compatible = "arm,scpi-clocks";
+ scmi_devpd: protocol@11 {
+ reg = <0x11>;
+ #power-domain-cells = <1>;
+ };
- scpi_dvfs: scpi-dvfs {
- compatible = "arm,scpi-dvfs-clocks";
+ scmi_dvfs: protocol@13 {
+ reg = <0x13>;
#clock-cells = <1>;
- clock-indices = <0>, <1>, <2>;
- clock-output-names = "atlclk", "aplclk","gpuclk";
+ mbox-names = "tx", "rx";
+ mboxes = <&mailbox 1 0 &mailbox 1 1>;
+ shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>;
};
- scpi_clk: scpi-clk {
- compatible = "arm,scpi-variable-clocks";
+
+ scmi_clk: protocol@14 {
+ reg = <0x14>;
#clock-cells = <1>;
- clock-indices = <3>;
- clock-output-names = "pxlclk";
};
- };
- scpi_devpd: scpi-power-domains {
- compatible = "arm,scpi-power-domains";
- num-domains = <2>;
- #power-domain-cells = <1>;
- };
-
- scpi_sensors0: sensors {
- compatible = "arm,scpi-sensors";
- #thermal-sensor-cells = <1>;
+ scmi_sensors0: protocol@15 {
+ reg = <0x15>;
+ #thermal-sensor-cells = <1>;
+ };
};
};
@@ -544,14 +555,14 @@
pmic {
polling-delay = <1000>;
polling-delay-passive = <100>;
- thermal-sensors = <&scpi_sensors0 0>;
+ thermal-sensors = <&scmi_sensors0 0>;
};
soc {
polling-delay = <1000>;
polling-delay-passive = <100>;
sustainable-power = <2500>;
- thermal-sensors = <&scpi_sensors0 3>;
+ thermal-sensors = <&scmi_sensors0 3>;
trips {
threshold: threshold {
@@ -582,28 +593,28 @@
big_cluster_thermal_zone: big_cluster {
polling-delay = <1000>;
polling-delay-passive = <100>;
- thermal-sensors = <&scpi_sensors0 21>;
+ thermal-sensors = <&scmi_sensors0 21>;
status = "disabled";
};
little_cluster_thermal_zone: little_cluster {
polling-delay = <1000>;
polling-delay-passive = <100>;
- thermal-sensors = <&scpi_sensors0 22>;
+ thermal-sensors = <&scmi_sensors0 22>;
status = "disabled";
};
gpu0_thermal_zone: gpu0 {
polling-delay = <1000>;
polling-delay-passive = <100>;
- thermal-sensors = <&scpi_sensors0 23>;
+ thermal-sensors = <&scmi_sensors0 23>;
status = "disabled";
};
gpu1_thermal_zone: gpu1 {
polling-delay = <1000>;
polling-delay-passive = <100>;
- thermal-sensors = <&scpi_sensors0 24>;
+ thermal-sensors = <&scmi_sensors0 24>;
status = "disabled";
};
};
@@ -680,7 +691,7 @@
reg = <0 0x7ff50000 0 0x1000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&smmu_hdlcd1 0>;
- clocks = <&scpi_clk 3>;
+ clocks = <&scmi_clk 3>;
clock-names = "pxlclk";
port {
@@ -695,7 +706,7 @@
reg = <0 0x7ff60000 0 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&smmu_hdlcd0 0>;
- clocks = <&scpi_clk 3>;
+ clocks = <&scmi_clk 3>;
clock-names = "pxlclk";
port {
diff --git a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
index 0c43fb3525eb..21287f2d75d3 100644
--- a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
@@ -6,7 +6,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -36,7 +36,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -66,7 +66,7 @@
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
- power-domains = <&scpi_devpd 0>;
+ power-domains = <&scmi_devpd 8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 0222ddb99718..8f8df14e5a0d 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -97,7 +97,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A57_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
@@ -116,7 +116,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A57_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <1024>;
#cooling-cells = <2>;
@@ -135,7 +135,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <578>;
#cooling-cells = <2>;
@@ -154,7 +154,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <578>;
#cooling-cells = <2>;
@@ -173,7 +173,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <578>;
#cooling-cells = <2>;
@@ -192,7 +192,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <578>;
#cooling-cells = <2>;
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index 805ea5c85311..e18aee7dfb44 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -97,7 +97,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A72_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
capacity-dmips-mhz = <1024>;
@@ -117,7 +117,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A72_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
capacity-dmips-mhz = <1024>;
@@ -137,7 +137,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53R2 &CLUSTER_COST_A53R2>;
capacity-dmips-mhz = <485>;
@@ -157,7 +157,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53R2 &CLUSTER_COST_A53R2>;
capacity-dmips-mhz = <485>;
@@ -177,7 +177,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53R2 &CLUSTER_COST_A53R2>;
capacity-dmips-mhz = <485>;
@@ -197,7 +197,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53R2 &CLUSTER_COST_A53R2>;
capacity-dmips-mhz = <485>;
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 10f222279216..d4eb475fe362 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -96,7 +96,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A57_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A57 &CLUSTER_COST_A57>;
capacity-dmips-mhz = <1024>;
@@ -116,7 +116,7 @@
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A57_L2>;
- clocks = <&scpi_dvfs 0>;
+ clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A57 &CLUSTER_COST_A57>;
capacity-dmips-mhz = <1024>;
@@ -136,7 +136,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
capacity-dmips-mhz = <578>;
@@ -156,7 +156,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
capacity-dmips-mhz = <578>;
@@ -176,7 +176,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
capacity-dmips-mhz = <578>;
@@ -196,7 +196,7 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
- clocks = <&scpi_dvfs 1>;
+ clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
capacity-dmips-mhz = <578>;