arm64: dts: juno: add mhu doorbell support and scmi device nodes

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

5 files changed, 91 insertions, 80 deletions

diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 7446e0dc154d..f84e6ba3c1bb 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -24,13 +24,14 @@
 	};
 
 	mailbox: mhu@2b1f0000 {
-		compatible = "arm,mhu", "arm,primecell";
+		compatible = "arm,mhu-doorbell", "arm,primecell";
 		reg = <0x0 0x2b1f0000 0x0 0x1000>;
 		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "mhu_lpri_rx",
 				  "mhu_hpri_rx";
-		#mbox-cells = <1>;
+		#mbox-cells = <2>;
+		mbox-name = "ARM-MHU";
 		clocks = <&soc_refclk100mhz>;
 		clock-names = "apb_pclk";
 	};
@@ -54,7 +55,7 @@
 		#iommu-cells = <1>;
 		#global-interrupts = <1>;
 		dma-coherent;
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	gic: interrupt-controller@2c010000 {
@@ -114,7 +115,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 
 		in-ports {
 			port {
@@ -138,7 +139,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		in-ports {
 			port {
 				tpiu_in_port: endpoint {
@@ -155,7 +156,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 
 		out-ports {
 			port {
@@ -192,7 +193,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		arm,scatter-gather;
 		in-ports {
 			port {
@@ -211,7 +212,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				stm_out_port: endpoint {
@@ -226,7 +227,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 
 		out-ports {
 			#address-cells = <1>;
@@ -261,7 +262,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm0: etm@22040000 {
@@ -270,7 +271,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster0_etm0_out_port: endpoint {
@@ -286,7 +287,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster0_funnel_out_port: endpoint {
@@ -321,7 +322,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm1: etm@22140000 {
@@ -330,7 +331,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster0_etm1_out_port: endpoint {
@@ -346,7 +347,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm2: etm@23040000 {
@@ -355,7 +356,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster1_etm0_out_port: endpoint {
@@ -371,7 +372,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster1_funnel_out_port: endpoint {
@@ -418,7 +419,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm3: etm@23140000 {
@@ -427,7 +428,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster1_etm1_out_port: endpoint {
@@ -443,7 +444,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm4: etm@23240000 {
@@ -452,7 +453,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster1_etm2_out_port: endpoint {
@@ -468,7 +469,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 	};
 
 	etm5: etm@23340000 {
@@ -477,7 +478,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				cluster1_etm3_out_port: endpoint {
@@ -495,14 +496,24 @@
 		#size-cells = <1>;
 		ranges = <0 0x0 0x2e000000 0x8000>;
 
-		cpu_scp_lpri: scp-shmem@0 {
+		cpu_scp_lpri0: scp-shmem@0 {
 			compatible = "arm,juno-scp-shmem";
-			reg = <0x0 0x200>;
+			reg = <0x0 0x80>;
 		};
 
-		cpu_scp_hpri: scp-shmem@200 {
+		cpu_scp_lpri1: scp-shmem@80 {
 			compatible = "arm,juno-scp-shmem";
-			reg = <0x200 0x200>;
+			reg = <0x80 0x80>;
+		};
+
+		cpu_scp_hpri0: scp-shmem@100 {
+			compatible = "arm,juno-scp-shmem";
+			reg = <0x100 0x80>;
+		};
+
+		cpu_scp_hpri1: scp-shmem@180 {
+			compatible = "arm,juno-scp-shmem";
+			reg = <0x180 0x80>;
 		};
 	};
 
@@ -530,37 +541,37 @@
 		iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
 	};
 
-	scpi {
-		compatible = "arm,scpi";
-		mboxes = <&mailbox 1>;
-		shmem = <&cpu_scp_hpri>;
+	firmware {
+		scmi {
+			compatible = "arm,scmi";
+			mbox-names = "tx", "rx";
+			mboxes = <&mailbox 0 0 &mailbox 0 1>;
+			shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 
-		clocks {
-			compatible = "arm,scpi-clocks";
+			scmi_devpd: protocol@11 {
+				reg = <0x11>;
+				#power-domain-cells = <1>;
+			};
 
-			scpi_dvfs: scpi-dvfs {
-				compatible = "arm,scpi-dvfs-clocks";
+			scmi_dvfs: protocol@13 {
+				reg = <0x13>;
 				#clock-cells = <1>;
-				clock-indices = <0>, <1>, <2>;
-				clock-output-names = "atlclk", "aplclk","gpuclk";
+				mbox-names = "tx", "rx";
+				mboxes = <&mailbox 1 0 &mailbox 1 1>;
+				shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>;
 			};
-			scpi_clk: scpi-clk {
-				compatible = "arm,scpi-variable-clocks";
+
+			scmi_clk: protocol@14 {
+				reg = <0x14>;
 				#clock-cells = <1>;
-				clock-indices = <3>;
-				clock-output-names = "pxlclk";
 			};
-		};
 
-		scpi_devpd: scpi-power-domains {
-			compatible = "arm,scpi-power-domains";
-			num-domains = <2>;
-			#power-domain-cells = <1>;
-		};
-
-		scpi_sensors0: sensors {
-			compatible = "arm,scpi-sensors";
-			#thermal-sensor-cells = <1>;
+			scmi_sensors0: protocol@15 {
+				reg = <0x15>;
+				#thermal-sensor-cells = <1>;
+			};
 		};
 	};
 
@@ -568,40 +579,40 @@
 		pmic {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 0>;
+			thermal-sensors = <&scmi_sensors0 0>;
 		};
 
 		soc {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 3>;
+			thermal-sensors = <&scmi_sensors0 3>;
 		};
 
 		big_cluster_thermal_zone: big-cluster {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 21>;
+			thermal-sensors = <&scmi_sensors0 21>;
 			status = "disabled";
 		};
 
 		little_cluster_thermal_zone: little-cluster {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 22>;
+			thermal-sensors = <&scmi_sensors0 22>;
 			status = "disabled";
 		};
 
 		gpu0_thermal_zone: gpu0 {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 23>;
+			thermal-sensors = <&scmi_sensors0 23>;
 			status = "disabled";
 		};
 
 		gpu1_thermal_zone: gpu1 {
 			polling-delay = <1000>;
 			polling-delay-passive = <100>;
-			thermal-sensors = <&scpi_sensors0 24>;
+			thermal-sensors = <&scmi_sensors0 24>;
 			status = "disabled";
 		};
 	};
@@ -678,7 +689,7 @@
 		reg = <0 0x7ff50000 0 0x1000>;
 		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 		iommus = <&smmu_hdlcd1 0>;
-		clocks = <&scpi_clk 3>;
+		clocks = <&scmi_clk 3>;
 		clock-names = "pxlclk";
 
 		port {
@@ -693,7 +704,7 @@
 		reg = <0 0x7ff60000 0 0x1000>;
 		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 		iommus = <&smmu_hdlcd0 0>;
-		clocks = <&scpi_clk 3>;
+		clocks = <&scmi_clk 3>;
 		clock-names = "pxlclk";
 
 		port {
diff --git a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
index cf285152deab..6f9afcf96bc1 100644
--- a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
@@ -6,7 +6,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				csys1_funnel_out_port: endpoint {
@@ -29,7 +29,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		in-ports {
 			port {
 				etf1_in_port: endpoint {
@@ -52,7 +52,7 @@
 
 		clocks = <&soc_smc50mhz>;
 		clock-names = "apb_pclk";
-		power-domains = <&scpi_devpd 0>;
+		power-domains = <&scmi_devpd 8>;
 		out-ports {
 			port {
 				csys2_funnel_out_port: endpoint {
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 5f290090b0cf..89c2f86890b2 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -96,7 +96,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A57_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 		};
@@ -113,7 +113,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A57_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 		};
@@ -130,7 +130,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 		};
@@ -147,7 +147,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 		};
@@ -164,7 +164,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 		};
@@ -181,7 +181,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 		};
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index 305300dd521c..b1c304ce0181 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -96,7 +96,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A72_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <450>;
@@ -114,7 +114,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A72_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <450>;
@@ -132,7 +132,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
@@ -150,7 +150,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
@@ -168,7 +168,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
@@ -186,7 +186,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index f00cffbd032c..a28316c65c1b 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -95,7 +95,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A57_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <530>;
@@ -113,7 +113,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <256>;
 			next-level-cache = <&A57_L2>;
-			clocks = <&scpi_dvfs 0>;
+			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <530>;
@@ -131,7 +131,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
@@ -149,7 +149,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
@@ -167,7 +167,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
@@ -185,7 +185,7 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&A53_L2>;
-			clocks = <&scpi_dvfs 1>;
+			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;