diff options
| author | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-11 14:19:07 +0530 |
|---|---|---|
| committer | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-30 14:07:39 +0530 |
| commit | 5f830cb0d7745bbdd05dbf1c97f06d3e96a0cb1c (patch) | |
| tree | a8421bd1877fec8148539bd0359d8559f1867ea9 | |
| parent | c524e8d7bb9aac6f148b72f6f090c3e4b9150722 (diff) | |
arm64: dts: enable smmu for ARMv8-A Base Platform FVP
Signed-off-by: Arvind Chauhan <arvind.chauhan@arm.com>
| -rw-r--r-- | arch/arm64/boot/dts/arm/fvp-base-aemv8a-aemv8a.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/arm/fvp-base-aemv8a-aemv8a.dtsi b/arch/arm64/boot/dts/arm/fvp-base-aemv8a-aemv8a.dtsi index 13608d82982c..5b8afb57508a 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-aemv8a-aemv8a.dtsi +++ b/arch/arm64/boot/dts/arm/fvp-base-aemv8a-aemv8a.dtsi @@ -217,6 +217,38 @@ }; }; + pci: pci@40000000 { + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + bus-range = <0x0 0x1>; + reg = <0x0 0x40000000 0x0 0x10000000>; + ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>; + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0xa8 0x4>, + <0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0xa9 0x4>, + <0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 0xaa 0x4>, + <0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 0xab 0x4>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + msi-parent = <&its>; + msi-map = <0x0 &its 0x0 0x10000>; + iommu-map = <0x0 &smmu 0x0 0x10000>; + + dma-coherent; + ats-supported; + }; + + smmu: smmu@2b400000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x2b400000 0x0 0x20000>; + interrupts = <0 74 1>, <0 75 1>, <0 77 1>, <0 79 1>; + interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; + dma-coherent; + #iommu-cells = <1>; + msi-parent = <&its 0x10000>; + }; + #include "fvp-base.dtsi" }; |