diff options
| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2017-05-19 12:25:57 +0800 |
|---|---|---|
| committer | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-10 16:37:25 +0530 |
| commit | 7984e83cb3e4138961bd8205541d9727b06879d6 (patch) | |
| tree | 64d2c5b994b52d67ded78278e383de8fb748bb55 | |
| parent | 8316882e3bd6a8ee9ecee67d38abc4ef601688a8 (diff) | |
arm64: dts: juno: add coresight CPU debug nodes
Add Coresight CPU debug nodes for Juno r0, r1 & r2. The CPU
debug areas are mapped at the same address for all revisions,
like the ETM, even though the CPUs have changed from r1 to r2.
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mathieu Poirier <mathieu.porier@linaro.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[arranged nodes in ascending order with respect to register addresses]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
| -rw-r--r-- | arch/arm64/boot/dts/arm/juno-base.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index 5a53b6239b03..4b898164ab74 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -221,7 +221,7 @@ }; }; - cpu_debug0: cpu-debug@22010000 { + cpu_debug0: cpu_debug@22010000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x22010000 0x0 0x1000>; @@ -280,7 +280,7 @@ }; }; - cpu_debug1: cpu-debug@22110000 { + cpu_debug1: cpu_debug@22110000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x22110000 0x0 0x1000>; @@ -303,7 +303,7 @@ }; }; - cpu_debug2: cpu-debug@23010000 { + cpu_debug2: cpu_debug@23010000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x23010000 0x0 0x1000>; @@ -376,7 +376,7 @@ }; }; - cpu_debug3: cpu-debug@23110000 { + cpu_debug3: cpu_debug@23110000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x23110000 0x0 0x1000>; @@ -399,7 +399,7 @@ }; }; - cpu_debug4: cpu-debug@23210000 { + cpu_debug4: cpu_debug@23210000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x23210000 0x0 0x1000>; @@ -422,7 +422,7 @@ }; }; - cpu_debug5: cpu-debug@23310000 { + cpu_debug5: cpu_debug@23310000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x0 0x23310000 0x0 0x1000>; |