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authorJon Medhurst <tixy@linaro.org>2016-05-16 11:20:39 +0100
committerAmit Daniel Kachhap <amit.kachhap@arm.com>2018-07-10 16:14:32 +0530
commitf08fb87e5e74b9d9e76724d77f816542ebb3aca7 (patch)
treed3af79f33a953db5a92d1ebdedd49e166085ae4a
parent5882fa5d9f49273bbb43e0d9be00990ed02d9a90 (diff)
arm64: dts: Use PSCI enable-method for Foundation model CPUs
ARM Platform Release's are intended to work with ARM Trusted Firmware which implements PSCI. Signed-off-by: Jon Medhurst <tixy@linaro.org>
-rw-r--r--arch/arm64/boot/dts/arm/foundation-v8.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index e080277d27ae..93f20d2e844f 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -25,6 +25,11 @@
serial3 = &v2m_serial3;
};
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -33,24 +38,28 @@
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};