ARM: dts: Wire up HDLCD on vexpress

The HDLCD DRM driver won't work without these.

Also disable the motherboard CLCD device because we can only have one
active display on vexpress and we want that to be the fast, high-res,
HDLCD on the CoreTiles, not the slow CLCD on the motherboard.

Signed-off-by: Jon Medhurst <tixy@linaro.org>

4 files changed, 94 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 2efb2058ba49..a1deadaf8a25 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -220,6 +220,9 @@
 				dvi-transmitter@39 {
 					compatible = "sil,sii9022-tpi", "sil,sii9022";
 					reg = <0x39>;
+
+					v2m_dvi_port: port {
+					};
 				};
 
 				dvi-transmitter@60 {
@@ -243,7 +246,7 @@
 				reg-shift = <2>;
 			};
 
-			clcd@1f0000 {
+			v2m_clcd: clcd@1f0000 {
 				compatible = "arm,pl111", "arm,primecell";
 				reg = <0x1f0000 0x1000>;
 				interrupt-names = "combined";
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index 9420053acc14..d4331294741b 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -57,6 +57,22 @@
 		interrupts = <0 85 4>;
 		clocks = <&oscclk5>;
 		clock-names = "pxlclk";
+
+		port {
+			hdlcd0_output: endpoint@0 {
+				remote-endpoint = <&sii9022_0_input>;
+			};
+		};
+	};
+
+	hdmi0: connector@0 {
+		compatible = "hdmi-connector";
+		type = "a";
+		port {
+			hdmi0_connector_output: endpoint {
+				remote-endpoint = <&sii9022_0_output>;
+			};
+		};
 	};
 
 	memory-controller@2b0a0000 {
@@ -281,3 +297,17 @@
 		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 };
+
+&v2m_clcd {
+	status = "disabled";
+};
+
+&v2m_dvi_port {
+	sii9022_0_input: endpoint@0 {
+		remote-endpoint = <&hdlcd0_output>;
+	};
+
+	sii9022_0_output: endpoint@1 {
+		remote-endpoint = <&hdmi0_connector_output>;
+	};
+};
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 322fd1519b09..0775befbdf5a 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -111,6 +111,22 @@
 		interrupts = <0 85 4>;
 		clocks = <&oscclk5>;
 		clock-names = "pxlclk";
+
+		port {
+			hdlcd0_output: endpoint@0 {
+				remote-endpoint = <&sii9022_0_input>;
+			};
+		};
+	};
+
+	hdmi0: connector@0 {
+		compatible = "hdmi-connector";
+		type = "a";
+		port {
+			hdmi0_connector_output: endpoint {
+				remote-endpoint = <&sii9022_0_output>;
+			};
+		};
 	};
 
 	memory-controller@2b0a0000 {
@@ -419,3 +435,17 @@
 		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 };
+
+&v2m_clcd {
+	status = "disabled";
+};
+
+&v2m_dvi_port {
+	sii9022_0_input: endpoint@0 {
+		remote-endpoint = <&hdlcd0_output>;
+	};
+
+	sii9022_0_output: endpoint@1 {
+		remote-endpoint = <&hdmi0_connector_output>;
+	};
+};
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index d2709b73316b..83815ee3dda5 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -59,6 +59,22 @@
 		interrupts = <0 85 4>;
 		clocks = <&oscclk3>;
 		clock-names = "pxlclk";
+
+		port {
+			hdlcd0_output: endpoint@0 {
+				remote-endpoint = <&sii9022_0_input>;
+			};
+		};
+	};
+
+	hdmi0: connector@0 {
+		compatible = "hdmi-connector";
+		type = "a";
+		port {
+			hdmi0_connector_output: endpoint {
+				remote-endpoint = <&sii9022_0_output>;
+			};
+		};
 	};
 
 	memory-controller@2a150000 {
@@ -251,3 +267,17 @@
 		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 };
+
+&v2m_clcd {
+	status = "disabled";
+};
+
+&v2m_dvi_port {
+	sii9022_0_input: endpoint@0 {
+		remote-endpoint = <&hdlcd0_output>;
+	};
+
+	sii9022_0_output: endpoint@1 {
+		remote-endpoint = <&hdmi0_connector_output>;
+	};
+};