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| author | Vishnu Banavath <vishnu.banavath@arm.com> | 2019-10-14 15:15:46 +0100 |
|---|---|---|
| committer | Rui Miguel Silva <rui.silva@linaro.org> | 2020-05-21 20:22:30 +0100 |
| commit | e5d99c1524576eb47c13e08d4dd20ebc72491477 (patch) | |
| tree | 968a464c932b93bc165b07fb3006492b156069e4 | |
| parent | dbf2cd8967b6e2c47084e52aae8a15a669614cb1 (diff) | |
corstone700_defconfig: use DDR address instead of shared RAM
On fpga we use DDR for kernel data, dtb and rootfs.
This change is to update CONFIG_PHYS_ADDR to 0x80000000
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
| -rw-r--r-- | arch/arm/configs/corstone700_defconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/configs/corstone700_defconfig b/arch/arm/configs/corstone700_defconfig index 61a0a3c3a209..add9f5673395 100644 --- a/arch/arm/configs/corstone700_defconfig +++ b/arch/arm/configs/corstone700_defconfig @@ -21,7 +21,7 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_ARCH_TINY_VEXPRESS=y CONFIG_ARM_SINGLE_ARMV7A=y #CONFIG_DRAM_BASE=0x02100000 -CONFIG_PHYS_OFFSET=0x02100000 +CONFIG_PHYS_OFFSET=0x80000000 CONFIG_FLASH_MEM_BASE=0x08000000 CONFIG_FLASH_SIZE=0x4000000 CONFIG_XIP_KERNEL=y |