diff options
| author | Jon Medhurst <tixy@linaro.org> | 2016-10-25 17:32:23 +0100 |
|---|---|---|
| committer | Arvind Chauhan <arvind.chauhan@arm.com> | 2017-10-11 14:38:01 +0530 |
| commit | da89e2616fafb45161f4c8b3c9077809430173ba (patch) | |
| tree | 2017e5c10689ac377c8f58a98ece3731156daabf /arch | |
| parent | 6a3caec2d03ebb61bd6c9df1d3a0d88eb815a651 (diff) | |
arm64: dts: Add CPU idle state for Foundation model
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/arm/foundation-v8.dtsi | 54 |
1 files changed, 50 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi index c362ef71d493..7f536637d4ce 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi @@ -33,32 +33,78 @@ #address-cells = <2>; #size-cells = <0>; - cpu@0 { + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + }; + }; + + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <300>; + exit-latency-us = <1200>; + min-residency-us = <2000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <1200>; + min-residency-us = <2500>; + }; + }; + + CPU0:cpu@0 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; next-level-cache = <&L2_0>; }; - cpu@1 { + + CPU1:cpu@1 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; next-level-cache = <&L2_0>; }; - cpu@2 { + + CPU2:cpu@2 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; next-level-cache = <&L2_0>; }; - cpu@3 { + + CPU3:cpu@3 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; next-level-cache = <&L2_0>; }; |