From 1d97b1f3c4f335f64fd0cecf4cbd100534e3ac33 Mon Sep 17 00:00:00 2001 From: Arvind Chauhan Date: Sun, 8 Oct 2017 15:19:58 +0530 Subject: mali: add support for juno_soc platform juno_soc platform support based on TX041-SW-99002-r15p0-00rel0.tgz downloaded from developer.arm.com Signed-off-by: Arvind Chauhan --- drivers/gpu/arm/midgard/platform/juno_soc/Kbuild | 22 +++ .../arm/midgard/platform/juno_soc/juno_mali_opp.c | 87 ++++++++++++ .../platform/juno_soc/mali_kbase_config_juno_soc.c | 156 +++++++++++++++++++++ .../platform/juno_soc/mali_kbase_config_platform.h | 84 +++++++++++ 4 files changed, 349 insertions(+) create mode 100644 drivers/gpu/arm/midgard/platform/juno_soc/Kbuild create mode 100644 drivers/gpu/arm/midgard/platform/juno_soc/juno_mali_opp.c create mode 100644 drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_juno_soc.c create mode 100644 drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_platform.h diff --git a/drivers/gpu/arm/midgard/platform/juno_soc/Kbuild b/drivers/gpu/arm/midgard/platform/juno_soc/Kbuild new file mode 100644 index 000000000000..512214c85068 --- /dev/null +++ b/drivers/gpu/arm/midgard/platform/juno_soc/Kbuild @@ -0,0 +1,22 @@ +# +# (C) COPYRIGHT 2013-2014 ARM Limited. All rights reserved. +# +# This program is free software and is provided to you under the terms of the +# GNU General Public License version 2 as published by the Free Software +# Foundation, and any use by you of this program is subject to the terms +# of such GNU licence. +# +# A copy of the licence is included with the program, and can also be obtained +# from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, +# Boston, MA 02110-1301, USA. +# +# + + +ifeq ($(CONFIG_MALI_MIDGARD),m) +SRC += $(MALI_PLATFORM_THIRDPARTY_DIR)/mali_kbase_config_juno_soc.c +obj-m += $(MALI_PLATFORM_THIRDPARTY_DIR)/juno_mali_opp.o +else +obj-y += mali_kbase_config_juno_soc.o +obj-y += juno_mali_opp.o +endif diff --git a/drivers/gpu/arm/midgard/platform/juno_soc/juno_mali_opp.c b/drivers/gpu/arm/midgard/platform/juno_soc/juno_mali_opp.c new file mode 100644 index 000000000000..c33c84f0d259 --- /dev/null +++ b/drivers/gpu/arm/midgard/platform/juno_soc/juno_mali_opp.c @@ -0,0 +1,87 @@ +/* + * + * (C) COPYRIGHT 2014 ARM Limited. All rights reserved. + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms + * of such GNU licence. + * + * A copy of the licence is included with the program, and can also be obtained + * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + * + */ + + + +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) +#include +#else /* Linux >= 3.13 */ +/* In 3.13 the OPP include header file, types, and functions were all + * renamed. Use the old filename for the include, and define the new names to + * the old, when an old kernel is detected. + */ +#include +#define dev_pm_opp_add opp_add +#endif /* Linux >= 3.13 */ + + +#include + +static int init_juno_opps_from_scpi(struct device *dev) +{ + struct scpi_ops *scpi; + struct scpi_dvfs_info *info; + int i; + + scpi = get_scpi_ops(); + if (!scpi) + return 0; /* Really need to defer until scpi available */ + + /* Hard coded for Juno. 2 is GPU domain */ + info = scpi->dvfs_get_info(2); + if (IS_ERR_OR_NULL(info)) + return PTR_ERR(info); + + for (i = 0; i < info->count; i++) { + struct scpi_opp *e = &info->opps[i]; + dev_info(dev, "Mali OPP from SCPI: %u Hz @ %u mV\n", + e->freq, e->m_volt); + + dev_pm_opp_add(dev, e->freq, e->m_volt * 1000); + } + + return 0; +} + +int setup_opps(void) +{ + struct device_node *np; + struct platform_device *pdev; + int err; + + np = of_find_node_by_name(NULL, "gpu"); + if (!np) { + pr_err("Failed to find DT entry for Mali\n"); + return -EFAULT; + } + + pdev = of_find_device_by_node(np); + if (!pdev) { + pr_err("Failed to find device for Mali\n"); + of_node_put(np); + return -EFAULT; + } + + err = init_juno_opps_from_scpi(&pdev->dev); + + of_node_put(np); + + return err; +} diff --git a/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_juno_soc.c b/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_juno_soc.c new file mode 100644 index 000000000000..c65481810927 --- /dev/null +++ b/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_juno_soc.c @@ -0,0 +1,156 @@ +/* + * + * (C) COPYRIGHT 2011-2016 ARM Limited. All rights reserved. + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms + * of such GNU licence. + * + * A copy of the licence is included with the program, and can also be obtained + * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + * + */ + + + +#include +#include +#include +#include +#include +#include + +/* Versatile Express (VE) Juno Development Platform */ + +#define HARD_RESET_AT_POWER_OFF 0 + +#ifndef CONFIG_OF +static struct kbase_io_resources io_resources = { + .job_irq_number = 65, + .mmu_irq_number = 66, + .gpu_irq_number = 64, + .io_memory_region = { + .start = 0x2D000000, + .end = 0x2D000000 + (4096 * 4) - 1} +}; +#endif + +static int pm_callback_power_on(struct kbase_device *kbdev) +{ + /* Nothing is needed on VExpress, but we may have destroyed GPU state (if the below HARD_RESET code is active) */ + return 1; +} + +static void pm_callback_power_off(struct kbase_device *kbdev) +{ +#if HARD_RESET_AT_POWER_OFF + /* Cause a GPU hard reset to test whether we have actually idled the GPU + * and that we properly reconfigure the GPU on power up. + * Usually this would be dangerous, but if the GPU is working correctly it should + * be completely safe as the GPU should not be active at this point. + * However this is disabled normally because it will most likely interfere with + * bus logging etc. + */ + KBASE_TRACE_ADD(kbdev, CORE_GPU_HARD_RESET, NULL, NULL, 0u, 0); + kbase_os_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), GPU_COMMAND_HARD_RESET); +#endif +} + +struct kbase_pm_callback_conf pm_callbacks = { + .power_on_callback = pm_callback_power_on, + .power_off_callback = pm_callback_power_off, + .power_suspend_callback = NULL, + .power_resume_callback = NULL +}; + +/* + * Juno Protected Mode integration + */ + +/* SMC Function Numbers */ +#define JUNO_SMC_PROTECTED_ENTER_FUNC 0xff06 +#define JUNO_SMC_PROTECTED_RESET_FUNC 0xff07 + +static int juno_protected_mode_enter(struct kbase_device *kbdev) +{ + /* T62X in SoC detected */ + u64 ret = kbase_invoke_smc(SMC_OEN_SIP, + JUNO_SMC_PROTECTED_ENTER_FUNC, false, + 0, 0, 0); + return ret; +} + +/* TODO: Remove these externs, reset should should be done by the firmware */ +extern void kbase_reg_write(struct kbase_device *kbdev, u16 offset, u32 value, + struct kbase_context *kctx); + +extern u32 kbase_reg_read(struct kbase_device *kbdev, u16 offset, + struct kbase_context *kctx); + +static int juno_protected_mode_reset(struct kbase_device *kbdev) +{ + + /* T62X in SoC detected */ + u64 ret = kbase_invoke_smc(SMC_OEN_SIP, + JUNO_SMC_PROTECTED_RESET_FUNC, false, + 0, 0, 0); + + /* TODO: Remove this reset, it should be done by the firmware */ + kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), + GPU_COMMAND_HARD_RESET, NULL); + + while ((kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL) + & RESET_COMPLETED) != RESET_COMPLETED) + ; + + return ret; +} + +static bool juno_protected_mode_supported(struct kbase_device *kbdev) +{ + u32 gpu_id = kbdev->gpu_props.props.raw_props.gpu_id; + + /* + * Protected mode is only supported for the built in GPU + * _and_ only if the right firmware is running. + * + * Given that at init time the GPU is not powered up the + * juno_protected_mode_reset function can't be used as + * is needs to access GPU registers. + * However, although we don't want the GPU to boot into + * protected mode we know a GPU reset will be done after + * this function is called so although we set the GPU to + * protected mode it will exit protected mode before the + * driver is ready to run work. + */ + if (gpu_id == GPU_ID_MAKE(GPU_ID_PI_T62X, 0, 1, 0) && + (kbdev->reg_start == 0x2d000000)) + return juno_protected_mode_enter(kbdev) == 0; + + return false; +} + +struct kbase_protected_ops juno_protected_ops = { + .protected_mode_enter = juno_protected_mode_enter, + .protected_mode_reset = juno_protected_mode_reset, + .protected_mode_supported = juno_protected_mode_supported, +}; + +static struct kbase_platform_config versatile_platform_config = { +#ifndef CONFIG_OF + .io_resources = &io_resources +#endif +}; + +struct kbase_platform_config *kbase_get_platform_config(void) +{ + return &versatile_platform_config; +} + +int kbase_platform_early_init(void) +{ + /* Nothing needed at this stage */ + return 0; +} diff --git a/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_platform.h b/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_platform.h new file mode 100644 index 000000000000..ab29e9d9c0a6 --- /dev/null +++ b/drivers/gpu/arm/midgard/platform/juno_soc/mali_kbase_config_platform.h @@ -0,0 +1,84 @@ +/* + * + * (C) COPYRIGHT 2014-2016 ARM Limited. All rights reserved. + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms + * of such GNU licence. + * + * A copy of the licence is included with the program, and can also be obtained + * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + * + */ + + + +/** + * Maximum frequency GPU will be clocked at. Given in kHz. + * This must be specified as there is no default value. + * + * Attached value: number in kHz + * Default value: NA + */ +#define GPU_FREQ_KHZ_MAX 600000 +/** + * Minimum frequency GPU will be clocked at. Given in kHz. + * This must be specified as there is no default value. + * + * Attached value: number in kHz + * Default value: NA + */ +#define GPU_FREQ_KHZ_MIN 600000 + +/** + * CPU_SPEED_FUNC - A pointer to a function that calculates the CPU clock + * + * CPU clock speed of the platform is in MHz - see kbase_cpu_clk_speed_func + * for the function prototype. + * + * Attached value: A kbase_cpu_clk_speed_func. + * Default Value: NA + */ +#define CPU_SPEED_FUNC (&kbase_cpuprops_get_default_clock_speed) + +/** + * GPU_SPEED_FUNC - A pointer to a function that calculates the GPU clock + * + * GPU clock speed of the platform in MHz - see kbase_gpu_clk_speed_func + * for the function prototype. + * + * Attached value: A kbase_gpu_clk_speed_func. + * Default Value: NA + */ +#define GPU_SPEED_FUNC (NULL) + +/** + * Power management configuration + * + * Attached value: pointer to @ref kbase_pm_callback_conf + * Default value: See @ref kbase_pm_callback_conf + */ +#define POWER_MANAGEMENT_CALLBACKS (&pm_callbacks) + +/** + * Platform specific configuration functions + * + * Attached value: pointer to @ref kbase_platform_funcs_conf + * Default value: See @ref kbase_platform_funcs_conf + */ +#define PLATFORM_FUNCS (NULL) + +/** + * Protected mode switch + * + * Attached value: pointer to @ref kbase_protected_ops + */ +#define PROTECTED_CALLBACKS (&juno_protected_ops) + +extern struct kbase_pm_callback_conf pm_callbacks; +#ifdef CONFIG_DEVFREQ_THERMAL +extern struct devfreq_cooling_ops juno_model_ops; +#endif +extern struct kbase_protected_ops juno_protected_ops; -- cgit v1.2.3