diff options
| author | Andrew Jackson <Andrew.Jackson@arm.com> | 2014-08-05 12:59:54 +0100 |
|---|---|---|
| committer | Jon Medhurst <tixy@linaro.org> | 2015-06-30 10:12:36 +0100 |
| commit | dc941f26c83dc8b6c58e8ee7db3192bd654ea424 (patch) | |
| tree | 115c1c7a16c4cd5526063d0b43e13d64bc6de9de | |
| parent | 34d50b160b215624780ae72e6a617fcae997c708 (diff) | |
i2c: designware: prevent early stop on TX FIFO empty
If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
set to zero, allowing the TX FIFO to become empty causes a STOP
condition to be generated on the I2C bus. If the transmit FIFO
threshold is set too high, an erroneous STOP condition can be
generated on long transfers - particularly where the interrupt
latency is extended.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 80975bf405e8..6a661052f7e1 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -362,7 +362,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev) } /* Configure Tx/Rx FIFO threshold levels */ - dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL); + dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL); dw_writel(dev, 0, DW_IC_RX_TL); /* configure the i2c master */ |