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authorJon Medhurst <tixy@linaro.org>2016-05-16 11:20:39 +0100
committerJon Medhurst <tixy@linaro.org>2017-03-15 11:01:21 +0000
commit909dff9431dba3bfba0294c4cc866f202590b2bc (patch)
tree045a7435ebf37e52f20d0139448350dd0ddf55b2
parent3619872db67ecea8878042564e136db5e7b2129e (diff)
arm64: dts: Use PSCI enable-method for Foundation model CPUs
ARM Platform Release's are intended to work with ARM Trusted Firmware which implements PSCI. Signed-off-by: Jon Medhurst <tixy@linaro.org>
-rw-r--r--arch/arm64/boot/dts/arm/foundation-v8.dtsi17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 7cfa8e414e7f..c362ef71d493 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -24,6 +24,11 @@
serial3 = &v2m_serial3;
};
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -32,32 +37,28 @@
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
+ enable-method = "psci";
next-level-cache = <&L2_0>;
};