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authorHaojian Zhuang <haojian.zhuang@linaro.org>2013-01-30 09:10:15 +0800
committerZhangfei Gao <zhangfei.gao@linaro.org>2013-08-13 14:33:09 +0800
commitdc90055a4f96b2a1cc03dd7bc39336562ebe713c (patch)
tree1df04d194318b5ff6a5ba40945d955ed0feb1b40
parentecc15813b4d246303e85e513699810bea31f9534 (diff)
ARM: dts: fix the mapping on l2 cache
The register mapping on L2 cache is wrong. So it results failure on enabling L2 cache. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-rw-r--r--arch/arm/boot/dts/hi3620.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index 00685310dcb4..37f047b3d995 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -70,7 +70,7 @@
l2: l2-cache {
compatible = "arm,pl310-cache";
- reg = <0xfc10000 0x100000>;
+ reg = <0xfc100000 0x100000>;
interrupts = <0 15 4>;
cache-unified;
cache-level = <2>;