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authorKefeng Wang <kefeng.wang@linaro.org>2014-06-27 15:23:52 +0800
committerKefeng Wang <kefeng.wang@linaro.org>2014-06-27 15:27:19 +0800
commit7712e05417b79e46d258febdde72afebff78b936 (patch)
tree4c1d5d7e1f182e329303e8a0946a7501d0078613
parent6891307b4c00cc1af27411b70046e19790bbdf5a (diff)
ARM: hip04: remove ARM_SMMU of hisi's Kconfig and only use 4 corehisi-non-secure-l3-test
In order to test hip04 in non-secure mode 1) with smmu and l3 2) with l3 remove select ARM_SMMU, you can choose it by manual. Only 4 core can bootup, if we enable more core, we will get error in of_property_read_u32 of hip04_mcpm_init, I don't know the reason. Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org>
-rw-r--r--arch/arm/configs/hip04_defconfig2
-rw-r--r--arch/arm/mach-hisi/Kconfig1
2 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/configs/hip04_defconfig b/arch/arm/configs/hip04_defconfig
index fa0fba4f5579..22f0be8788c4 100644
--- a/arch/arm/configs/hip04_defconfig
+++ b/arch/arm/configs/hip04_defconfig
@@ -13,7 +13,7 @@ CONFIG_ARCH_MULTI_V7_LPAE=y
CONFIG_ARCH_HISI=y
CONFIG_ARCH_HIP04=y
CONFIG_SMP=y
-CONFIG_NR_CPUS=16
+CONFIG_NR_CPUS=4
CONFIG_MCPM=y
CONFIG_MCPM_QUAD_CLUSTER=y
CONFIG_PREEMPT=y
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index 888e8be1923b..8cc04462927e 100644
--- a/arch/arm/mach-hisi/Kconfig
+++ b/arch/arm/mach-hisi/Kconfig
@@ -22,7 +22,6 @@ config ARCH_HI3xxx
config ARCH_HIP04
bool "Hisilicon HiP04 Cortex A15 family" if ARCH_MULTI_V7_LPAE
select ARM_ERRATA_798181 if SMP
- select ARM_SMMU
select OUTER_CACHE
select HAVE_ARM_ARCH_TIMER
select MCPM if SMP