ARM: hs: port dts from 3.9

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>

2 files changed, 1115 insertions, 169 deletions

diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index 8edada1e4fd5..20cc4def98fd 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -17,6 +17,62 @@
 		serial1 = &uart1;
 	};
 
+	osc32k: osc@0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "osc32khz";
+	};
+	osc26m: osc@1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <26000000>;
+		clock-output-names = "osc26mhz";
+	};
+	pclk: clk@0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <26000000>;
+		clock-output-names = "apb_pclk";
+	};
+	pll_arm0: clk@1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1600000000>;
+		clock-output-names = "armpll0";
+	};
+	pll_arm1: clk@2 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1600000000>;
+		clock-output-names = "armpll1";
+	};
+	pll_peri: clk@3 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1440000000>;
+		clock-output-names = "armpll2";
+	};
+	pll_usb: clk@4 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1440000000>;
+		clock-output-names = "armpll3";
+	};
+	pll_hdmi: clk@5 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1188000000>;
+		clock-output-names = "armpll4";
+	};
+	pll_gpu: clk@6 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <1300000000>;
+		clock-output-names = "armpll5";
+	};
+
+
 	amba {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -24,54 +80,916 @@
 		interrupt-parent = <&intc>;
 		ranges;
 
+		pmctrl: pmctrl@fca08000 {
+			compatible = "hisilicon,pmctrl";
+			reg = <0xfca08000 0x1000>;
+		};
+
+		pctrl: pctrl@fca09000 {
+			compatible = "hisilicon,pctrl";
+			reg = <0xfca09000 0x1000>;
+		};
+
+		secram: secram@f8000000 {
+			compatible = "hisilicon,secram";
+			reg = <0xf8000000 0x14000>;
+		};
+
+		ddrcfg: ddrcfg@fcd00000 {
+			compatible = "hisilicon,ddrcfg";
+			reg = <0xfcd00000 0x2000>;
+		};
+
+
 		sctrl: sctrl@fc802000 {
 			compatible = "hisilicon,sctrl";
 			reg = <0xfc802000 0x1000>;
 			smp_reg = <0x31c>;
 			resume_reg = <0x308>;
 			reboot_reg = <0x4>;
-		};
 
-		osc32k: osc@0 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <32768>;
-			clock-output-names = "osc32khz";
-		};
-
-		osc26m: osc@1 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <26000000>;
-			clock-output-names = "osc26mhz";
-		};
+			refclk_uart0: refclk@0 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &pclk>;
+				clock-output-names = "rclk_uart0";
+				/* reg_offset, enable_bits */
+				hisilicon,clkmux-reg = <0x100 0x80>;
+				hisilicon,clkmux-table = <0 0x80>;
+			};
+			refclk_uart1: refclk@1 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &pclk>;
+				clock-output-names = "rclk_uart1";
+				hisilicon,clkmux-reg = <0x100 0x100>;
+				hisilicon,clkmux-table = <0 0x100>;
+			};
+			refclk_uart2: refclk@2 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &pclk>;
+				clock-output-names = "rclk_uart2";
+				hisilicon,clkmux-reg = <0x100 0x200>;
+				hisilicon,clkmux-table = <0 0x200>;
+			};
+			refclk_uart3: refclk@3 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &pclk>;
+				clock-output-names = "rclk_uart3";
+				hisilicon,clkmux-reg = <0x100 0x400>;
+				hisilicon,clkmux-table = <0 0x400>;
+			};
+			refclk_uart4: refclk@4 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &pclk>;
+				clock-output-names = "rclk_uart4";
+				hisilicon,clkmux-reg = <0x100 0x800>;
+				hisilicon,clkmux-table = <0 0x800>;
+			};
 
-		pclk: clk@0 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <26000000>;
-			clock-output-names = "apb_pclk";
-		};
+			refclk_hsic: hsic {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_usb &pll_peri>;
+				clock-output-names = "rclk_hsic";
+				hisilicon,clkmux-reg = <0x130 0x4>;
+				hisilicon,clkmux-table = <0 0x4>;
+			};
 
-		timclk0: clk@1 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <60000000>;
-			clock-output-names = "timer0";
-		};
+			clk_osc480m: clk_osc480m {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_hsic>;
+				clock-output-names = "clk_osc480m";
+				hisilicon,clkdiv-table = <4 1>;
+				/* divider register offset, mask */
+				hisilicon,clkdiv = <0x130 0xf>;
+			};
+			refclk_cfgaxi: refclk@5 {
+				compatible = "hisilicon,clk-fixed-factor";
+				#clock-cells = <0>;
+				clocks = <&pll_peri>;
+				clock-output-names = "rclk_cfgaxi";
+				/*mult, div*/
+				hisilicon,fixed-factor = <1 30>;
+			};
+			refclk_spi0: refclk@6 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &refclk_cfgaxi>;
+				clock-output-names = "rclk_spi0";
+				hisilicon,clkmux-reg = <0x100 0x1000>;
+				hisilicon,clkmux-table = <0 0x1000>;
+			};
+			refclk_spi1: refclk@7 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &refclk_cfgaxi>;
+				clock-output-names = "rclk_spi1";
+				hisilicon,clkmux-reg = <0x100 0x2000>;
+				hisilicon,clkmux-table = <0 0x2000>;
+			};
+			refclk_spi2: refclk@8 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &refclk_cfgaxi>;
+				clock-output-names = "rclk_spi2";
+				hisilicon,clkmux-reg = <0x100 0x4000>;
+				hisilicon,clkmux-table = <0 0x4000>;
+			};
+			refclk_tcxo: refclk@11 {
+				compatible = "hisilicon,clk-fixed-factor";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "rclk_tcxo";
+				hisilicon,fixed-factor = <1 4>;
+			};
+			refclk_timer0: refclk@12 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk01>;
+				clock-output-names = "rclk_tim0";
+				hisilicon,clkmux-reg = <0 0x8000>;
+				hisilicon,clkmux-table = <0 0x8000>;
+			};
+			refclk_timer1: refclk@13 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk01>;
+				clock-output-names = "rclk_tim1";
+				hisilicon,clkmux-reg = <0 0x20000>;
+				hisilicon,clkmux-table = <0 0x20000>;
+			};
+			refclk_timer2: refclk@14 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk23>;
+				clock-output-names = "rclk_tim2";
+				hisilicon,clkmux-reg = <0 0x80000>;
+				hisilicon,clkmux-table = <0 0x80000>;
+			};
+			refclk_timer3: refclk@15 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk23>;
+				clock-output-names = "rclk_tim3";
+				hisilicon,clkmux-reg = <0 0x200000>;
+				hisilicon,clkmux-table = <0 0x200000>;
+			};
+			refclk_timer4: refclk@16 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk45>;
+				clock-output-names = "rclk_tim4";
+				hisilicon,clkmux-reg = <0x18 0x1>;
+				hisilicon,clkmux-table = <0 0x1>;
+			};
+			refclk_timer5: refclk@17 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk45>;
+				clock-output-names = "rclk_tim5";
+				hisilicon,clkmux-reg = <0x18 0x4>;
+				hisilicon,clkmux-table = <0 0x4>;
+			};
+			refclk_timer6: refclk@18 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk67>;
+				clock-output-names = "rclk_tim6";
+				hisilicon,clkmux-reg = <0x18 0x10>;
+				hisilicon,clkmux-table = <0 0x10>;
+			};
+			refclk_timer7: refclk@19 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &timerclk67>;
+				clock-output-names = "rclk_tim7";
+				hisilicon,clkmux-reg = <0x18 0x40>;
+				hisilicon,clkmux-table = <0 0x40>;
+			};
+			refclk_shareAXI: refclk@22 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_usb &pll_peri>;
+				clock-output-names = "rclk_shareAXI";
+				hisilicon,clkmux-reg = <0x24 0x8000>;
+				hisilicon,clkmux-table = <0 0x8000>;
+			};
+			refclk_mmc1: refclk@23 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_mmc1";
+				hisilicon,clkmux-reg = <0x108 0x200>;
+				hisilicon,clkmux-table = <0 0x200>;
+			};
+			refclk_mmc2: refclk@24 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_mmc2";
+				hisilicon,clkmux-reg = <0x140 0x10>;
+				hisilicon,clkmux-table = <0 0x10>;
+			};
+			refclk_mmc3: refclk@25 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_mmc3";
+				hisilicon,clkmux-reg = <0x140 0x200>;
+				hisilicon,clkmux-table = <0 0x200>;
+			};
+			refclk_sd: refclk@26 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_sd";
+				hisilicon,clkmux-reg = <0x108 0x10>;
+				hisilicon,clkmux-table = <0 0x10>;
+			};
+			refclk_mmc1_parent: refclk@27 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc26m &div_mmc1>;
+				clock-output-names = "rclk_mmc1_parent";
+				hisilicon,clkmux-reg = <0x108 0x400>;
+				hisilicon,clkmux-table = <0 0x400>;
+			};
+			refclk_venc: refclk@28 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_venc";
+				hisilicon,clkmux-reg = <0x10c 0x800>;
+				hisilicon,clkmux-table = <0 0x800>;
+			};
+			refclk_g2d: refclk@29 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_g2d";
+				hisilicon,clkmux-reg = <0x10c 0x20>;
+				hisilicon,clkmux-table = <0 0x20>;
+			};
+			refclk_vdec: refclk@30 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_vdec";
+				hisilicon,clkmux-reg = <0x110 0x20>;
+				hisilicon,clkmux-table = <0 0x20>;
+			};
+			refclk_vpp: refclk@31 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb>;
+				clock-output-names = "rclk_vpp";
+				hisilicon,clkmux-reg = <0x110 0x800>;
+				hisilicon,clkmux-table = <0 0x800>;
+			};
+			refclk_ldi0: refclk@32 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb &pll_hdmi>;
+				clock-output-names = "rclk_ldi0";
+				hisilicon,clkmux-reg = <0x114 0x6000>;
+				hisilicon,clkmux-table = <0 0x6000>;
+			};
+			refclk_ldi1: refclk@33 {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&pll_peri &pll_usb &pll_hdmi>;
+				clock-output-names = "rclk_ldi1";
+				hisilicon,clkmux-reg = <0x118 0xc000>;
+				hisilicon,clkmux-table = <0 0xc000>;
+			};
+			clk_osc480mdiv40: osc480mdiv40 {
+				compatible = "hisilicon,clk-fixed-factor";
+				#clock-cells = <0>;
+				clocks = <&clk_osc480m>;
+				/*mult, div*/
+				hisilicon,fixed-factor = <1 40>;
+				clock-output-names = "clk_osc480mdiv40";
+			};
+			clk_usbpicophy: usbpicophy {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&clk_osc480mdiv40>;
+				clock-output-names = "clk_usbpicophy";
+				hisilicon,hi3620-clkreset = <0x8c 0x1000000>;
+				hisilicon,hi3620-clkgate = <0x30 0x1000000>;
+			};
+			clk_usb2dvc: usb2dvc {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_cfgaxi>;
+				clock-output-names = "clk_usb2dvc";
+				hisilicon,hi3620-clkreset = <0xa4 0x20000>;
+				hisilicon,hi3620-clkgate = <0x50 0x20000>;
+			};
+			uartclk0: clkgate@0 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_uart0>;
+				clock-output-names = "uartclk0";
+				hisilicon,hi3620-clkreset = <0x98 0x10000>;
+				hisilicon,hi3620-clkgate = <0x40 0x10000>;
+			};
+			uartclk1: clkgate@1 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_uart1>;
+				clock-output-names = "uartclk1";
+				hisilicon,hi3620-clkreset = <0x98 0x20000>;
+				hisilicon,hi3620-clkgate = <0x40 0x20000>;
+			};
+			uartclk2: clkgate@2 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_uart2>;
+				clock-output-names = "uartclk2";
+				hisilicon,hi3620-clkreset = <0x98 0x40000>;
+				hisilicon,hi3620-clkgate = <0x40 0x40000>;
+			};
+			uartclk3: clkgate@3 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_uart3>;
+				clock-output-names = "uartclk3";
+				hisilicon,hi3620-clkreset = <0x98 0x80000>;
+				hisilicon,hi3620-clkgate = <0x40 0x80000>;
+			};
+			uartclk4: clkgate@4 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_uart4>;
+				clock-output-names = "uartclk4";
+				hisilicon,hi3620-clkreset = <0x98 0x100000>;
+				hisilicon,hi3620-clkgate = <0x40 0x100000>;
+			};
+			gpioclk0: clkgate@5 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk0";
+				hisilicon,hi3620-clkreset = <0x80 0x100>;
+				hisilicon,hi3620-clkgate = <0x20 0x100>;
+			};
+			gpioclk1: clkgate@6 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk1";
+				hisilicon,hi3620-clkreset = <0x80 0x200>;
+				hisilicon,hi3620-clkgate = <0x20 0x200>;
+			};
+			gpioclk2: clkgate@7 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk2";
+				hisilicon,hi3620-clkreset = <0x80 0x400>;
+				hisilicon,hi3620-clkgate = <0x20 0x400>;
+			};
+			gpioclk3: clkgate@8 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk3";
+				hisilicon,hi3620-clkreset = <0x80 0x800>;
+				hisilicon,hi3620-clkgate = <0x20 0x800>;
+			};
+			gpioclk4: clkgate@9 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk4";
+				hisilicon,hi3620-clkreset = <0x80 0x1000>;
+				hisilicon,hi3620-clkgate = <0x20 0x1000>;
+			};
+			gpioclk5: clkgate@10 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk5";
+				hisilicon,hi3620-clkreset = <0x80 0x2000>;
+				hisilicon,hi3620-clkgate = <0x20 0x2000>;
+			};
+			gpioclk6: clkgate@11 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk6";
+				hisilicon,hi3620-clkreset = <0x80 0x4000>;
+				hisilicon,hi3620-clkgate = <0x20 0x4000>;
+			};
+			gpioclk7: clkgate@12 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk7";
+				hisilicon,hi3620-clkreset = <0x80 0x8000>;
+				hisilicon,hi3620-clkgate = <0x20 0x8000>;
+			};
+			gpioclk8: clkgate@13 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk8";
+				hisilicon,hi3620-clkreset = <0x80 0x10000>;
+				hisilicon,hi3620-clkgate = <0x20 0x10000>;
+			};
+			gpioclk9: clkgate@14 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk9";
+				hisilicon,hi3620-clkreset = <0x80 0x20000>;
+				hisilicon,hi3620-clkgate = <0x20 0x20000>;
+			};
+			gpioclk10: clkgate@15 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk10";
+				hisilicon,hi3620-clkreset = <0x80 0x40000>;
+				hisilicon,hi3620-clkgate = <0x20 0x40000>;
+			};
+			gpioclk11: clkgate@16 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk11";
+				hisilicon,hi3620-clkreset = <0x80 0x80000>;
+				hisilicon,hi3620-clkgate = <0x20 0x80000>;
+			};
+			gpioclk12: clkgate@17 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk12";
+				hisilicon,hi3620-clkreset = <0x80 0x100000>;
+				hisilicon,hi3620-clkgate = <0x20 0x100000>;
+			};
+			gpioclk13: clkgate@18 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk13";
+				hisilicon,hi3620-clkreset = <0x80 0x200000>;
+				hisilicon,hi3620-clkgate = <0x20 0x200000>;
+			};
+			gpioclk14: clkgate@19 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk14";
+				hisilicon,hi3620-clkreset = <0x80 0x400000>;
+				hisilicon,hi3620-clkgate = <0x20 0x400000>;
+			};
+			gpioclk15: clkgate@20 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk15";
+				hisilicon,hi3620-clkreset = <0x80 0x800000>;
+				hisilicon,hi3620-clkgate = <0x20 0x800000>;
+			};
+			gpioclk16: clkgate@21 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk16";
+				hisilicon,hi3620-clkreset = <0x80 0x1000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x1000000>;
+			};
+			gpioclk17: clkgate@22 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk17";
+				hisilicon,hi3620-clkreset = <0x80 0x2000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x2000000>;
+			};
+			gpioclk18: clkgate@23 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk18";
+				hisilicon,hi3620-clkreset = <0x80 0x4000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x4000000>;
+			};
+			gpioclk19: clkgate@24 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk19";
+				hisilicon,hi3620-clkreset = <0x80 0x8000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x8000000>;
+			};
+			gpioclk20: clkgate@25 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk20";
+				hisilicon,hi3620-clkreset = <0x80 0x10000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x10000000>;
+			};
+			gpioclk21: clkgate@26 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "gpioclk21";
+				hisilicon,hi3620-clkreset = <0x80 0x20000000>;
+				hisilicon,hi3620-clkgate = <0x20 0x20000000>;
+			};
+			spiclk0: clkgate@27 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_spi0>;
+				clock-output-names = "spiclk0";
+				hisilicon,hi3620-clkreset = <0x98 0x200000>;
+				hisilicon,hi3620-clkgate = <0x40 0x200000>;
+			};
+			spiclk1: clkgate@28 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_spi1>;
+				clock-output-names = "spiclk1";
+				hisilicon,hi3620-clkreset = <0x98 0x400000>;
+				hisilicon,hi3620-clkgate = <0x40 0x400000>;
+			};
+			spiclk2: clkgate@29 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_spi2>;
+				clock-output-names = "spiclk2";
+				hisilicon,hi3620-clkreset = <0x98 0x800000>;
+				hisilicon,hi3620-clkgate = <0x40 0x800000>;
+			};
+			pwm0_mux: pwm0_mux {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &pwm_divider>;
+				clock-output-names = "pwm0_mux";
+				hisilicon,clkmux-reg = <0x104 0x400>;
+				hisilicon,clkmux-table = <0 0x400>;
+			};
+			pwm1_mux: pwm1_mux {
+				compatible = "hisilicon,hi3620-clk-mux";
+				#clock-cells = <0>;
+				clocks = <&osc32k &pwm_divider>;
+				clock-output-names = "pwm1_mux";
+				hisilicon,clkmux-reg = <0x104 0x800>;
+				hisilicon,clkmux-table = <0 0x800>;
+			};
+			pwmclk0: clkgate@30 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pwm0_mux>;
+				clock-output-names = "pwmclk0";
+				hisilicon,hi3620-clkreset = <0x98 0x80>;
+				hisilicon,hi3620-clkgate = <0x40 0x80>;
+			};
+			pwmclk1: clkgate@31 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pwm1_mux>;
+				clock-output-names = "pwmclk1";
+				hisilicon,hi3620-clkreset = <0x98 0x100>;
+				hisilicon,hi3620-clkgate = <0x40 0x100>;
+			};
+			timerclk01: clkgate@32 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_tcxo>;
+				clock-output-names = "timerclk01";
+				hisilicon,hi3620-clkreset = <0x80 0x1>;
+				hisilicon,hi3620-clkgate = <0x20 0x3>;
+			};
+			timerclk23: clkgate@33 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_tcxo>;
+				clock-output-names = "timerclk23";
+				hisilicon,hi3620-clkreset = <0x80 0x2>;
+				hisilicon,hi3620-clkgate = <0x20 0xc>;
+			};
+			timerclk45: clkgate@34 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_tcxo>;
+				clock-output-names = "timerclk45";
+				hisilicon,hi3620-clkreset = <0x98 0x8>;
+				hisilicon,hi3620-clkgate = <0x40 0x8>;
+			};
+			timerclk67: clkgate@35 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_tcxo>;
+				clock-output-names = "timerclk67";
+				hisilicon,hi3620-clkreset = <0x98 0x10>;
+				hisilicon,hi3620-clkgate = <0x40 0x10>;
+			};
+			timerclk89: clkgate@36 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_tcxo>;
+				clock-output-names = "timerclk89";
+				hisilicon,hi3620-clkreset = <0x98 0x20>;
+				hisilicon,hi3620-clkgate = <0x40 0x20>;
+			};
+			timclk0: clkgate@37 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer0>;
+				clock-output-names = "timclk0";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0 16>;
+			};
+			timclk1: clkgate@38 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer1>;
+				clock-output-names = "timclk1";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0 18>;
+			};
+			timclk2: clkgate@39 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer2>;
+				clock-output-names = "timclk2";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0 20>;
+			};
+			timclk3: clkgate@40 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer3>;
+				clock-output-names = "timclk3";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0 22>;
+			};
+			timclk4: clkgate@41 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer4>;
+				clock-output-names = "timclk4";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0x18 0>;
+			};
+			timclk5: clkgate@42 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer5>;
+				clock-output-names = "timclk5";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0x18 2>;
+			};
+			timclk6: clkgate@43 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer6>;
+				clock-output-names = "timclk6";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0x18 4>;
+			};
+			timclk7: clkgate@44 {
+				compatible = "hisilicon,clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_timer7>;
+				clock-output-names = "timclk7";
+				hisilicon,clkgate-inverted;
+				hisilicon,clkgate = <0x18 6>;
+			};
+			rtcclk: clkgate@47 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_rtc";
+				hisilicon,hi3620-clkgate = <0x20 0x20>;
+			};
+			i2cclk0: clkgate@48 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_i2c0";
+				hisilicon,hi3620-clkgate = <0x40 0x1000000>;
+			};
+			i2cclk1: clkgate@49 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_i2c1";
+				hisilicon,hi3620-clkgate = <0x40 0x2000000>;
+			};
+			i2cclk2: clkgate@50 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_i2c2";
+				hisilicon,hi3620-clkgate = <0x40 0x10000000>;
+			};
+			i2cclk3: clkgate@51 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_i2c3";
+				hisilicon,hi3620-clkgate = <0x40 0x20000000>;
+			};
+			dmaclk: clkgate@52 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&acpclk>;
+				clock-output-names = "clk_dmac";
+				hisilicon,hi3620-clkgate = <0x50 0x400>;
+			};
+			mcuclk: clkgate@53 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_cfgaxi>;
+				clock-output-names = "clk_mcu";
+				hisilicon,hi3620-clkgate = <0x50 0x1000000>;
+			};
+			ddrcperclk: clkgate@54 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_cfgaxi>;
+				clock-output-names = "clk_ddrc_per";
+				hisilicon,hi3620-clkgate = <0x50 0x200>;
+			};
+			acpclk: clkgate@55 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_cfgaxi>;
+				clock-output-names = "clk_apc";
+				hisilicon,hi3620-clkgate = <0x30 0x10000000>;
+			};
+			mmcclk1: clkgate@56 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_mmc1_parent>;
+				clock-output-names = "clk_mmc1";
+				hisilicon,hi3620-clkgate = <0x50 0x200000>;
+			};
+			mmcclk2: clkgate@57 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&div_mmc2>;
+				clock-output-names = "clk_mmc2";
+				hisilicon,hi3620-clkgate = <0x50 0x400000>;
+			};
+			mmcclk3: clkgate@58 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&div_mmc3>;
+				clock-output-names = "clk_mmc3";
+				hisilicon,hi3620-clkgate = <0x50 0x800000>;
+			};
+			sdclk: clkgate@59 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&div_sd>;
+				clock-output-names = "clk_sd";
+				hisilicon,hi3620-clkgate = <0x50 0x100000>;
+			};
+			kpcclk: clkgate@60 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&osc32k>;
+				clock-output-names = "clk_kpc";
+				hisilicon,hi3620-clkgate = <0x20 0x40>;
+			};
+			sciclk: clkgate@61 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "clk_sci";
+				hisilicon,hi3620-clkgate = <0x40 0x4000000>;
+			};
+			dphyclk0: clkgate@62 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "clk_dphy0";
+				hisilicon,hi3620-clkgate = <0x30 0x8000>;
+			};
+			dphyclk1: clkgate@63 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "clk_dphy1";
+				hisilicon,hi3620-clkgate = <0x30 0x10000>;
+			};
+			dphyclk2: clkgate@64 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "clk_dphy2";
+				hisilicon,hi3620-clkgate = <0x30 0x20000>;
+			};
+			ldiclk0: clkgate@65 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_ldi0>;
+				clock-output-names = "clk_ldi0";
+				hisilicon,hi3620-clkgate = <0x30 0x200>;
+			};
+			ldiclk1: clkgate@66 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&refclk_ldi1>;
+				clock-output-names = "clk_ldi1";
+				hisilicon,hi3620-clkgate = <0x30 0x800>;
+			};
+			edcclk0: clkgate@67 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_edc0";
+				hisilicon,hi3620-clkgate = <0x30 0x100>;
+			};
+			edcclk1: clkgate@68 {
+				compatible = "hisilicon,hi3620-clk-gate";
+				#clock-cells = <0>;
+				clocks = <&pclk>;
+				clock-output-names = "clk_edc1";
+				hisilicon,hi3620-clkgate = <0x30 0x400>;
+			};
 
-		timclk1: clk@2 {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <60000000>;
-			clock-output-names = "timer1";
+			dtable: clkdiv@0 {
+				#hisilicon,clkdiv-table-cells = <2>;
+			};
+			
+			div_shareaxi: clkdiv@1 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_shareAXI>;
+				clock-output-names = "shareAXI_div";
+				hisilicon,clkdiv-table = <32 1>;
+				/* divider register offset, mask */
+				hisilicon,clkdiv = <0x100 0x1f>;
+			};
+			div_cfgaxi: clkdiv@2 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&div_shareaxi>;
+				clock-output-names = "cfgAXI_div";
+				hisilicon,clkdiv-table = <2 2>;
+				hisilicon,clkdiv = <0x100 0x60>;
+			};
+			div_mmc1: clkdiv@3 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_mmc1>;
+				clock-output-names = "div_mmc1";
+				hisilicon,clkdiv-table = <16 1>;
+				hisilicon,clkdiv = <0x108 0x1e0>;
+			};
+			div_mmc2: clkdiv@4 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_mmc2>;
+				clock-output-names = "div_mmc2";
+				hisilicon,clkdiv-table = <16 1>;
+				hisilicon,clkdiv = <0x140 0xf>;
+			};
+			div_mmc3: clkdiv@5 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_mmc3>;
+				clock-output-names = "div_mmc3";
+				hisilicon,clkdiv-table = <16 1>;
+				hisilicon,clkdiv = <0x140 0x1e0>;
+			};
+			div_sd: clkdiv@6 {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&refclk_sd>;
+				clock-output-names = "div_sd";
+				hisilicon,clkdiv-table = <16 1>;
+				hisilicon,clkdiv = <0x108 0xf>;
+			};
+			pwm_divider: pwm_divider {
+				compatible = "hisilicon,hi3620-clk-div";
+				#clock-cells = <0>;
+				clocks = <&osc26m>;
+				clock-output-names = "pwm_divider";
+				hisilicon,clkdiv-table = <31 1>;
+				hisilicon,clkdiv = <0x104 0x3e0>;
+			};
 		};
 
 		rtc0: rtc@fc804000 {
 			compatible = "arm,rtc-pl031", "arm,primecell";
 			reg = <0xfc804000 0x1000>;
 			interrupts = <0 9 0x4>;
-			clocks = <&pclk>;	/* need to be replaced by rtcclk */
+			clocks = <&rtcclk>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -98,8 +1016,8 @@
 			reg = <0xfc800000 0x1000>;
 			/* timer00 & timer01 */
 			interrupts = <0 0 4>, <0 1 4>;
-			clocks = <&timclk0 &timclk1 &pclk>;
-			clock-names = "timer0", "timer1", "apb_pclk";
+			clocks = <&timclk0 &timclk1>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -113,8 +1031,8 @@
 			reg = <0xfc801000 0x1000>;
 			/* timer10 & timer11 */
 			interrupts = <0 2 4>, <0 3 4>;
-			clocks = <&timclk0 &timclk1 &pclk>;
-			clock-names = "timer0", "timer1", "apb_pclk";
+			clocks = <&timclk2 &timclk3>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -123,8 +1041,8 @@
 			reg = <0xfca01000 0x1000>;
 			/* timer20 & timer21 */
 			interrupts = <0 4 4>, <0 5 4>;
-			clocks = <&timclk0 &timclk1 &pclk>;
-			clock-names = "timer0", "timer1", "apb_pclk";
+			clocks = <&timclk4 &timclk5>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -133,20 +1051,11 @@
 			reg = <0xfca02000 0x1000>;
 			/* timer30 & timer31 */
 			interrupts = <0 6 4>, <0 7 4>;
-			clocks = <&timclk0 &timclk1 &pclk>;
-			clock-names = "timer0", "timer1", "apb_pclk";
+			clocks = <&timclk6 &timclk7>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
-		timer4: timer@fca03000 {
-			compatible = "arm,sp804", "arm,primecell";
-			reg = <0xfca03000 0x1000>;
-			/* timer40 & timer41 */
-			interrupts = <0 96 4>, <0 97 4>;
-			clocks = <&timclk0 &timclk1 &pclk>;
-			clock-names = "timer0", "timer1", "apb_pclk";
-			status = "disabled";
-		};
 
 		timer5: timer@fc000600 {
 			compatible = "arm,cortex-a9-twd-timer";
@@ -158,7 +1067,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfcb00000 0x1000>;
 			interrupts = <0 20 4>;
-			clocks = <&pclk>;
+			clocks = <&uartclk0>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -167,7 +1076,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfcb01000 0x1000>;
 			interrupts = <0 21 4>;
-			clocks = <&pclk>;
+			clocks = <&uartclk1>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -176,7 +1085,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfcb02000 0x1000>;
 			interrupts = <0 22 4>;
-			clocks = <&pclk>;
+			clocks = <&uartclk2>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -185,7 +1094,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfcb03000 0x1000>;
 			interrupts = <0 23 4>;
-			clocks = <&pclk>;
+			clocks = <&uartclk3>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -194,7 +1103,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfcb04000 0x1000>;
 			interrupts = <0 24 4>;
-			clocks = <&pclk>;
+			clocks = <&uartclk4>;
 			clock-names = "apb_pclk";
 			status = "disabled";
 		};
@@ -209,7 +1118,7 @@
 					&pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk0>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -225,7 +1134,7 @@
 					&pmx0 6 5 1 &pmx0 7 6 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk1>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -241,7 +1150,7 @@
 					&pmx0 6 3 1 &pmx0 7 3 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk2>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -257,7 +1166,7 @@
 					&pmx0 6 11 1 &pmx0 7 11 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk3>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -273,7 +1182,7 @@
 					&pmx0 6 13 1 &pmx0 7 13 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk4>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -289,7 +1198,7 @@
 					&pmx0 6 16 1 &pmx0 7 16 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk5>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -305,7 +1214,7 @@
 					&pmx0 6 18 1 &pmx0 7 19 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk6>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -321,7 +1230,7 @@
 					&pmx0 6 25 1 &pmx0 7 26 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk7>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -337,7 +1246,7 @@
 					&pmx0 6 33 1 &pmx0 7 34 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk8>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -353,7 +1262,7 @@
 					&pmx0 6 41 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk9>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -368,7 +1277,7 @@
 					&pmx0 5 45 1 &pmx0 6 46 1 &pmx0 7 46 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk10>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -384,7 +1293,7 @@
 					&pmx0 6 49 1 &pmx0 7 49 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk11>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -400,7 +1309,7 @@
 					&pmx0 6 51 1 &pmx0 7 52 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk12>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -416,7 +1325,7 @@
 					&pmx0 6 55 1 &pmx0 7 56 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk13>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -432,7 +1341,7 @@
 					&pmx0 6 60 1 &pmx0 7 61 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk14>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -448,7 +1357,7 @@
 					&pmx0 6 64 1 &pmx0 7 65 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk15>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -464,7 +1373,7 @@
 					&pmx0 6 72 1 &pmx0 7 73 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk16>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -480,7 +1389,7 @@
 					&pmx0 6 80 1 &pmx0 7 81 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk17>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -496,7 +1405,7 @@
 					&pmx0 6 86 1 &pmx0 7 87 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk18>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -511,7 +1420,7 @@
 					&pmx0 3 88 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk19>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -526,7 +1435,7 @@
 					&pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk20>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
@@ -540,7 +1449,7 @@
 			gpio-ranges = <	&pmx0 3 94 1 &pmx0 7 96 1>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			clocks = <&pclk>;
+			clocks = <&gpioclk21>;
 			clock-names = "apb_pclk";
 			status = "disable";
 		};
diff --git a/arch/arm/boot/dts/hi4511.dts b/arch/arm/boot/dts/hi4511.dts
index cf90d4254fb8..f74bfe75a4b9 100644
--- a/arch/arm/boot/dts/hi4511.dts
+++ b/arch/arm/boot/dts/hi4511.dts
@@ -199,127 +199,127 @@
 
 		pmx0: pinmux@fc803000 {
 			pinctrl-names = "default";
-			pinctrl-0 = <&i2c0_pmx_func>;
+			pinctrl-0 = <&board_pmx_pins>;
 
 			board_pmx_pins: pinmux_board_pmx_pins {
 				pinctrl-single,pins = <
 					0x008 0x0	/* GPIO -- eFUSE_DOUT */
 					0x100 0x0	/* USIM_CLK & USIM_DATA (IOMG63) */
-					0x104 0x0	/* USIM_RST (IOMG96) */
 				>;
 			};
 			sd_pmx_pins: pinmux_sd_pins {
 				pinctrl-single,pins = <
 					0x0bc 0x0	/* SD_CLK, SD_CMD, SD_DATA[0:2] */
+					0x0c0 0x0	/* SD_DATA[3] */
 				>;
 			};
-			uart0_pmx_func: pinmux_uart0_pins@0  {
+			uart0_pmx_func: pinmux_uart0_func  {
 				pinctrl-single,pins = <
 					0x0f0 0x0
 					0x0f4 0x0	/* UART0_RX & UART0_TX */
 				>;
 			};
-			uart0_pmx_idle: pinmux_uart0_pins@1 {
+			uart0_pmx_idle: pinmux_uart0_idle {
 				pinctrl-single,pins = <
 					/*0x0f0 0x1*/	/* UART0_CTS & UART0_RTS */
 					0x0f4 0x1	/* UART0_RX & UART0_TX */
 				>;
 			};
-			uart1_pmx_func: pinmux_uart1_pins@0  {
+			uart1_pmx_func: pinmux_uart1_func  {
 				pinctrl-single,pins = <
 					0x0f8 0x0	/* UART1_CTS & UART1_RTS (IOMG61) */
 					0x0fc 0x0	/* UART1_RX & UART1_TX (IOMG62) */
 				>;
 			};
-			uart1_pmx_idle: pinmux_uart1_pins@1  {
+			uart1_pmx_idle: pinmux_uart1_idle  {
 				pinctrl-single,pins = <
 					0x0f8 0x1	/* GPIO (IOMG61) */
 					0x0fc 0x1	/* GPIO (IOMG62) */
 				>;
 			};
-			uart2_pmx_func: pinmux_uart2_pins@0 {
+			uart2_pmx_func: pinmux_uart2_func {
 				pinctrl-single,pins = <
 					0x104 0x2	/* UART2_RXD (IOMG96) */
 					0x108 0x2	/* UART2_TXD (IOMG64) */
 				>;
 			};
-			uart2_pmx_idle: pinmux_uart2_pins@1 {
+			uart2_pmx_idle: pinmux_uart2_idle {
 				pinctrl-single,pins = <
 					0x104 0x1	/* GPIO (IOMG96) */
 					0x108 0x1	/* GPIO (IOMG64) */
 				>;
 			};
-			uart3_pmx_func: pinmux_uart3_pins@0 {
+			uart3_pmx_func: pinmux_uart3_func {
 				pinctrl-single,pins = <
 					0x160 0x2	/* UART3_CTS & UART3_RTS (IOMG85) */
 					0x164 0x2	/* UART3_RXD & UART3_TXD (IOMG86) */
 				>;
 			};
-			uart3_pmx_idle: pinmux_uart3_pins@1 {
+			uart3_pmx_idle: pinmux_uart3_idle {
 				pinctrl-single,pins = <
 					0x160 0x1	/* GPIO (IOMG85) */
 					0x164 0x1	/* GPIO (IOMG86) */
 				>;
 			};
-			uart4_pmx_func: pinmux_uart4_pins@0 {
+			uart4_pmx_func: pinmux_uart4_func {
 				pinctrl-single,pins = <
 					0x168 0x0	/* UART4_CTS & UART4_RTS (IOMG87) */
 					0x16c 0x0	/* UART4_RXD (IOMG88) */
 					0x170 0x0	/* UART4_TXD (IOMG93) */
 				>;
 			};
-			uart4_pmx_idle: pinmux_uart4_pins@1 {
+			uart4_pmx_idle: pinmux_uart4_idle {
 				pinctrl-single,pins = <
 					0x168 0x1	/* GPIO (IOMG87) */
 					0x16c 0x1	/* GPIO (IOMG88) */
 					0x170 0x1	/* GPIO (IOMG93) */
 				>;
 			};
-			i2c0_pmx_func: pinmux_i2c0_pins@0 {
+			i2c0_pmx_func: pinmux_i2c0_func {
 				pinctrl-single,pins = <
 					0x0b4 0x0	/* I2C0_SCL & I2C0_SDA (IOMG45) */
 				>;
 			};
-			i2c0_pmx_idle: pinmux_i2c0_pins@1 {
+			i2c0_pmx_idle: pinmux_i2c0_idle {
 				pinctrl-single,pins = <
 					0x0b4 0x1	/* GPIO (IOMG45) */
 				>;
 			};
-			i2c1_pmx_func: pinmux_i2c1_pins@0 {
+			i2c1_pmx_func: pinmux_i2c1_func {
 				pinctrl-single,pins = <
 					0x0b8 0x0	/* I2C1_SCL & I2C1_SDA (IOMG46) */
 				>;
 			};
-			i2c1_pmx_idle: pinmux_i2c1_pins@1 {
+			i2c1_pmx_idle: pinmux_i2c1_idle {
 				pinctrl-single,pins = <
 					0x0b8 0x1	/* GPIO (IOMG46) */
 				>;
 			};
-			i2c2_pmx_func: pinmux_i2c2_pins@0 {
+			i2c2_pmx_func: pinmux_i2c2_func {
 				pinctrl-single,pins = <
 					0x068 0x0	/* I2C2_SCL (IOMG26) */
 					0x06c 0x0	/* I2C2_SDA (IOMG27) */
 				>;
 			};
-			i2c2_pmx_idle: pinmux_i2c2_pins@0 {
+			i2c2_pmx_idle: pinmux_i2c2_idle {
 				pinctrl-single,pins = <
 					0x068 0x1	/* GPIO (IOMG26) */
 					0x06c 0x1	/* GPIO (IOMG27) */
 				>;
 			};
-			i2c3_pmx_func: pinmux_i2c3_pins@0 {
+			i2c3_pmx_func: pinmux_i2c3_func {
 				pinctrl-single,pins = <
 					0x050 0x2	/* I2C3_SCL (IOMG20) */
 					0x054 0x2	/* I2C3_SDA (IOMG21) */
 				>;
 			};
-			i2c3_pmx_idle: pinmux_i2c3_pins@0 {
+			i2c3_pmx_idle: pinmux_i2c3_idle {
 				pinctrl-single,pins = <
 					0x050 0x1	/* GPIO (IOMG20) */
 					0x054 0x1	/* GPIO (IOMG21) */
 				>;
 			};
-			spi0_pmx_func: pinmux_spi0_pins@0 {
+			spi0_pmx_func: pinmux_spi0_func {
 				pinctrl-single,pins = <
 					0x0d4 0x0	/* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
 					0x0d8 0x0	/* SPI0_CS0 (IOMG54) */
@@ -328,7 +328,7 @@
 					0x0e4 0x0	/* SPI0_CS3 (IOMG57) */
 				>;
 			};
-			spi0_pmx_idle: pinmux_spi0_pins@1 {
+			spi0_pmx_idle: pinmux_spi0_idle {
 				pinctrl-single,pins = <
 					0x0d4 0x1	/* GPIO (IOMG53) */
 					0x0d8 0x1	/* GPIO (IOMG54) */
@@ -337,21 +337,21 @@
 					0x0e4 0x1	/* GPIO (IOMG57) */
 				>;
 			};
-			spi1_pmx_func: pinmux_spi1_pins@0 {
+			spi1_pmx_func: pinmux_spi1_func {
 				pinctrl-single,pins = <
 					0x184 0x0	/* SPI1_CLK/SPI1_DI (IOMG98) */
 					0x0e8 0x0	/* SPI1_DO (IOMG58) */
 					0x0ec 0x0	/* SPI1_CS (IOMG95) */
 				>;
 			};
-			spi1_pmx_idle: pinmux_spi1_pins@1 {
+			spi1_pmx_idle: pinmux_spi1_idle {
 				pinctrl-single,pins = <
 					0x184 0x1	/* GPIO (IOMG98) */
 					0x0e8 0x1	/* GPIO (IOMG58) */
 					0x0ec 0x1	/* GPIO (IOMG95) */
 				>;
 			};
-			kpc_pmx_func: pinmux_kpc_pins@0 {
+			kpc_pmx_func: pinmux_kpc_func {
 				pinctrl-single,pins = <
 					0x12c 0x0	/* KEY_IN0 (IOMG73) */
 					0x130 0x0	/* KEY_IN1 (IOMG74) */
@@ -361,53 +361,37 @@
 					0x114 0x0	/* KEY_OUT2 (IOMG67) */
 				>;
 			};
-			kpc_pmx_idle: pinmux_kpc_pins@1 {
-				pinctrl-single,pins = <
-					0x12c 0x1	/* GPIO (IOMG73) */
-					0x130 0x1	/* GPIO (IOMG74) */
-					0x134 0x1	/* GPIO (IOMG75) */
-					0x10c 0x1	/* GPIO (IOMG65) */
-					0x110 0x1	/* GPIO (IOMG66) */
-					0x114 0x1	/* GPIO (IOMG67) */
-				>;
-			};
-			gpio_key_func: pinmux_gpiokey_pins {
+			gpio_key_func: pinmux_gpiokey_func {
 				pinctrl-single,pins = <
 					0x10c 0x1	/* KEY_OUT0/GPIO (IOMG65) */
 					0x130 0x1	/* KEY_IN1/GPIO (IOMG74) */
 				>;
 			};
-			emmc_pmx_func: pinmux_emmc_pins@0 {
+			emmc_pmx_func: pinmux_emmc_func {
 				pinctrl-single,pins = <
 					0x030 0x2	/* eMMC_CMD/eMMC_CLK (IOMG12) */
-					0x018 0x0	/* NAND_CS3_N (IOMG6) */
-					0x024 0x0	/* NAND_BUSY2_N (IOMG8) */
-					0x028 0x0	/* NAND_BUSY3_N (IOMG9) */
 					0x02c 0x2	/* eMMC_DATA[0:7] (IOMG10) */
 				>;
 			};
-			emmc_pmx_idle: pinmux_emmc_pins@1 {
+			emmc_pmx_idle: pinmux_emmc_idle {
 				pinctrl-single,pins = <
 					0x030 0x0	/* GPIO (IOMG12) */
-					0x018 0x1	/* GPIO (IOMG6) */
-					0x024 0x1	/* GPIO (IOMG8) */
-					0x028 0x1	/* GPIO (IOMG9) */
 					0x02c 0x1	/* GPIO (IOMG10) */
 				>;
 			};
-			sd_pmx_func: pinmux_sd_pins@0 {
+			sd_pmx_func: pinmux_sd_func {
 				pinctrl-single,pins = <
 					0x0bc 0x0	/* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
 					0x0c0 0x0	/* SD_DATA3 (IOMG48) */
 				>;
 			};
-			sd_pmx_idle: pinmux_sd_pins@1 {
+			sd_pmx_idle: pinmux_sd_idle {
 				pinctrl-single,pins = <
 					0x0bc 0x1	/* GPIO (IOMG47) */
 					0x0c0 0x1	/* GPIO (IOMG48) */
 				>;
 			};
-			nand_pmx_func: pinmux_nand_pins@0 {
+			nand_pmx_func: pinmux_nand_func {
 				pinctrl-single,pins = <
 					0x00c 0x0	/* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
 					0x010 0x0	/* NAND_CS1_N (IOMG4) */
@@ -420,7 +404,7 @@
 					0x02c 0x0	/* NAND_DATA[8:15] (IOMG10) */
 				>;
 			};
-			nand_pmx_idle: pinmux_nand_pins@1 {
+			nand_pmx_idle: pinmux_nand_idle {
 				pinctrl-single,pins = <
 					0x00c 0x1	/* GPIO (IOMG3) */
 					0x010 0x1	/* GPIO (IOMG4) */
@@ -433,21 +417,42 @@
 					0x02c 0x1	/* GPIO (IOMG10) */
 				>;
 			};
-			sdio_pmx_func: pinmux_sdio_pins@0 {
+			sdio_pmx_func: pinmux_sdio_func {
 				pinctrl-single,pins = <
 					0x0c4 0x0	/* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
 				>;
 			};
-			sdio_pmx_idle: pinmux_sdio_pins@1 {
+			sdio_pmx_idle: pinmux_sdio_idle {
 				pinctrl-single,pins = <
 					0x0c4 0x1	/* GPIO (IOMG49) */
 				>;
 			};
-			audio_out_pmx_func: pinmux_audio_pins@0 {
+			audio_out_pmx_func: pinmux_audio_func {
 				pinctrl-single,pins = <
 					0x0f0 0x1	/* GPIO (IOMG59), audio spk & earphone */
 				>;
 			};
+			pwm0_pmx_func: pinmux_pwm0_func {
+				pinctrl-single,pins = <
+					0x154 0x0	/* PWM0 (IOMG82) */
+				>;
+			};
+			pwm0_pmx_idle: pinmux_pwm0_idle {
+				pinctrl-single,pins = <
+					0x154 0x1	/* GPIO149 (IOMG82) */
+				>;
+			};
+			pwm1_pmx_func: pinmux_pwm1_func {
+				pinctrl-single,pins = <
+					0x158 0x0	/* PWM1 (IOMG83) */
+				>;
+			};
+			pwm1_pmx_idle: pinmux_pwm1_idle {
+				pinctrl-single,pins = <
+					0x158 0x1	/* GPIO150 (IOMG83) */
+				>;
+			};
+
 		};
 
 		pmx1: pinmux@fc803800 {
@@ -458,7 +463,6 @@
 			board_pu_pins: pinmux_board_pu_pins {
 				pinctrl-single,pins = <
 					0x014 0		/* GPIO_158 (IOCFG2) */
-					0x018 0		/* GPIO_159 (IOCFG3) */
 					0x01c 0		/* BOOT_MODE0 (IOCFG4) */
 					0x020 0		/* BOOT_MODE1 (IOCFG5) */
 				>;
@@ -497,7 +501,7 @@
 				>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			uart0_cfg_func: pincfg_uart0_pins@0 {
+			uart0_cfg_func: pincfg_uart0_func {
 				pinctrl-single,pins = <
 					0x208 0		/* UART0_RXD (IOCFG138) */
 					0x20c 0		/* UART0_TXD (IOCFG139) */
@@ -505,7 +509,7 @@
 				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart0_cfg_idle: pincfg_uart0_pins@1 {
+			uart0_cfg_idle: pincfg_uart0_idle {
 				pinctrl-single,pins = <
 					0x208 0		/* UART0_RXD (IOCFG138) */
 					0x20c 0		/* UART0_TXD (IOCFG139) */
@@ -513,7 +517,7 @@
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart1_cfg_func: pincfg_uart1_pins@0 {
+			uart1_cfg_func: pincfg_uart1_func {
 				pinctrl-single,pins = <
 					0x210 0		/* UART1_CTS (IOCFG140) */
 					0x214 0		/* UART1_RTS (IOCFG141) */
@@ -523,7 +527,7 @@
 				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart1_cfg_idle: pincfg_uart1_pins@2 {
+			uart1_cfg_idle: pincfg_uart1_idle {
 				pinctrl-single,pins = <
 					0x210 0		/* UART1_CTS (IOCFG140) */
 					0x214 0		/* UART1_RTS (IOCFG141) */
@@ -533,27 +537,27 @@
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart2_cfg_func: pincfg_uart2_pins@0 {
+			uart2_cfg_func: pincfg_uart2_func {
 				pinctrl-single,pins = <
-					0x210 0		/* UART1_CTS (IOCFG140) */
-					0x214 0		/* UART1_RTS (IOCFG141) */
-					0x218 0		/* UART1_RXD (IOCFG142) */
-					0x21c 0		/* UART1_TXD (IOCFG143) */
+					0x220 0		/* UART2_CTS (IOCFG144) */
+					0x224 0		/* UART2_RTS (IOCFG145) */
+					0x228 0		/* UART2_RXD (IOCFG146) */
+					0x22c 0		/* UART2_TXD (IOCFG147) */
 				>;
 				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart2_cfg_idle: pincfg_uart2_pins@1 {
+			uart2_cfg_idle: pincfg_uart2_idle {
 				pinctrl-single,pins = <
-					0x210 0		/* GPIO (IOCFG140) */
-					0x214 0		/* GPIO (IOCFG141) */
-					0x218 0		/* GPIO (IOCFG142) */
-					0x21c 0		/* GPIO (IOCFG143) */
+					0x220 0		/* GPIO (IOCFG144) */
+					0x224 0		/* GPIO (IOCFG145) */
+					0x228 0		/* GPIO (IOCFG146) */
+					0x22c 0		/* GPIO (IOCFG147) */
 				>;
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart3_cfg_func: pincfg_uart3_pins@0 {
+			uart3_cfg_func: pincfg_uart3_func {
 				pinctrl-single,pins = <
 					0x294 0		/* UART3_CTS (IOCFG173) */
 					0x298 0		/* UART3_RTS (IOCFG174) */
@@ -563,7 +567,7 @@
 				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart3_cfg_idle: pincfg_uart3_pins@1 {
+			uart3_cfg_idle: pincfg_uart3_idle {
 				pinctrl-single,pins = <
 					0x294 0		/* UART3_CTS (IOCFG173) */
 					0x298 0		/* UART3_RTS (IOCFG174) */
@@ -573,7 +577,7 @@
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			uart4_cfg_func: pincfg_uart4_pins@0 {
+			uart4_cfg_func: pincfg_uart4_func {
 				pinctrl-single,pins = <
 					0x2a4 0		/* UART4_CTS (IOCFG177) */
 					0x2a8 0		/* UART4_RTS (IOCFG178) */
@@ -583,7 +587,7 @@
 				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			i2c0_cfg_func: pincfg_i2c0_pins@0 {
+			i2c0_cfg_func: pincfg_i2c0_func {
 				pinctrl-single,pins = <
 					0x17c 0		/* I2C0_SCL (IOCFG103) */
 					0x180 0		/* I2C0_SDA (IOCFG104) */
@@ -592,7 +596,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			i2c1_cfg_func: pincfg_i2c1_pins@0 {
+			i2c1_cfg_func: pincfg_i2c1_func {
 				pinctrl-single,pins = <
 					0x184 0		/* I2C1_SCL (IOCFG105) */
 					0x188 0		/* I2C1_SDA (IOCFG106) */
@@ -601,7 +605,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			i2c2_cfg_func: pincfg_i2c2_pins@0 {
+			i2c2_cfg_func: pincfg_i2c2_func {
 				pinctrl-single,pins = <
 					0x118 0		/* I2C2_SCL (IOCFG79) */
 					0x11c 0		/* I2C2_SDA (IOCFG80) */
@@ -610,7 +614,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			i2c3_cfg_func: pincfg_i2c3_pins@0 {
+			i2c3_cfg_func: pincfg_i2c3_func {
 				pinctrl-single,pins = <
 					0x100 0		/* I2C3_SCL (IOCFG73) */
 					0x104 0		/* I2C3_SDA (IOCFG74) */
@@ -619,7 +623,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			spi0_cfg_func1: pincfg_spi0_f1_pins@0 {
+			spi0_cfg_func1: pincfg_spi0_f1 {
 				pinctrl-single,pins = <
 					0x1d4 0		/* SPI0_CLK (IOCFG125) */
 					0x1d8 0		/* SPI0_DI (IOCFG126) */
@@ -629,7 +633,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			spi0_cfg_func2: pincfg_spi0_f2_pins@0 {
+			spi0_cfg_func2: pincfg_spi0_f2 {
 				pinctrl-single,pins = <
 					0x1e0 0		/* SPI0_CS0 (IOCFG128) */
 					0x1e4 0		/* SPI0_CS1 (IOCFG129) */
@@ -640,7 +644,7 @@
 				pinctrl-single,bias-pullup = <1 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			spi1_cfg_func1: pincfg_spi1_f1_pins@0 {
+			spi1_cfg_func1: pincfg_spi1_f1 {
 				pinctrl-single,pins = <
 					0x1f0 0		/* SPI1_CLK (IOCFG132) */
 					0x1f4 0		/* SPI1_DI (IOCFG133) */
@@ -650,7 +654,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			spi1_cfg_func2: pincfg_spi1_f2_pins@0 {
+			spi1_cfg_func2: pincfg_spi1_f2 {
 				pinctrl-single,pins = <
 					0x1fc 0		/* SPI1_CS (IOCFG135) */
 				>;
@@ -658,7 +662,7 @@
 				pinctrl-single,bias-pullup = <1 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			kpc_cfg_func: pincfg_kpc_pins@0 {
+			kpc_cfg_func: pincfg_kpc_func {
 				pinctrl-single,pins = <
 					0x250 0		/* KEY_IN0 (IOCFG156) */
 					0x254 0		/* KEY_IN1 (IOCFG157) */
@@ -670,13 +674,9 @@
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
-			emmc_cfg_func: pincfg_emmc_pins@0 {
+			emmc_cfg_func: pincfg_emmc_func {
 				pinctrl-single,pins = <
 					0x0ac 0		/* eMMC_CMD (IOCFG40) */
-					0x0b0 0		/* eMMC_CLK (IOCFG41) */
-					0x058 0		/* NAND_CS3_N (IOCFG19) */
-					0x064 0		/* NAND_BUSY2_N (IOCFG22) */
-					0x068 0		/* NAND_BUSY3_N (IOCFG23) */
 					0x08c 0		/* NAND_DATA8 (IOCFG32) */
 					0x090 0		/* NAND_DATA9 (IOCFG33) */
 					0x094 0		/* NAND_DATA10 (IOCFG34) */
@@ -690,27 +690,35 @@
 				pinctrl-single,bias-pullup = <1 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			sd_cfg_func1: pincfg_sd_f1_pins@0 {
+			emmc_cfg_clk_func: pincfg_emmc_clk_func {
+				pinctrl-single,pins = <
+					0x0b0 0		/* eMMC_CLK (IOCFG41) */
+				>;
+				pinctrl-single,bias-pulldown = <0 2 0 2>;
+				pinctrl-single,bias-pullup = <0 1 0 1>;
+				pinctrl-single,drive-strength = <0x30 0xf0>;
+			};
+			sd_cfg_func1: pincfg_sd_f1 {
 				pinctrl-single,pins = <
 					0x18c 0		/* SD_CLK (IOCFG107) */
-					0x190 0		/* SD_CMD (IOCFG108) */
 				>;
-				pinctrl-single,bias-pulldown = <2 2 0 2>;
+				pinctrl-single,bias-pulldown = <0 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			sd_cfg_func2: pincfg_sd_f2_pins@0 {
+			sd_cfg_func2: pincfg_sd_f2 {
 				pinctrl-single,pins = <
+					0x190 0		/* SD_CMD (IOCFG108) */
 					0x194 0		/* SD_DATA0 (IOCFG109) */
 					0x198 0		/* SD_DATA1 (IOCFG110) */
 					0x19c 0		/* SD_DATA2 (IOCFG111) */
 					0x1a0 0		/* SD_DATA3 (IOCFG112) */
 				>;
-				pinctrl-single,bias-pulldown = <2 2 0 2>;
-				pinctrl-single,bias-pullup = <0 1 0 1>;
+				pinctrl-single,bias-pulldown = <0 2 0 2>;
+				pinctrl-single,bias-pullup = <1 1 0 1>;
 				pinctrl-single,drive-strength = <0x70 0xf0>;
 			};
-			nand_cfg_func1: pincfg_nand_f1_pins@0 {
+			nand_cfg_func1: pincfg_nand_f1 {
 				pinctrl-single,pins = <
 					0x03c 0		/* NAND_ALE (IOCFG12) */
 					0x040 0		/* NAND_CLE (IOCFG13) */
@@ -735,7 +743,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			nand_cfg_func2: pincfg_nand_f2_pins@0 {
+			nand_cfg_func2: pincfg_nand_f2 {
 				pinctrl-single,pins = <
 					0x044 0		/* NAND_RE_N (IOCFG14) */
 					0x048 0		/* NAND_WE_N (IOCFG15) */
@@ -752,7 +760,7 @@
 				pinctrl-single,bias-pullup = <1 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			sdio_cfg_func: pincfg_sdio_pins@0 {
+			sdio_cfg_func: pincfg_sdio_func {
 				pinctrl-single,pins = <
 					0x1a4 0		/* SDIO0_CLK (IOCG113) */
 					0x1a8 0		/* SDIO0_CMD (IOCG114) */
@@ -765,7 +773,7 @@
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 				pinctrl-single,drive-strength = <0x30 0xf0>;
 			};
-			audio_out_cfg_func: pincfg_audio_pins@0 {
+			audio_out_cfg_func: pincfg_audio_func {
 				pinctrl-single,pins = <
 					0x200 0		/* GPIO (IOCFG136) */
 					0x204 0		/* GPIO (IOCFG137) */
@@ -773,6 +781,35 @@
 				pinctrl-single,bias-pulldown = <2 2 0 2>;
 				pinctrl-single,bias-pullup = <0 1 0 1>;
 			};
+			pmic_int_cfg_func: pincfg_pmic_func {
+				pinctrl-single,pins = <
+					0x018 0		/* GPIO159 (IOCFG003) */
+				>;
+			};
+			/* TP_IRQ need pullup */
+			ts_pin_cfg: pincfg_ts_func {
+				pinctrl-single,pins = <
+					0x010 0		/* GPIO157 (TP_IRQ) */
+				>;
+				pinctrl-single,bias-pulldown = <0 2 0 2>;
+				pinctrl-single,bias-pullup = <1 1 0 1>;
+			};
+			pwm0_cfg_func: pincfg_pwm0_func {
+				pinctrl-single,pins = <
+					0x280 0		/* PWM0 (IOCFG168) */
+				>;
+				pinctrl-single,bias-pulldown = <2 2 0 2>;
+				pinctrl-single,bias-pullup = <0 1 0 1>;
+				pinctrl-single,drive-strength = <0x30 0xf0>;
+			};
+			pwm1_cfg_func: pincfg_pwm1_func {
+				pinctrl-single,pins = <
+					0x284 0		/* PWM1 (IOCFG169) */
+				>;
+				pinctrl-single,bias-pulldown = <2 2 0 2>;
+				pinctrl-single,bias-pullup = <0 1 0 1>;
+				pinctrl-single,drive-strength = <0x30 0xf0>;
+			};
 		};
 	};
 };