From c4f71426b4dd3c46ec99549567b3e268ee001bea Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Mon, 10 Feb 2014 18:05:25 +0800 Subject: ARM: dts: correct L2 register address of Hi3620 Correct the register address of L2 controller in Hi3620 DTS file. Signed-off-by: Haojian Zhuang --- arch/arm/boot/dts/hi3620.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index c227a221943f..6836795040ad 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -73,7 +73,7 @@ L2: l2-cache { compatible = "arm,pl310-cache"; - reg = <0xfc10000 0x100000>; + reg = <0x100000 0x100000>; interrupts = <0 15 4>; cache-unified; cache-level = <2>; -- cgit v1.2.3