diff options
| author | Achin Gupta <achin.gupta@arm.com> | 2014-07-20 20:38:47 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2014-07-22 11:58:57 +0100 |
| commit | 4def123e01a2db65d8f6b5d5d9f89e2ffae2e6f3 (patch) | |
| tree | c066a20d362adebed922bddcbf55243577664e17 | |
| parent | 912e794340ef2c5d303f29d905c9457ee6ba8084 (diff) | |
Add workaround for a Juno platform erratav0.4-Juno-0.6-rc0
This patch adds the recommended workaround for defect id 831273 by triggering
the event stream every 65536 cycles.
Change-Id: I62c947e64396f10af62af495e413d0af846d6628
| -rw-r--r-- | include/lib/aarch64/arch.h | 4 | ||||
| -rw-r--r-- | lib/aarch64/cpu_helpers.S | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 91860942..82a04c98 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -167,6 +167,10 @@ #define EL0VTEN_BIT (1 << 8) #define EL0PCTEN_BIT (1 << 0) #define EL0VCTEN_BIT (1 << 1) +#define EVNTEN_BIT (1 << 2) +#define EVNTDIR_BIT (1 << 3) +#define EVNTI_SHIFT 4 +#define EVNTI_MASK 0xf /* CPTR_EL3 definitions */ #define TCPAC_BIT (1 << 31) diff --git a/lib/aarch64/cpu_helpers.S b/lib/aarch64/cpu_helpers.S index 8d063c43..b85e7430 100644 --- a/lib/aarch64/cpu_helpers.S +++ b/lib/aarch64/cpu_helpers.S @@ -64,6 +64,14 @@ a57_setup_begin: msr s3_1_c11_c0_2, x0 smp_setup_begin: + /* --------------------------------------------- + * Enable the event stream every 65536 cycles + * --------------------------------------------- + */ + mov x0, #(0xf << EVNTI_SHIFT) + orr x0, x0, #EVNTEN_BIT + msr CNTKCTL_EL1, x0 + mrs x0, CPUECTLR_EL1 orr x0, x0, #CPUECTLR_SMP_BIT msr CPUECTLR_EL1, x0 |