diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2018-11-28 15:10:32 +0200 |
|---|---|---|
| committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2019-05-01 17:43:29 +0100 |
| commit | 6c7d5263ea0ba6ae37993382881cd3636ffcd73b (patch) | |
| tree | 45fd0a98d85d06e7b3ab211731681744eabb8c9c | |
| parent | 4490b5d39efd87bcb60d1e3b52f39257581fa56a (diff) | |
Revert "MA-12957: arm64: dts: imx8qm/qxp mek: Configure interrupts for adv7535"
This commit is breaking suspend/resume, so reverting it until a fix is
provided.
This reverts commit 47427ff4ce37a6d6e0468de9b6e61f8a58b21d9a.
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 6 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi | 14 |
2 files changed, 4 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index ccb946070ca2..afb80323e82d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -593,7 +593,6 @@ fsl,pins = < SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc600004c SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc600004c - SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020 >; }; @@ -601,7 +600,6 @@ fsl,pins = < SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc600004c SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc600004c - SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020 >; }; @@ -1363,8 +1361,6 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; - interrupt-parent = <&gpio0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1407,8 +1403,6 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; - interrupt-parent = <&gpio0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi index 772bd7105338..57164b57ed9b 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi @@ -454,9 +454,8 @@ pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 - SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020 + SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 >; }; @@ -468,9 +467,8 @@ pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 - SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020 + SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 >; }; @@ -1147,8 +1145,6 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; - interrupt-parent = <&gpio0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1235,8 +1231,6 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; - interrupt-parent = <&gpio0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { |