diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2018-11-20 10:54:27 +0200 |
|---|---|---|
| committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2019-05-01 17:43:14 +0100 |
| commit | f87a5c4b2197b8a126abea7df8be43138aefe4db (patch) | |
| tree | 156dd3678d63e1f9dcbbfa0e0e76529bcf6bff31 | |
| parent | 7a5fac7c5348d965645abd5943d4703d87875bd3 (diff) | |
MA-12957: arm64: dts: imx8qm/qxp mek: Configure interrupts for adv7535
Configure the interrupt for ADV7535 so that it can generate interrupts
events for HDP when the HDMI cable is plugged in or out.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 6 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi | 14 |
2 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index fe8db1acaae2..d5f1472f39fd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -591,6 +591,7 @@ fsl,pins = < SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc600004c SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc600004c + SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020 >; }; @@ -598,6 +599,7 @@ fsl,pins = < SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc600004c SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc600004c + SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020 >; }; @@ -1347,6 +1349,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio0>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1389,6 +1393,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio0>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi index 52c5ec8e9c36..bcd79ae5b411 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi @@ -454,8 +454,9 @@ pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 0x00000020 >; }; @@ -467,8 +468,9 @@ pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 0x00000020 >; }; @@ -1145,6 +1147,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio0>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1231,6 +1235,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio0>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { |