diff options
| author | Andy Duan <fugang.duan@nxp.com> | 2018-11-29 15:08:00 +0800 |
|---|---|---|
| committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2019-05-01 17:43:30 +0100 |
| commit | fc02f8206c58ee282bdd1bc01e4f4d65134fba60 (patch) | |
| tree | 483efae1b9a08690cf335d9ecbb248ea96f5ffa8 | |
| parent | de1d715b4cdbd9137cb479983b1c1d17aa29e383 (diff) | |
arm64: dts: imx8qm/qxp: correct the interrupt line for adv7535
Correct the interrupt line for adv7535.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Acked-by: Fancy Fang <chen.fang@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi | 6 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi | 14 |
2 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi index afb80323e82d..1202dc57ef09 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi @@ -593,6 +593,7 @@ fsl,pins = < SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc600004c SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc600004c + SC_P_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO19 0x00000020 >; }; @@ -600,6 +601,7 @@ fsl,pins = < SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc600004c SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc600004c + SC_P_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_IO23 0x00000020 >; }; @@ -1361,6 +1363,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio1>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1403,6 +1407,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio1>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi index 57164b57ed9b..21229b880e3b 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi @@ -454,8 +454,9 @@ pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28 0x00000020 >; }; @@ -467,8 +468,9 @@ pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp { fsl,pins = < - SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 - SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 + SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 + SC_P_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x00000020 >; }; @@ -1145,6 +1147,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio1>; + interrupts = <28 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { @@ -1231,6 +1235,8 @@ reg = <0x3d>; adi,dsi-lanes = <4>; adi,dsi-channel = <1>; + interrupt-parent = <&gpio2>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; status = "okay"; port { |